1597 Tcl Jobs - Page 23

About The Role Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : Dassault Systemes 3DEXPERIENCE ENOVIA Customization Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your typical day will involve collaborating with various stakeholders to gather requirements, overseeing the development process, and ensuring that the applications meet the specified needs. You will also engage in problem-solving discussions, providing insights and solutions to enhance application functionality and user experience. Additionally, you will mentor team members, fostering a collaborative environment that encourages innovation and continuous improvement. Roles & Responsibilities:Coordinate with customers to perform data cleansing on the source system and import/save the cleaned SolidWorks data into the 3DEXPERIENCE platform.Understand and work with SolidWorks configurations and data structures relevant to migration.Validate imported data in the latest versions of the 3DEXPERIENCE platform to ensure accuracy and completeness.Develop or execute scripts using TCL and MQL for data correction, transformation, and automation.Collaborate with cross-functional teams to ensure end-to-end data migration quality and success.Document data migration procedures, challenges, resolutions, and validation results. Professional & Technical Skills: Strong understanding of SolidWorks and its configuration settings related to data migration.Hands-on experience with latest versions of 3DEXPERIENCE platform, especially in data validation workflows.Proficiency in scripting using TCL and MQL.Ability to work closely with business stakeholders and technical teams to ensure clean and complete data migration.Good to Have skills- Familiarity with ETL tools such as SSIS or equivalent.Exposure to relational databases like Microsoft SQL Server and MySQL.Experience in consuming and integrating with RESTful web services for data load operations. Additional Information:- The candidate should have minimum 4+ years of experience in Dassault Systemes 3DEXPERIENCE ENOVIA Customization.- This position is based at our Chennai office.- A 15 years full time education is required. Qualification 15 years full time education

About The Role Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : Dassault Systemes 3DEXPERIENCE ENOVIA Customization Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your typical day will involve collaborating with various stakeholders to gather requirements, overseeing the development process, and ensuring that the applications meet the specified needs. You will also engage in problem-solving discussions, providing insights and solutions to enhance application functionality and user experience. Additionally, you will mentor team members, fostering a collaborative environment that encourages innovation and continuous improvement. Roles & Responsibilities:1. Guiding the team in development / customization using Enovia data migration.2.Understands and develops software solutions to meet end user's requirements. Ensures that applications integrate with overall system architecture, utilizing standard IT lifecycle methodologies and tools.3. Should be responsible to handle design, development, and analysis and Delivery of the requirements. Professional & Technical Skills: - Must Have Skills: 3DEXPERIENCE 2019x widget and dashboard, 3DEXPERIENCE 2019x Data Migration1.Hands-on experience with latest versions of 3DEXPERIENCE platform, especially in data validation workflows.2.Proficiency in scripting using TCL and MQL.3. Experienced in Widget customization, webservices.4. Matrix services knowledge, xPDM xml to Enovia data mapping knowledge.- Good to Have Skills: Enovia 2019x Program, Variant, and Change Management, Familiarity with ETL tools such as SSIS or equivalent. Additional Information:- The candidate should have minimum 4+ years of experience in 3DEXPERIENCE 2019x or above customization and configuration.- This position is based at our Hyderabad office.- A 15 year full time education is required. Qualification 15 years full time education

About The Role Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : Dassault Systemes 3DEXPERIENCE Platform DELMIA Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Developer, you will be responsible for designing, building, and configuring applications to meet business process and application requirements. You will play a crucial role in developing solutions that enhance operational efficiency and productivity. Summary :As an Application Developer, you will be responsible for designing, building, and configuring applications to meet business process and application requirements. You will play a crucial role in developing solutions that enhance operational efficiency and productivity. Roles & responsibilities-1. Knowledge and ability to contribute to the development, L2/L3 Support, performance troubleshooting, and maintenance of 3DEXPERIENCE platform with primarily focus on CATIA/DELMIA V5/V6 2. Ability to debug issues in Web & Native apps CATIA/DELMIA using competent methodologies and to liaise with the business and partners to immediately provide a workaround and fix the issue 3. Must be able to handle L2, L3 level production support for DELMIA Module.4. Must be able to identify application Incidents for permanent solution.5. Must be able to analyze and write knowledge Base for the issue. Professional & Technical Skills: 1. CATIA V5/V6 or 3DExperience Application knowledge.2. Good Team management skills and work closely with other peers.3. Experience in CATIA/DELMIA CAA, 3DExperience 2020X and above.4. Good at troubleshooting 3DEXPERIENCE Issue Should be familiar with debugging the traces.5. Experience with 3DX Installation/configuration, system administration functionalities are desirable 6. SQL, MQL, TCL and EKL experience.7. Outstanding all-round communication skills and ability to work collaboratively 8. Excellent verbal and written communication skills in English and comfortable discussing technical issues. Additional Information:- The candidate should have minimum 4 Years of experience CATIA V5/V6 3DEXPERIENCE 2020X customization, performance troubleshooting and maintenance of 3DEXPERIENCE platform.- This position is based at our Bengaluru office.- A 15-year full time education is required.-CATIA V5/V6 or 3DExperience Application Certified Professionals will be preferred. Qualification 15 years full time education

About The Role Project Role : Software Development Lead Project Role Description : Develop and configure software systems either end-to-end or for a specific stage of product lifecycle. Apply knowledge of technologies, applications, methodologies, processes and tools to support a client, project or entity. Must have skills : Dassault Systemes 3DEXPERIENCE ENOVIA Customization Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Lead, you will be responsible for developing and configuring software systems, applying knowledge of technologies, methodologies, and tools to support projects or clients throughout the product lifecycle. Roles & Responsibilities:- Expected to be an SME- Collaborate and manage the team to perform- Responsible for team decisions- Engage with multiple teams and contribute on key decisions- Provide solutions to problems for their immediate team and across multiple teams- Lead the team in developing and configuring software systems- Implement methodologies and processes to support project objectives Professional & Technical Skills: - Must To Have Skills: Proficiency in Dassault Systemes 3DEXPERIENCE ENOVIA Customization- Strong understanding of software development lifecycle- Experience in end-to-end software system development- Knowledge of technologies and applications in software development Additional Information:- The candidate should have a minimum of 5 years of experience in Dassault Systemes 3DEXPERIENCE ENOVIA Customization- This position is based at our Bengaluru office- A 15 years full time education is required Qualification 15 years full time education

About the role: As a Senior DevOps Engineer focused on Vulnerability Remediation within Infrastructure Engineering and Cloud Operations (IECO), you will contribute to the development of our solution delivery platforms supporting our web-based applications on the latest cloud technologies within a DevSecOps culture. You will have the opportunity to utilize automation technologies and private/public cloud technologies to provide world-class solutions that serve the non-profit industry and ensure the security of the environment. What you'll do: Build automation leveraging CI/CD processes, automated testing, unit testing, code coverage and other software development best practices Contribute to reusable automation scripts, libraries, services, and tools to increase system and process efficiencies Partnering with the security teams and tools to continually review and understand new industry security threats, associated technologies and quickly addressing vulnerabilities Partnering with the application management teams to continually review and understand the impact of resolving open vulnerabilities and execute those resolutions. Pursue opportunities to further operational excellence by increasing efficiency and reducing risk, complexity, waste and cost Partner with key stakeholders to establish technical direction and negotiate technical decision points to drive innovative solutions Drive technical design and validation, while ensuring implementation aligns with our technical strategies and strategic business goals Develop architectural designs for applications building something to delight clients while managing costs to deliver these applications What you’ll bring: 5+ years of experience with common web technologies required – C#, .NET, Java or other equivalent Object-Oriented language 5+ years of experience in the implementation of cloud technologies (Microsoft Azure) and an understanding of SAAS, PAAS, and IAAS models Experience building high performance, scalable, robust, 24x7 environments and/or applications Experience creating scripts or automation, such as Perl, PowerShell, Python, TCL/TK, Ruby or similar for cloud orchestration required (PowerShell preferred) Available on a 24x7x365 basis when needed for production impacting incidents or key customer events. Ability to create quality code that is secure and operable at scale. Stay up to date on everything Blackbaud, Blackbaud is a digital-first company which embraces a flexible remote or hybrid work culture. Blackbaud supports hiring and career development for all roles from the location you are in today! Blackbaud is proud to be an equal opportunity employer and is committed to maintaining an inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, physical or mental disability, age, or veteran status or any other basis protected by federal, state, or local law.

About the role: As a Principal DevOps Engineer focused on Vulnerability Remediation within Infrastructure Engineering and Cloud Operations (IECO), you will contribute to the development of our solution delivery platforms supporting our web-based applications on the latest cloud technologies within a DevSecOps culture. You will have the opportunity to utilize automation technologies and private/public cloud technologies to provide world-class solutions that serve the non-profit industry and ensure the security of the environment. What you'll do: Build automation leveraging CI/CD processes, automated testing, unit testing, code coverage and other software development best practices Contribute to reusable automation scripts, libraries, services, and tools to increase system and process efficiencies Partnering with the security teams and tools to continually review and understand new industry security threats, associated technologies and quickly addressing vulnerabilities Partnering with the application management teams to continually review and understand the impact of resolving open vulnerabilities and execute those resolutions. Pursue opportunities to further operational excellence by increasing efficiency and reducing risk, complexity, waste and cost Partner with key stakeholders to establish technical direction and negotiate technical decision points to drive innovative solutions Drive technical design and validation, while ensuring implementation aligns with our technical strategies and strategic business goals Develop architectural designs for applications building something to delight clients while managing costs to deliver these applications What you’ll bring: 10+ years of experience with common web technologies required – C#, .NET, Java or other equivalent Object-Oriented language 10+ years of experience in the implementation of cloud technologies (Microsoft Azure) and an understanding of SAAS, PAAS, and IAAS models Experience building high performance, scalable, robust, 24x7 environments and/or applications Experience creating scripts or automation, such as Perl, PowerShell, Python, TCL/TK, Ruby or similar for cloud orchestration required (PowerShell preferred) Available on a 24x7x365 basis when needed for production impacting incidents or key customer events. Ability to create quality code that is secure and operable at scale. Stay up to date on everything Blackbaud, Blackbaud is a digital-first company which embraces a flexible remote or hybrid work culture. Blackbaud supports hiring and career development for all roles from the location you are in today! Blackbaud is proud to be an equal opportunity employer and is committed to maintaining an inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, physical or mental disability, age, or veteran status or any other basis protected by federal, state, or local law.

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: MTS SILICON DESIGN ENGINEER THE ROLE: This exciting position as MTS in AMD's Silicon IP solutions & SOC group will provide the individual with an opportunity to demonstrate strong technical leadership across the design hierarchy from architecture to Productization. Join us in providing innovative IP solutions as we embark on our journey into the cutting edge programmable logic based silicon designs by delivering the complex IP Solutions for multiple market segments As part of this opportunity, we are seeking a Synthesis and Timing engineer to participate in the development of large SOC’s with multiple physical blocks and 300+ clock domains. This position requires an individual to be creative, team-oriented, technology savvy, able to lead large cross-functional teams, comfortable and willing to provide regular updates to management chain during the project execution THE PERSON: You have a passion for modern, complex hardware and IP architecture, digital design, and physical design in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency. Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Work with CAD on the development of pre-production synthesis (Design Compiler) and STA (Primetime) flows Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts) PREFERRED EXPERIENCE: About 6 to 10 years of relevant experience Worked with EDA tools that enable RTL quality checks Hands on experience in building the timing constraints for IPs, blocks and Full-chip implementation in both flat/hierarchical flows. Experience with analyzing the timing reports and identifying both the design and constraints related issues. Ability to multitask and grasp new flows/tools/ideas Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc Automating workflows in a distributed compute environment. Scripting language experience: Python/TCL preferred. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-MK1 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Job Title : FPGA Design Engineer Location : TSTS, Bengaluru Experience : Minimum 3 Years Duration : 6 Months to 1 Year (Extension/Retention based on performance) Employment Type : Contract (with potential for full-time based on performance) Job Description: TSTS is seeking an experienced FPGA Design Engineer for a project-based role at our Bengaluru office. The ideal candidate should have at least 3 years of hands-on experience in FPGA design and development, along with expertise in schematic design and Gerber file handling . The candidate will be responsible for end-to-end FPGA implementation and hardware integration. Key Responsibilities: Design, develop, and verify FPGA modules using VHDL/Verilog/SystemVerilog. Develop testbenches, perform simulation, and debug FPGA logic. Prepare and review schematic diagrams and generate/manage Gerber files . Interface FPGA with peripherals and microcontrollers/processors. Collaborate with the embedded systems and hardware design teams. Must-Have Skills: Minimum 3 years of FPGA development experience. Proficiency in VHDL/Verilog/SystemVerilog . Strong skills in schematic design and working with Gerber files . Good understanding of digital design, timing analysis, and constraint handling. Familiarity with interfaces such as UART, SPI, I2C, AXI, DDR , etc. Preferred Skills: Experience with Xilinx or Intel FPGA boards/platforms . Exposure to embedded C or interfacing with microcontrollers. Basic scripting in Tcl or Python . Educational Qualification: Bachelor’s or Master’s degree in Electronics / Electrical / Communication Engineering or a related field. Job Location: Bengaluru – Work from office Job Type: Contractual / Temporary Contract length: 12 months Pay: ₹500,000.00 - ₹1,000,000.00 per year Application Question(s): Are you interested in a contractual job? (This job is contractual but according to your performance will be converted to full time) Are you available immediately? What is your expected CTC? Experience: total: 3 years (Preferred) FPGA: 3 years (Preferred) Location: Bengalore, Karnataka (Preferred) Work Location: In person

Dear Candidate, We are hiring a Tcl Developer to build scripting solutions for automation, testing, and tool integrationespecially in EDA or network appliance domains. Key Responsibilities: Develop scripts and extensions using Tcl/Tk Automate test suites, hardware validation, or simulation environments Integrate with EDA tools, CI systems, or routers/switches Maintain internal tools and write documentation Collaborate with system engineers and QA teams Required Skills & Qualifications: Strong knowledge of Tcl/Tk scripting , GUI building, and tool automation Familiarity with Expect , Verilog simulators , or hardware flows Experience with UNIX/Linux environments Bonus: Background in networking or semiconductor industries Soft Skills: Strong troubleshooting and problem-solving skills. Ability to work independently and in a team. Excellent communication and documentation skills. Note: If interested, please share your updated resume and preferred time for a discussion. If shortlisted, our HR team will contact you. Kandi Srinivasa Reddy Delivery Manager Integra Technologies

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SILICON DESIGN ENGINEER 2 The Role As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs. As a member of the physical integration and verification team , you will work closely with the physical design implementation, IP teams and fab contacts to achieve quality tapeout and first pass silicon success. The Person A successful candidate will work on block level and SoC physical integration, verification and tapeout with physical design engineers. The candidate is expected to be detail-oriented, possessing good communication and problem-solving skills. Key Responsiblities Work with PD team on subsystem and block level physical verification and signoff Work closely with physical design implementation and signoff team to achieve faster TAT Work closely with CAD team to come up with new flows and methodologies in the physical verification domain Preferred Skillset 3+ years of relevant experience Sound knowledge of physical verification and design flows Hands on experience on industry standard tools such as Calibre and ICV Sound understanding for DRC/LVS decks. Should be able to make updates as required. Good in scripting languages such as Tcl and Perl Self driven, positive attitude and team worker Academic Credentials Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Highly motivated Test Pattern Environment Engineer to develop, maintain, and support the infrastructure used for test pattern generation, conversion, and deployment in silicon validation and ATE production environments. You will collaborate closely with design, DFT, validation, and ATE teams to ensure high-quality pattern delivery from pre-silicon to post-silicon stages. Key Responsibilities: Develop and maintain pattern conversion flows and automation scripts (e.g., STIL, WGL, VCD → ATE format). Manage pattern validation infrastructure: simulation-based checks, equivalency, and compare tools. Support pattern bring-up and debug on ATE platforms (e.g., Teradyne UltraFlex, Advantest 93K/Advantest T2000). Work with DFT teams to enable scan, LBIST, MBIST, and functional patterns in production test. Maintain version control and configuration management of pattern databases.Interface with post-silicon and product engineers for debug and pattern quality improvements. Automate pattern flow pipelines and regression checks using Python, Perl, or shell scripting. Document processes and best practices for cross-functional teams. Qualifications Required skills and Qualification: B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering. 7+ years of experience in test pattern environment, DFT, or ATE domains. Strong understanding of digital test patterns, scan chains, MBIST, and vector formats (STIL, WGL, VCD). Experience in using simulation tools (e.g., VCS, ModelSim) and waveform analysis. Familiarity with ATE pattern conversion tools and pattern delivery pipelines. Proficient in scripting languages: Python, Perl, TCL, or shell. Good understanding of semiconductor test flows and silicon lifecycle. Strong debugging and problem-solving skills. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our lifes work , to amplify human creativity and intelligence. As an NVIDIAN, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! NVIDIA is seeking passionate, highly motivated, and creative design engineers to be part of a team working on industry-leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What You'll Be Doing In this position, you will expected to develop and support flows & scripts based around industry standard PnR EDA tools Work in collaboration with PD team for addressing design challenges Help team members in debugging tool/flow related issues. Constantly look for improvement in RTL2GDS flow to improve PPA. Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. What We Need To See BE/BTECH/MTECH, or equivalent experience. 4+ years of experience in Physical Design. Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies. Good understanding of the RTL2GDSII concepts related to place & route, CTS, timing convergence, layout closure. Strong knowledge and experience in standard place and route flows ICC2/Synopsys and Innovus/Cadence flows preferred. Good automation skills in PERL, TCL, Python and tool specific scripting on one of the industry leading Place & Route tools. Ability to multi-task and flexibility to work in global environment. Good communication skills and strong motivation, Strong analytical & Problem solving skills. Widely considered to be one of the technology worlds most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/NVIDIA is committed to encouraging a diverse work environment and proud to be an equal opportunity employer. , , JR1995590,

At Synopsys, you are at the heart of the innovations that are changing the way people work and play. Technologies like self-driving cars, Artificial Intelligence, the cloud, 5G, and the Internet of Things are ushering in the Era of Smart Everything. Synopsys is powering these breakthroughs with the world's most advanced technologies for chip design and software security. If you share the passion for innovation, Synopsys is looking forward to meeting you. The Silicon Design & Verification business at Synopsys focuses on building high-performance silicon chips at a faster pace. As the world's leading provider of solutions for designing and verifying advanced silicon chips, we also design the next-generation processes and models necessary for manufacturing these chips. Our goal is to enable customers to optimize chips for power, cost, and performance, thereby reducing months from their project schedules. The Custom Design Solutions Team is an integral part of Synopsys EDA Group, collaborating with top-tier customers to implement high-quality Custom/Analog Design Solutions and Flows on the latest process nodes. The team engages in various aspects of design, including front-end, simulation, back-end, and verification flows, and encourages exploring different areas within the design spectrum. This role offers a platform to apply design knowledge and develop Custom Design solutions. As a Solutions Engineering, Principal Engineer, your responsibilities will include promoting the adoption of Synopsys Custom Design Platform among new customers through presentations and demos, understanding customer flow requirements and aligning them with features within the Synopsys Custom Design Platform, collaborating with R&D and Product Marketing to develop new flows and functionalities, defining Analog Design flows and methodologies to enhance customer productivity, developing custom scripts for specific customer features or quick solutions, and managing the customer relationship to ensure requirements are well-understood and features are developed as per customer needs. Job Requirements: - BE/MTech in Electrical/Electronics/Computer Engineering - 15+ years of experience in creating and supporting custom design flows using Custom Compiler or equivalent industry-standard tools - Hands-on experience in Analog design creation and coding medium-sized software solutions for custom design problems - Expertise in areas such as advanced custom layout flows for GAA, FinFET process, simulation environments, parasitic extraction techniques, mixed-signal design, memory design, automatic custom placement and routing - Proficiency in scripting/programming languages like TCL, Python, Perl, SKILL Join Synopsys to be a part of driving innovation in the semiconductor industry and contribute to the advancement of technology through cutting-edge custom design solutions.,

We are seeking an exceptional problem solver, algorithm designer, and C++ developer with a strong background in EDA tool development and deployment. If you have experience in Custom Design and Layout creation, that would be a significant advantage. In this role, you will collaborate with cross-functional teams to identify new requirements, propose solutions, gain consensus, and lead the implementation and deployment of those solutions. Your responsibilities will include hands-on work in designing, developing, and debugging software programs tailored to the solution. You will be responsible for: - Designing innovative solutions to address critical challenges in Custom Design and Layout fields, especially where solutions are currently lacking (e.g., new layout methodologies, leveraging analytics and machine learning in layout, etc.). - Collaborating on key layout automation projects developed and maintained by local colleagues. - Enhancing existing systems and offering solutions within Synopsys Custom products. - Engaging with corporate application engineers to grasp customer needs and deliver appropriate solutions. - Developing well-designed, well-tested, high-quality C++ programs. - Crafting design specifications and conducting code reviews for team members. Requirements: - Master's or Doctorate Degree in Computer Science or Electrical Engineering - Over 15 years of experience in: - Software development: C++, TCL, Python, Linux, build and revision control systems, specification writing/reviewing - Software design: data structures, algorithms, GUI and Interactive systems, event-driven systems - Domain knowledge: understanding of IC fabrication, CMOS circuit design, EDA flows - Solution deployment: communication, negotiation, and ownership Desired skills include expertise in: - EDA tools and flows - Circuit analysis, layout principles, semiconductor manufacturing - Advanced mathematics, statistics, and machine learning techniques - Strong communication skills for effective collaboration in diverse, multicultural teams Our Custom Design & Manufacturing division focuses on creating software solutions (tools, flows) for custom design, analog, and mixed-signal design. These custom products are extensively utilized by our IP team for all their products. We closely collaborate with signoff extraction, verification, and simulation teams to develop unique solutions for designing and verifying advanced silicon analog and mixed-signal designs. Additionally, we pioneer the development of next-generation processes and models required for manufacturing these chips. By optimizing chips for power, cost, and performance, we help our customers reduce project timelines significantly.,

About Company: Ceragon Networks (https://www.ceragon.com/about-ceragon/) is a company that develops innovative equipment used in wireless data transmission among other software and service solutions. Our systems are based on microwave technology and serve as a cost-effective alternative to fibre optics. About the role: Would you like to be part of a group that takes ideas and brings them to a full product To influence the entire product flow If you answered yes to these questions Your place is with us! Ceragon networks develops a complete product, from idea to field installation, while developing the entire technology internally ASIC, RF chip and FPGA. FPGAs are in every product, hence requires continuous development, both new designs and legacy. We are looking for FPGA engineer to Join Ceragon FPGA team in India, developing next generation backhaul communication systems. In this role you will be required to: All aspects of FPGA design activity: Coding, Synthesizing, mapping and timing closure, verification support and LAB bring up. Participate in FPGA architecture and design for current and next generation products, collaborate with other teams: SW, DV, QA, System etc Requirements: B.E/B Tech degree in Electronic & Communication or Equivalent 5+ years experience as an FPGA designer 5+ years experience with networking. Practical knowledge of RTL design, synthesis, timing closure, simulation and verification test benches. Hardware bring up and debug experience. Familiarity with high level programming languages like C/C++, System Verilog, Scripts (TCL, Python) advantage Excellent system understanding & strong analytical and problem solver abilities. Experience with UVM verification flow advantage. High motivation to excel in career.,

The Company A part of the Tata Group, Tata Communications is a global digital ecosystem enabler powering today’s fast-growing digital economy in more than 190 countries and territories. Leading with trust, it enables digital transformation of enterprises globally with collaboration and connected solutions, core and next gen connectivity, cloud hosting and security solutions and media services. 300 of the Fortune 500 companies are its customers and the company connects businesses to 80% of the world’s cloud giants. The Opportunity We are living in an era where technology is not just enhancing livelihoods but also fundamentally transforming businesses, communities, and lives globally. Tata Communications has been at the forefront of this movement — accelerating digital transformation for clients across the world, driving innovative business models, and enabling competitive advantages through resilience and collaboration. We’re on a mission to hire the best and are committed to be an equal opportunity organisation. We realize that new ideas can come from anywhere in the organization, and we know the next big idea could be yours! If you're ready to join a dynamic, forward-thinking team and make a tangible impact on our brand’s future, this is your chance! We’re looking for a highly analytical, creative, and passionate brand manager who can work across geographies to be a part of the brand team. Designated as Deputy General Manager – Brand Marketing (Global Marketing) Located in India Reports to Chief of Brand What You’ll Do: Be the Brand Champion: Define & Evolve : Take charge of developing and refining our brand's voice and positioning. Ensure it resonates with our stakeholders across customers, analysts, shareholders. Building, managing, and externally positioning brand communications strategies in partnership with the overall TCL Communications team and brand marketing function. Drive thought leadership and content development to advance brand narrative and awareness among key audiences and across geographies. Ensure brand's image, messaging, and positioning are consistent and effectively communicated across social media platforms. Oversee social media strategy, content creation, engagement, and analysis to build and maintain a strong brand presence online. Campaign Build : Lead the creation of compelling and innovative marketing campaigns that elevate our brand across all touchpoints—whether it’s digital, print, or experiential marketing. Customer Insights : Dive deep into consumer behaviour and market trends to guide and shape marketing strategies. Your understanding of the customer will drive everything we do. Drive Growth & Performance: Impactful Strategy : Develop customer insight drives campaigns to build a compelling and relevant campaign ROI Focused : Manage the marketing budget effectively, ensuring that every campaign maximizes ROI while staying true to brand values. Brand track Survey: Gather data through various track surveys to monitor brand health, track brand awareness, and make informed decisions about brand strategy & marketing campaigns. Collaborate & Lead: Multi agency liaison and internal stakeholder engagement are par for the course. Who We’re Looking For: You’re a Strategic Thinker: You thrive in creating long-term, big-picture strategies while also executing with precision. You have the ability to analyse data and turn it into actionable insights that drive brand growth. You’re Creative & Curious: Innovation is at your core. You’re always looking for ways to make the brand fresh, exciting, and relevant. You are not afraid to challenge the status quo and bring bold ideas to the table. You’ve Got Experience: Bachelor’s degree or equivalent experience in brand building, public relations, communications, journalism, brand consulting or marketing or related field 10+ years of communications experience working to develop, build, and grow overall brand presence and narrative. Exceptional writing/editing and storytelling skills. Strong media strategy skills. Consistent track record of successfully building brands across B2B brands Broad business understanding, strong analytical abilities and critical, creative problem solver. Experience managing cross-functional or cross-team projects Experience in developing and leading high impact social and content strategies and engaging communities. Drive and deliver outsized campaigns and engagements for key launch moments that activate the early adopter and developer community in a social-first way. You’re a Strong Communicator: Your storytelling skills are unmatched—whether you're presenting to senior leadership or working with cross-functional teams, your communication is clear, engaging, and persuasive and rooted in insights What We Offer: A global opportunity to work on a brand with deep global associations like Formula One A challenge that enables you to work with multi cultural teams and a global management team Tata Communications is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. Ready to Make Your Mark? If you’re a passionate, driven, and innovative Brand Manager looking to grow your career and take on exciting challenges, we want to hear from you.

Your Role and Responsibilities 1. Hands on work on custom layout for analog blocks like High Speed SerDes and General purpose IO designs with Cadence Virtuoso on latest technologies like 5nm and below and also take leadership roles in delivery of IPs 2. Work on Floor planning, power design, signal routing strategy, EMIR awareness andparasitic optimisations 3. Understand and apply analog Layout techniques to ensure the design meets performance with minimum possible area and good yield. 4. Participate in building and enhancing layout flow for faster, higher quality design process. 5. Checking physical verifications like DRC/LVS/ERC/ANT/DFM and other IBM internal checks 6. Collaborate with Circuit Designers to solve challenging problems 7. Writing /PYTHON scripts to automate repetitive tasks 8. Work with Place and Route engineer to integrate custom macros into top level. 9. Able to perform design reviews across global team 10. Work closely with required global teams to ensure the success of the whole product. 11. Leadership in delivery of macros we plan to own from India Job requirements: 1. Experience in doing layouts for analog blocks like SerDes, ADCs, DACs, LDOs, PLLs, BGAP & amplifiers etc. 2. Experience in designing layouts for high-speed circuits is a plus. 3. Layout experience in the following technology nodes3nm, 5nm and 7nm FinFET. 4. Good team worker with multi-discipline, multi-cultural and multi-site environments 5. Strong fundamental knowledge in semiconductor device physics, layout principles, IC reliability and failure mechanisms 6. Good problem-solving skills are essential where problems are analysed upfront, identifying gaps, and providing optimum solutions7. Knowledge in Skill/perl/tcl/Python scripting is a plus. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise The Analog layout design engineer with experience in next generation Ultra high speed serial IO link (HSS) interface for Cognitive, ML,DL, and data center applications. The engineer needs to have knowledge in the design and development full custom analog layouts for ultra high speed 32G/50G/112G IO link interfaces. Preferred technical and professional experience Experience in 7 and 14 nm analog layout design. Working on Cutting edge technology and HSS domain . Quick learner, deep layout design knowledge, problem solving skills and good communication skills with cross teams across the Geos.

Responsibilities Lead and manage a team of verification engineers, providing guidance, mentorship, and performance feedback. (20%) Ensure the definition and implementation of test and verification plans. (20%) Collaborate with design, architecture, and other cross-functional teams to ensure alignment on project goals and requirements.(10%) Monitor and analyse coverage reports to ensure thorough verification. (10%) Identify and resolve verification issues and bugs, ensuring timely project delivery. (10%) Continuously improve verification processes, methodologies, and tools. (10%) Manage project schedules, resources, and deliverables to meet deadlines. (10%) Oversee the writing and debugging of System Verilog assertion.(10%) Minimum Qualifications 8+ years of relevant experience in SOC verification. Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in RTL design verification and team management. Proficiency in System Verilog and assertion-based verification. Strong understanding of test and verification plan definition and implementation. Experience with coverage-driven verification and coverage report generation. Familiarity with industry-standard verification tools (e.g., VCS, Questa Sim). Experience with SoC design verification. Knowledge of HVL methodology (UVM/OVM) with the most recent experience in UVM. Experience with formal verification. Experience taping out large SoC systems with embedded processor cores. Hands-on verification experience of Bus Fabric, NOC, AMBA-AHB/AXI based bus architecture in a UVM environment. Knowledge of Low Power Verification. Excellent problem-solving skills and attention to detail. Desired Qualifications Experience in wireless SoC design and verification. Knowledge of scripting languages (e.g., TCL, Python, Perl) for automation. Familiarity with version control systems (e.g., Git).

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Job Description: Senior Staff Engineer We are looking for a technical leader to drive the DFT aspects of high-performance compute MCU development. The candidate must be experienced, hands-on and have robust understanding of testability features including SSN, MBIST, LBIST, Scan Insertion, ATPG, GLS and post silicon debug on automotive grade SOCs. Responsibilities Handling hierarchical scan insertion ATPG flow. Integration and Verification of MBIST at RTL level. RTL Integration, Verification, gate level Coverage and GLS enablement for LBIST. Implementation and Verification of IEEE1149.1 JTAG, IJTAG standards. Post silicon debug activities for DFT patterns. Collaboration with RTL design, Physical design and verification teams will be a daily aspect of the role. Qualifications Degree/PG in Electrical/Electronic Engineering, Computer Engineering or Computer Science. At least 12+ years of experience in related domains and have working knowledge of industry standard digital EDA toolkits. Must be conversant on EDA tools such Tessent, Genus, FC, VCS and Conformal/Formality etc. Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can–do attitude, openness to new environment, people and culture. Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus. Ability to work independently and as part of a team. Mentor and guide junior engineers in DFT. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

MTS Silicon Design Engineer Hyderabad, India Engineering 67041 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER THE ROLE: This exciting position as MTS in AMD's Silicon IP solutions & SOC group will provide the individual with an opportunity to demonstrate strong technical leadership across the design hierarchy from architecture to Productization. Join us in providing innovative IP solutions as we embark on our journey into the cutting edge programmable logic based silicon designs by delivering the complex IP Solutions for multiple market segments As part of this opportunity, we are seeking a Synthesis and Timing engineer to participate in the development of large SOC’s with multiple physical blocks and 300+ clock domains. This position requires an individual to be creative, team-oriented, technology savvy, able to lead large cross-functional teams, comfortable and willing to provide regular updates to management chain during the project execution THE PERSON: You have a passion for modern, complex hardware and IP architecture, digital design, and physical design in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency. Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Work with CAD on the development of pre-production synthesis (Design Compiler) and STA (Primetime) flows Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts) PREFERRED EXPERIENCE: About 6 to 10 years of relevant experience Worked with EDA tools that enable RTL quality checks Hands on experience in building the timing constraints for IPs, blocks and Full-chip implementation in both flat/hierarchical flows. Experience with analyzing the timing reports and identifying both the design and constraints related issues. Ability to multitask and grasp new flows/tools/ideas Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc Automating workflows in a distributed compute environment. Scripting language experience: Python/TCL preferred. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-MK1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Job Description: Staff Engineer We are looking for a technical leader to drive the DFT aspects of high-performance compute MCU development. The candidate must be experienced, hands-on and have robust understanding of testability features including SSN, MBIST, LBIST, Scan Insertion, ATPG, GLS and post silicon debug on automotive grade SOCs. Responsibilities Handling hierarchical scan insertion ATPG flow. Integration and Verification of MBIST at RTL level. RTL Integration, Verification, gate level Coverage and GLS enablement for LBIST. Implementation and Verification of IEEE1149.1 JTAG, IJTAG standards. Post silicon debug activities for DFT patterns. Collaboration with RTL design, Physical design and verification teams will be a daily aspect of the role. Qualifications Degree/PG in Electrical/Electronic Engineering, Computer Engineering or Computer Science. At least 8 years of experience in related domains and have working knowledge of industry standard digital EDA toolkits. Must be conversant on EDA tools such Tessent, Genus, FC, VCS and Conformal/Formality etc. Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can–do attitude, openness to new environment, people and culture. Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus. Ability to work independently and as part of a team. Mentor and guide junior engineers in DFT. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

T4S or T4ST, TCL Scripting and need Integration,• Design, configure, and implement T4ST integrations between Teamcenter and SAP for master data (Material, BOM, Document, etc.). T4x,TCL or JavaScript,SAP PLM integration and error handling.

Job Title: WLAN QA Experience Required: 3+ Years Location: Pune Employment Type: Full-Time About the Role: Good knowledge of Wi-Fi protocols and standards like 802.11a/b/g/n/ac/ax/e/w Good working knowledge on WLAN security like WPA2/WPA3. Enterprise security with different EAP types Good working knowledge on analysis tools like Omnipeek, Wireshark. Traffic tools like iperf and chariot. Tools and utilities like supplicant, hostapd, RADIUS Servers Good debugging skills and hands on with tools like TCPdump, logcat etc Good working experience with different operating systems like Linux, RTOS, Windows and Android. Experience in test plan writing, executing and finding functional/performance related bugs Experience in test bed Creation/Management, Baseline Test setup. Good understanding of Analog & Digital modulation and networking concepts. Good knowledge on scripting languages like python, TCL, perl. Strong written and verbal communications. Experience in documentation for corrective actions and analysis of issues. Knowledge on Regulatory & Wi-Fi Alliance certification will be additional asset.

Job Specs : We are seeking a highly skilled and motivated ASICVerification Engineer to join the offshore development teams of our group companies. You will work with the rapidly expanding team which focuses on the research and development of ASIC Verification IPs for Silicon Lifecycle Management, driving innovation and excellence in chip design and verification. You will work alongside a talented and dedicated group of engineers, all committed to pushing the boundaries of technology and delivering top-notch solutions to our customers. Work Location : Remote,Delhi NCR,Bengaluru,Chennai,Pune,Kolkata,Ahmedabad, Mumbai, Hyderabad Work Expertise: 7 Years 10 Years Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering. Expertise in ASIC SOC verification. Expertise in UVM, System Verilog and constrained random testing. Expertise in Gate Level Simulation tools (GLS) or verification related to display port or memory controller Expertise in testbench architecture and SOC-level verification strategies. Knowledge of scripting languages (Python, Perl, TCL) for automation. Good understanding of SoC architecture, including CPU subsystems, memory hierarchy, and peripherals. Preferred immediate hires only Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Job Specs : We are seeking a highly skilled and motivated ASIC Verification Engineer to join the offshore development teams of our group companies. You will work with the rapidly expanding team which focuses on the research and development of ASIC Verification IPs for Silicon Lifecycle Management, driving innovation and excellence in chip design and verification. You will work alongside a talented and dedicated group of engineers, all committed to pushing the boundaries of technology and delivering top-notch solutions to our customers. Work Location : Bangalore, Pune. Malaysia, Singapore Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering Visa / work permit sponsored for immediate hires Expertise in ASIC SOC verification Expertise in PCie Expertise in UVM, System Verilog and constrained random testing. Expertise in testbench architecture and SOC-level verification strategies. Expertise with protocols such as AXI, AHB, APB, USB, or DDR. Expertise with simulation tools like Synopsys VCS, Cadence Xcelium, or Mentor Questa. Familiar with waveform debugging tools such as Verdi or DVE. Working knowledge of low-power verification (UPF) and DFT / scan concepts. Knowledge of scripting languages (Python, Perl, TCL) for automation. Good understanding of SoC architecture, including CPU subsystems, memory hierarchy, and peripherals. Job Specs : Develop and maintain full-chip verification environments using SystemVerilog UVM methodology. Define and execute test plans for SoC-level functionality, power intent (UPF), coherency, performance and interconnect protocols (e.g., AXI/ACE). Work closely with the RTL, DV, and integration teams to ensure complete coverage of functional and architectural features. Implement and manage stimulus generators, scoreboards, monitors, and checkers at full-chip level. Perform debugging, waveform analysis, and triage of failures in RTL simulations. Ensure code coverage and functional coverage goals are met and signoff criteria are satisfied. Collaborate with firmware/software and post-silicon teams to align verification efforts and resolve issues. Participate in formal verification, assertion-based verification, and low-power simulations. Support regression testing, issue tracking, and coverage closure. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.