Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Roles and Responsibilities Work closely with CAD and custom macro/memory design leads to understand the design methodology and high level requirements and develop flows. Develop efficient analysis and model generation methodologies for timing and noise to achieve tight correlation. Determine key areas where automation and leading methodologies can help improve PPA. Define, innovate and implement new infrastructure capabilities that can be used to accelerate design and development, and improve user experience. Preferred qualifications MS degree in Computer Engineering; 5+ years of practical experience Strong skills in transistor level signoff tools for timing, emir, simulations, extraction and IPQA. Experience in flow development at high scale (multithreading, ml capabilities, hyperscaling, schedulers, filer hot-spot management etc.). Direct experience with efficient visualization tools to analyze results, log parsers, web views, error/warning scanners etc. Strong fundamentals in scripting languages (python, tcl, sh. others), automation, general purpose CAD infrastructure and flows. Good understanding of stdcell or memory design fundamentals. Excellent partner collaborating with design team in flow debug and support. Experience with signing off accuracy and correlation of analysis flows (compare to spice, foundry models, etc.) Tool knowledge in any of these is a plus- nanotime, xa/spectre, liberate, primelib, totem Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux- Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 1+ years Hardware Engineering experience or related work experience. 1+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Experience 2 to 4 years of experience Hands on experience with FPGA design toolsSynplify, Vivado, XILINX ISE, Work experience in FPGA based design implementation . FPGA RTL coding (Verilog/VHDL/System Verilog), FPGA constraint setup, verification, synthesis, Place and route and timing closure. Hands-on experience in WIFI/Ethernet/PCIe/USB/Multimedia/UFS/ARM CPU/DDR4/LPDDR5 emulation . Exposure/working experience in simulation acceleration emulation platforms like Veloce/PalladiumGate level simulation/emulation bring up Familiar with hardware schematics and Lab tools to debug. Work closely with RTL Design/Validation and Software teams for bug/issue debug, support and build bring up in emulation platform. Excellent teamwork, interpersonal and communication skills. Scripting/programming skill in C/C++, Tcl, Perl/Python/csh will be added advantage Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for. Responsibilities Responsibilities & Skills Inviting candidates with a passion for invention and self-challenge. This position gives you an opportunity to be a part of one of the most cutting edge and key projects that Lattice’s Silicon Engineering team has embarked upon to date. As part of our team, you will have the opportunity to contribute to verifying complex FPGAs. This team will allow you to integrate multiple sophisticated IP level Design and Verification (DV) environments, craft highly reusable best-in-class UVM TB, implement effective coverage driven and directed test cases, deploy new tools and implement methodologies to improve quality of tape-out readiness. By collaborating with other product development teams across Lattice, you can push the industry boundaries of what FPGA systems can do and improve the product experience for our customers across the world! You will be able to learn all aspects of a FPGA, different types of SOC architecture, many highspeed layered protocols, industry’s standard methodologies on low power architecture, best in class DV methodology, verification on accelerated platforms, FW-HW interactions, complexities of FPGA and SOC debug architecture, etc. You'll be at the center of the design verification effort within our silicon design SOC verification team responsible for crafting and productizing state-of-the-art FPGAs. This position requires someone comfortable will all areas of FPGA design verification engineering. Someone that thrives in a dynamic multi-functional organization and is not afraid to take on challenges and solve complex problems using state of the art verification methodologies. Required Skills BS/MS Electrical Engineering, Computer Science, Computer Systems Engineering, or equivalent degree. At least 8+ years DV experience out of which 3+ years as leading a complex IP verification. Proven track record of working full ASIC verification from concept to tape-out. Advanced knowledge of System Verilog and UVM methodology. Design realization for emulation platform like Palladium. Experience in usage of emulation platform for Sim-Acceleration and Pure-Emulation mode. Experience in usage of Adaptor/Speed-Bridges for emulation. Experience in debugging using emulation. Hands-on verification experience in verifying IPs using AMBA bus architecture in UVM environment. Experience in using programming languages such as C/C++, Perl/Python/Tcl for automatic the DV tasks. In-depth knowledge and experience working with low power design, UPF integration, boot-up, power-cycling, HW/FW interaction verification. Ability to create IP level module and sub-system verification plans, TBs, portable test benches, sequences, verification infrastructure. Develop UVM based highly reusable test benches and integrate complex multi-instance VIPs, sub-system test benches and verification suites at SOC level, and achieve targeted coverage. Work with design, architecture, SW, FW, and IP delivery teams to efficiently integrate and verify overall FPGA design. Should be a great team leader with excellent communication and problem-solving skills and the desire to seek diverse challenges. Show more Show less

This role involves the development and application of engineering practice and knowledge in designing, managing and improving the processes for Industrial operations, including procurement, supply chain and facilities engineering and maintenance of the facilities. Project and change management of industrial transformations are also included in this role. - Grade Specific Focus on Industrial Operations Engineering. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers. Skills (competencies)

Company Description Pushing the Edge VANTIVA, headquartered in Paris, France and formerly known as Technicolor, is a global technology leader in designing, developing and supplying innovative products and solutions that connect consumers around the world to the content and services they love – whether at home, at work or in other smart spaces. VANTIVA has also earned a solid reputation for optimizing supply chain performance by leveraging its decades-long expertise in high-precision manufacturing, logistics, fulfillment and distribution. With operations throughout the Americas, Asia Pacific and EMEA, VANTIVA is recognized as a strategic partner by leading firms across various vertical industries, including network service providers, software companies and video game creators for over 25 years. Our relationships with the film and entertainment industry goes back over 100 years by providing end-to-end solutions for our clients. VANTIVA is committed to the highest standards of corporate social responsibility and sustainability across all aspects of their operations. For more information, please visit www.vantiva.com and follow us on LinkedIn and Twitter. Job Description 3 - 4 years of experience in CPE testing, with a focus on functional testing Familiarity with Oops concept & Java programming knowledge | Selenium knowledge is strong plus. Basic understanding of networking technologies like, CMTS, OLT, 5G and DSLAM. Hands-on experience in WiFi, Ethernet and voice testing is a strong plus. Innate listening skills with attention to detail, Strong communication skills (written & verbal). Key Responsibilities Perform WIFI, Ethernet and voice testing, in the RDK-B or OpenWRT based firmware. Test and validate functionality of the broadband devices with the core components like CMTS/OLT/DSLAM/5G equipment. Work with CWMP suite of protocol for remote management and configuration of customer-premises equipment (CPE). Perform with ‘Intent to break’ approach in testing, Strong analytical skills with curiosity to triage/debug for root cause analysis/troubleshooting on issues uncovered, and intent work with the engineering team to resolve them. Stay updated with the latest industry trends and technologies to continuously improve testing methodologies. Qualifications Key Skills: Working knowledge/understanding in WiFi testing (all standard, preferably 802.11BE), DOCSIS or GPON/XGS-PON, TR-069 protocol, and Python/Java automation. Familiar with throughput testing of WLAN solution, specifically 802.11be with MLO technology Good understanding of OpenWRT, and RDK platforms. Familiarity in Easy Mesh R4,5,6 standards and hands on experience on testing various network topologies Familiar with TR69/USP, Routing, UPnP, Firewall, content sharing, NAT, TR398, TR181 Routing protocols will be an added advantage Hands on with any of the testing tools like STC, IXIA IP Performance testing, AirPcaP with Wireshark, ixCharoit, CD Router, Octoscope etc., Java Programming experience along with Scripting knowledge in either Selenium / Python for test automation. Good understanding of network testing procedures and methodologies. Additional Skills/Experiences Experience in Automatics or TCL programming is welcome advantage. Knowledge of networking protocols and concepts, including TCP/IP, Ethernet, and Wi-Fi standards. Additional Information Vantiva is an EOE/Veterans/Disabled/LGBT employer : Vantiva is proud to be an equal opportunity workplace. We will consider all qualified applicants for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other basis protected by applicable law. Our most important asset is our People Vantiva’s success greatly relies on our people’s energy, motivation, and talent. We are dedicated to cultivating a workforce that embraces and celebrates diversity as we believe our differences drive our creativity, and innovation. We are proactive in supporting equality and maintaining an inclusive work environment, developing, and enhancing career opportunities for all. If you require a reasonable accommodation at any step of the application process, please let us know by answering the dedicated question in this application form. Our most important asset is our People Vantiva’s success greatly relies on our people’s energy, motivation, and talent. We are dedicated to cultivating a workforce that embraces and celebrates diversity as we believe our differences drive our creativity, and innovation. We are proactive in supporting equality and maintaining an inclusive work environment, developing, and enhancing career opportunities for all. If you require a reasonable accommodation at any step of the application process, please let us know by answering the dedicated question in this application form. Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. Job Responsibilities & Technical Expertise Require Focus on quality of physical validation tool Pegasus by analyzing on existing functionality/regressions for customer deliverables and report failures in bug tracking system. Maintain regression tests with regular test cycles and integrate customer test cases as part of regression suites. Working closely with PE and R&D to develop test plan of new features and methodology for testing coverage improvement. Requirements Have three or more years of experience in VLSI back-end domain. Be expert in layout and physical verification concepts (DRC/FILL/LVS/PERC) Have solid working experience with UNIX and skilled in shell/perl/tcl/python scripting language. Good communication, strong solving skill and working as a team player. Strong knowledge of Cadence Virtuoso is a big plus. Education And Experience Requirements BS/MS degree with EE/CS background or Bachelor with 7+ developing and supporting physical verification activities. Behavioral Skills Required Must possess strong written, verbal and presentation skills. Good communication and interpersonal skills, demonstrate teamwork and collaboration skills. Ability to establish a close working relationship with both customer peers and management. Explore what’s possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity We’re doing work that matters. Help us solve what others can’t. Show more Show less

The HiLabs Story HiLabs is a leading provider of AI-powered solutions to clean dirty data, unlocking its hidden potential for healthcare transformation. HiLabs is committed to transforming the healthcare industry through innovation, collaboration, and a relentless focus on improving patient outcomes. HiLabs Team Multidisciplinary industry leaders Healthcare domain experts AI/ML and data science experts Professionals hailing from the worlds best universities, business schools, and engineering institutes including Harvard, Yale, Carnegie Mellon, Duke, Georgia Tech, Indian Institute of Management (IIM), and Indian Institute of Technology (IIT). Responsibilities Interpret business requirements, define technical alternatives, and participate in information gathering for interface requirements Develop, test, implement and document the technical solution to address the defined business requirements Develop and implement EDI HL7 and XML interfaces in accordance to Department Process/Standards Configuration and maintenance of Global Monitor and Security Work with other team members to define effort estimates, timetables, and project plans Participate with the development team and IT staff as appropriate in the design of solutions Educates and directly interacts with stakeholders to help them understand the benefits and limitations of their specific EMR/LIS-Interface during implementation Collaborate with other technical areas to integrate across tiers, platforms, and Responsibilities Ensure that expected application performance levels are achieved Plans and conducts module and basic integration testing Manage technical aspects of application to ensure timely and effective implementations Understand and comply to Project Life Cycle Methodology in all planning steps Responsible for multiple implementations or conversion projects Provides direct interaction with client and client’s vendor Designs and oversees interface implementation project plan Desired Profile Bachelor’s degree in appropriate discipline is preferred Cloverleaf Level 2 Certified 5 or more years of relevant experience is considered an experienced and seasoned professional Extensive experience with Cloverleaf Integration Services Experience building CCDA, VRL, HL7v2 ,HL7 FHIR (JSON) interface in CL 19.*v and beyond Knowledge on HL7 standards (v2,CDA, FHIR) Experience with VM-based Unix/Linux platforms Experience with data formats including HL7, XML, JSON Knowledge of scripting languages including TCL, TDOM programming, Java, JavaScript, experience in building webservice, Restful API interfaces Knowledge of Clinical integrations Experience working on Cloverleaf Consolidator (ICC) Tool Strong experience with a commercial Integration Engine Product (i.e., Cloverleaf) Experience using Jira Experience with HIE and integration platforms used within the health services industry (e.g., InterSystems, Medicity, Orion, etc.) Relevant experience in a healthcare setting working with the following HL7 transaction sets: ADT, VXU, ORM, MDM, SIU Familiarity with relational & non-relational databases such as MySQL, Postgres, Oracle, SQL Server, Mongo DB, Cassandra, IRIS/Caché Experience working in Agile development team Experience with SFTP is preferred CCPA disclosure notice - https://www.hilabs.com/privacy HiLabs Total Rewards Competitive Salary, Accelerated Incentive Policies, H1B sponsorship, Comprehensive benefits package that includes ESOPs, financial contribution for your ongoing professional and personal development, medical coverage for you and your loved ones, 401k, PTOs & a collaborative working environment, Smart mentorship, and highly qualified multidisciplinary, incredibly talented professionals from highly renowned and accredited medical schools, business schools, and engineering institutes. CCPA disclosure notice - https://www.hilabs.com/privacy Show more Show less

Description The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. At Amazon, DFT (Design-for-Testability) is a multi-faceted job that involves architecture definition, logic design, verification, test patterns generation, chip bring-up and more. As a DFT Engineer, you will impact and see the device through its entire lifecycle, from definition stage to high volume production. You will be working in close collaboration with multiple VLSI engineering groups including design, verification, backend, test, reliability and more. As part of the chip design group, you will: - Contribute to the design and verification of DFT logic and components Help to drive the sign-off on a generation of high-quality test and debug patterns for high coverage on silicon Review sign-off level timing closure using static timing analysis of DFT modes Perform wafer probe testing, ATE testing, silicon bring-up, diagnosis and support for physical failure analysis Take high volume chips to production with high coverage ATE test program Basic Qualifications BS degree in Computer Engineering/Electrical Engineering 5+ years in semiconductor companies as a DFT lead/manager Chip design experience in Verilog and System Verilog Chip verification experience, UVM methodology Scan insertion tools and methodologies MBIST and BISR, BIHR insertion tools and methodologies EFUSE controllers and related structures Top level DFT architecture definition experience Gate-level simulations Static timing analysis, DFT related timing closure Scripting (Perl/Tcl) Preferred Qualifications MS or PhD degree in Computer Engineering/Electrical Engineering or related field Excellent communication skills. Should be able to well communicate and establish relations with internal “customers”, Manufacturing, and equipment vendors Energetic, self-motivated Pro-active, oriented on execution Attentive to details and quality Team player, with the ability to work in a rapidly evolving/changing environment Ability to work well with overseas partners Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. Company - ADCI - BLR 14 SEZ Job ID: A2871927 Show more Show less

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more efficiently. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Veloce Hycon empowers System-on-Chip (SoC) developers to achieve first-pass silicon success, streamlining the development process. It offers an outstanding hybrid solution that seamlessly integrates virtual models and user Register Transfer Level (RTL) for comprehensive pre-silicon validation. Users can rapidly boot Linux and Android on the hybrid platform to run benchmarks and critical workloads well before silicon availability and gain valuable insights into software performance and functionality, allowing for early optimization and bug detection. Users can switch from virtual to pure RTL modes on the fly, focusing on specific system components that require more accurate hardware emulation for detailed calibration. Reference platforms are part of the product that let the user get started out of box. This role is based in Hyderabad. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. Responsibilities for this role include: Develop functionally accurate SystemC/TLM software models for CPUs (ARM and RISC-V architectures) and other Hardware devices that can be used to compose Virtual Platforms. Verify the models functionality versus behavior model and/or RTL using SystemC and/or UVM/SystemVerilog and apply unit testing/debug and implement the test plan. Build Virtual Platform for Hardware designs on the System Level. Load/Boot Linux/Mentor Embedded Linux (MEL)/ Android on the Virtual Platform. Simulate and Debug Customer’s Software on the Virtual Platform Write professional Functional Specs and Design Documents. We don’t need hard workers, just super minds! Bachelor, Master, or Ph.D. degree or equivalent experience in Computer or Electrical Engineering with minimum 2-8 years of experience and Very Good with honors degree. Strong experience in C/C++ Programming and in Embedded Linux Development. We need someone with the basic knowledge of digital circuits and digital design/systems and having good background in programming using SystemC is a plus. We are looking for someone who has good experience in using Linux/Unix OS and experience in scripting/scripting languages such as Make/Tcl/Perl. Position requires well developed written and oral communication skills. Also, being able to work with tight deadlines and meet schedules. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the every day and Accelerate transformation . Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles Synthesis, Static Timing Analysis and LEC of SoC/Cores Full chip and block level timing closure, IO budgeting for blocks Logical equivalence check between RTL to Netlist and Netlist to Netlist Knowledge of low-power techniques including clock gating, power gating and MV designs ECO timing flow Proficient in scripting languages (TCL and Perl). Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 1-5 yrs of experience Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3063980 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Job Description Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles Synthesis, Static Timing Analysis and LEC of SoC/Cores Full chip and block level timing closure, IO budgeting for blocks Logical equivalence check between RTL to Netlist and Netlist to Netlist Knowledge of low-power techniques including clock gating, power gating and MV designs ECO timing flow Proficient in scripting languages (TCL and Perl). Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 4+ yrs of experience Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3073153 Show more Show less

Role Description Role Proficiency: Provide leadership to a project with appropriate technical options and well suited design standards for embedded system product development system level validation and performance optimization strategies. Outcomes Design develop and implement system level specifications. Develop highly optimized secured code debugging integrating firmware/ applications and development level testing of complex SW/HW systems. Work directly with IP owners product (HW & SW) architects for design and debugging as per the project needs. Prepare Release Notes and participate in release strategies. Mentor lead and manage Developers I II III – Embedded Software Engineers based on project needs Identify and recommend appropriate tools (SW & HW) for the project. Developing utilizing various debug validation tools and/or methodologies to implement Development and validation plans Create share best practices and lessons learned with the team. Optimises efficiency cost and quality. Influence and improve customer satisfaction Set FAST goals for self/team and also provide feedback to FAST goals of team members Measures Of Outcomes Adherence to embedded design process and standards Quick turnaround on multiple alternative solutions determining the most suitable Number of technical issues uncovered during the execution of the project Number of review feedback post Software Lead II review based on project SLA Number of design and test defects post-delivery based on project SLA Quick turnaround on defect fixing for design and tests based on project SLA Adherence to testing methodologies and compliance process Adherence to project schedule / timelines Deploy Innovation techniques and publish white paper Team management and productivity improvement as per Project SLA. Requirement Outputs Expected: Lead requirement engineering; collaboration with internal and external customers to understand their needs Design Embedded design architecture/LLD and linking to requirements Develop Design the embedded SW and code as per design patterns coding standards templates and checklists. Develop automated tools or scripts for the validation environment. Test Analysis and testing of prototypes validate the designed software document the analysis and test results Document Create documentation for one's own work and contribute to creation of design HLD LLD/architecture for component/system software/ application diagnostics and test results Status Reporting Report status of tasks assigned; comply with project related reporting standards/process Quality Lead design reviews add value take responsibility for the design and overall quality of the embedded software Release Adhere to release management process for circuit simulation design schematics board files Compliance Adhere to embedded software design regulatory and test compliance Estimate Estimate time effort resource dependence for one's own work and for projects' work. Accurately define and document the technical side of the project schedule with estimates and identified risks Interface With Customer Clarify requirements and provide guidance to development team. Present design options to customers and conduct product demos Manage Project Manage delivery of embedded software and manage requirement understanding and effort estimation. Manage Team Set FAST goals and provide feedback. Understand aspirations of team members and provide guidance opportunities etc. Ensure team is engaged in project Manage Defects Perform defect RCA and mitigation. Identify defect trends and take proactive measures to improve quality Manage Knowledge Consume project related documents and specifications. Review the reusable documents created by the team Skill Examples Ability to create Embedded C Program Development for system level. Capability in creating and executing one or more of the following domains: Storage/connectivity/Media/graphics/boot/clusters/infotainment/ADAS Ability to do C++ programming (OOP) Assembly programming skills Ability to handle OS Scheduler Pre-emptive Round robin & Cooperative scheduling related work Ability to handle SW development in area of CAN Diagnostics Vehicle Functions etc. Aptitude in Networking protocols such as CAN LIN etc Ability to select right IoT & IO protocols as per problem statement. Ability to do Unit Testing (Tessy & RTRT) using appropriate Integration Testing Tools Ability to define and execute test cases with techniques (White Box and Black box) Ability in Closed loop LabCar INCA or similar tools Capacity to configure GDT framework. Ability to adhere to software quality standards (MISRA PCLINT QAC). Ability to debug using embedded tools Ability to do automation and configure Simulation Tools. Proactively ask for and offer help Ability to work under pressure determine dependencies risks facilitate planning and handle multiple tasks. Build confidence with customers by meeting deliverables in time with quality. Estimate effort time resources required for developing / debugging features / components Make decisions on appropriate of the Software / Hardware’s. Strong analytical and problem-solving abilities Knowledge Examples Knowledge on product development lifecycle Testing methodology and standards (Water Fall/ Agile) Knowledge in Test Automation scripting languages (e.g. Python Perl TCL) Knowledge with Wired (USB Ethernet PLC SCADA etherCAT Modbus RSxxx & Wireless technologies like NFC Bluetooth Wi-fi Zigbee etc. is a plus Understanding of automation frameworks (e.g. Hudson/Jenkin) Knowledge and knowhow on Diesel and Gasoline Engine Management Systems Knowledge of embedded algorithm integration on platform (Windows Linux and Android) Comprehension of ASPICE & ISO26262 process Knowledge in Pre-Silicon Verification environments for simulation and Emulation/FPGA platform Experience with System Verilog IP/Subsystem and SOC development environment Knowledge of MISRA 2004 and 2012 Coding guidelines (PC-lint LDRA & PRQA) Knowledge of CAN Tools: CANoe CANalyser & CAPL programming Knowledge of GDT framework internals Additional Comments Proficient in Embedded C - Good understanding on embedded systems and experience in complex device drivers - Automotive experience is preferred - Good understanding on SDLC – V model and Agile - Hands on in IBM tools like DOORS, ClearCase etc - Hands on in Architectural design using tools like Enterprise architect (EA) - Good communication and team handling skills - Local candidates preferred Skills Sdlc,V Model,Agile Show more Show less

Development and maintenance of PDK's with focus on physical verification rule decks Job Description In your new role you will: Develop/maintain DRC, LVS, RCX, Latchup rule decks and develop QA to meet high quality standards Develop new Pcell's (symbol/layout) or enhance existing Pcell's Work closely with the Design Teams, Technology Teams, and Fab groups to understand specifications and requirements Work closely with Technology department and Fab to define design rules and translate them into an accurate Calibre DRC and LVS rule decks Meet timelines and provide innovative solutions to achieve high level of satisfaction among PDK users Address change requests from the Device Design and Device Characterization groups in a consistent and effective way Demonstrate strong teamwork, communication skills and work ethics Respond effectively to design center/teams requests in a timely and consistent manner Develop and maintain component tests Your Profile You are best equipped for this task if you have: Familiar with full-custom and semi-custom design flows/design concepts Minimum 5+ years of relavent experience Expertise in developing PDK components – PV rule decks , Device libraries and techfiles Expertise in EDA tools (Calibre, Virtuoso, QRC) and their interfaces with PDK’s Strong background in semiconductor device physics Strong layout and design verification experience including but not limited to Calibre: DRC, LVS, PERC, Assura QRC Good understanding of IC fabrication process and IC Design Process Good understanding of electronic circuits, layout techniques, Pcell usage and physical verification Expertise in programming/scripting languages w.r.t PDK development and QA Python, Perl, TCL, Cadence SKILL, Ruby Hands on experience with Configuration, Release and Build Management Exposure to issue tracking tools (JIRA) is a definite plus Exposure to formal QA procedures will be an added advantage Experience with MS-Office, ideally basic knowledge in working on UNIX/Linux platforms Excellent programming skills with computational thinking Proactive with good communication (assertive) and interpersonal skills Avid programmer with excellent debugging skills to diagnose and devise workarounds for PDK/flow/design issues Contact: Gowri Shenoy, LinkedIn #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon. Show more Show less

Applications Engineer position offers a wonderful opportunity to work on most challenging technical problems in verification domain and innovative technologies under Synopsys Verification Platform. Looking for an experienced and motivated professional who enjoys problem solving, open to continuous learning, passionate to work on cutting edge technologies and has excellent communication skills. It gives exposure to the breadth of HDL/HVL, methodologies, static and formal verification, dynamic simulation aspects including debug and experience in working in a diverse environment where interaction with domain experts across global locations will be involved. Key Requirements Experience: Bachelor’s degree in Electronics with 7+ Years’ or Master’s degree in Electronics with 5+ Years' Experience in verification technologies (Simulation, UVM, SVA, LRM understanding) Strong HDL language support (Verilog, VHDL, System Verilog) Simulation, UVM, Design Verification Digital design fundamental and RTL coding understanding Good Debugging skills. Scripting – Perl, TCL, Make, Shell Scripting. Role - VCS Simulation Technology Product Engineer Solid fundamentals in Digital design, HDLs (Verilog/VHDL) and System Verilog Exposure to Synopsys EDA tools (SpyGlass, VC SpyGlass, Verdi) would be added advantage Excellent written and oral communication skills is a must as the role requires interfacing global teams, proposing solutions Must have working knowledge on UNIX, TCL and/or any other scripting language to be effective Team player, partners with multiple stakeholders, has attention to detail and innovative mindset Motivated, doer and self-organized team worker with good social communication skills Open to travel, ability to multi-task, be detail-oriented Drive VCS/related technology customer deployment working closely with field and R&D Drive competitive engagements, requirements gathering for delivery strong product roadmap Work directly with R&D, Product Validation & Customers to suggest improvements in implementation and validation Use in-depth product understanding to provide technical expertise, diagnose, troubleshoot issues At Synopsys, we’re at the heart of the innovations that positively impact the world. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you echo our passion for innovation, we want to meet you. Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. JR61254 Staff Design Engineer Responsibilities Will Include, But Are Not Limited To Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality Driving innovation into the future Memory generations within a dynamic work environment As a Memory Design Engineer in our DRAM and Emerging memory Group (DEG) at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. This includes simulating, optimizing and floor planning DRAM circuits. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. Successful Candidates For This Position Will Have Extensive knowledge of CMOS Circuit Design and Device Physics Knowledge and experience in Finesim and/or Hspice Experience with power network analysis. Extensive knowledge in verilog modeling and simulation tools Extensive knowledge of state machine logic/design verification techniques Excellent problem-solving and analytical skills A self-motivated, enthusiastic team player who enjoys working with others Good communication skills with the ability to convey complex technical concepts to other design and verification peers in verbal and written form Experience with a scripting language (Python, Tcl, Perl, etc) Familiarity with memory design is a big plus Qualifications Bachelors or Post Graduate Degree with 8+ years experience in Electronics Engineering or related engineering field All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_in@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced Layout Design Engineer with a strong background in Analog and Mixed Signal Circuit Layout. You thrive in a dynamic environment where you can apply your in-depth knowledge of semiconductor device physics, CMOS and FINFET technologies, and EDA tools. Your meticulous attention to detail and problem-solving skills enable you to troubleshoot and resolve physical verification issues effectively. You are a proactive learner, eager to explore new layout techniques, and possess excellent communication skills to collaborate seamlessly with cross-functional teams. With a minimum of 3 years of relevant experience, you are ready to take on new challenges and contribute to delivering high-quality layout designs on time. What You’ll Be Doing: Design and development of Transistor level analog and mixed signal layout. Device/block level floorplan, placement, routing, and physical verification. Troubleshoot Physical verification issues to get clean and desired results. Create and review layout documents to ensure they meet quality standards and are delivered on time. Collaborate with cross-functional teams to optimize layout designs for performance and manufacturability. Stay updated with the latest industry trends and advancements in layout design techniques. The Impact You Will Have: Ensure the delivery of high-quality and reliable layout designs that meet project timelines. Contribute to the development of cutting-edge technologies in chip design and verification. Enhance the performance and efficiency of analog and mixed signal circuits through meticulous layout design. Play a key role in troubleshooting and resolving physical verification issues, ensuring clean and desired results. Collaborate with cross-functional teams to drive innovation and continuous improvement in layout design processes. Help maintain Synopsys' reputation as a leader in the semiconductor industry through high-quality layout design contributions. What You’ll Need: Bachelor's or master's degree in Electrical Engineering or a related field. Minimum of 3 years of experience in Analog and Mixed Signal Circuit Layout. Expertise in Analog Layout Flow from Device placement till GDS release. In-depth knowledge of semiconductor device physics, analog circuits, and CMOS/FINFET technologies. Proficiency in EDA tools for Custom Mixed signal layout flows. Strong understanding of CMOS Fabrication technology, deep sub-micron effects, and their impact on layout. Knowledge of EMIR, ESD, LUP, Cross talk, Shielding, and their impact on design. Experience in Tcl is a plus. Who You Are: A proactive and self-directed individual with a passion for learning and exploring new layout techniques. Detail-oriented with excellent problem-solving skills. Strong communicator with the ability to collaborate effectively with cross-functional teams. Adaptable and able to thrive in a fast-paced, dynamic environment. Committed to delivering high-quality work and meeting project deadlines. The Team You’ll Be A Part Of: You will be part of a highly skilled and collaborative team dedicated to designing and developing high-performance analog and mixed signal layouts. The team focuses on innovation, continuous improvement, and delivering exceptional results. You will work closely with other layout designers, circuit designers, and verification engineers to ensure the successful delivery of projects. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Show more Show less

In this Role, you will be accountable for: Design and development of Transistor level analog and mixed signal layout. Device level floorplan, placement, routing, and physical verification. Troubleshoot Physical verification issues to get clean and desired results. In charge of creating and reviewing layout documents to ensure they meet quality standards and are delivered on time. Job Requirements: Candidate must have a bachelor's or master's degree and a minimum 5 years of experience in Analog and Mixed Signal Circuit Layout. Experience in Analog Layout Flow from Device placement till GDS release. Should be able to do planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Sound knowledge in Electrical and Electronic fundamentals. Solid Knowledge in Semiconductor device physics, good knowledge of CMOS, FINFET technologies. Knowledge of CMOS Fabrication technology and deep sub-micron effects and its impact on layout. Must know the Electro migration and other Reliability Concepts, ESD/LUP concepts and apply to layout. Hands on knowledge in EDA tools for Custom Mixed signal layout flows. Passionate to learn and explore new techniques. Must be self-directed, detail oriented with good problem-solving skills and communication skills. Effectively communicating with cross-functional team for successful project execution. Experience in Tcl is a plus . Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled R&D Staff Engineer passionate about pushing the boundaries of static low power verification products. With 5 to 8 years of experience in software engineering, you have honed your expertise in C/C++ and possess a robust understanding of data structures and algorithms. Your background in Electronic Design Automation (EDA) tools and methodologies, coupled with your knowledge of Verilog, SystemVerilog, and VHDL, positions you as a leader in your field. You are a proactive problem-solver with a keen eye for detail, and you thrive in collaborative environments where you can lead and inspire a team. Your self-motivation and discipline drive you to set and achieve personal goals consistently, and your commitment to quality ensures that your contributions make a significant impact. Based in Noida or Bangalore, you are ready to take on new challenges and help shape the future of technology. What You’ll Be Doing: Designing and developing state-of-the-art EDA tools with innovative algorithms. Collaborating with local and remote teams to ensure seamless integration and execution. Working directly with customers to understand requirements, provide online debugging, and track delivery and execution. Leading a small team of 2-3 members, guiding them through technical challenges and project milestones. Contributing to the continuous improvement of our static low power verification product. Exploring new architectures and leading the charge in developing cutting-edge solutions. The Impact You Will Have: Driving the development of advanced EDA tools, contributing to the efficiency and effectiveness of chip design. Enhancing the quality and reliability of our static low power verification product. Providing critical support to customers, ensuring their needs are met and fostering long-term relationships. Leading and mentoring junior engineers, fostering a culture of innovation and excellence within the team. Contributing to Synopsys' reputation as a leader in the semiconductor and EDA industries. Playing a pivotal role in the successful execution of projects, meeting deadlines, and exceeding expectations. What You’ll Need: Fluency in C/C++ with a strong background in data structures and algorithms. Experience with UPF and familiarity with Tcl and Python-based development on Unix (preferred). Knowledge of Verilog, SystemVerilog, and VHDL HDL (preferred). Experience with production code development on Unix/Linux platforms. Ability to develop new architectures and demonstrate strong leadership skills. Who You Are: You are a dynamic and innovative engineer with a passion for technology and a commitment to quality. You possess excellent problem-solving skills and the ability to think critically and creatively. As a self-motivated individual, you set personal goals and work diligently to achieve them. Your leadership skills enable you to guide and inspire your team, fostering a collaborative and productive work environment. You are detail-oriented, ensuring that your work meets the highest standards of quality and reliability. Your experience in EDA tools and methodologies, coupled with your knowledge of hardware description languages, positions you as a valuable asset to our team. The Team You’ll Be A Part Of: You will be part of the Static Verification team, a group of talented engineers dedicated to developing and enhancing our static low power verification products. This team collaborates closely with other departments, including design, development, and customer support, to ensure seamless integration and execution. Together, you will work on cutting-edge projects that push the boundaries of technology and contribute to the success of Synopsys and its customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: Senior Verification Engineer, IP Verification Specialist, RTL Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated professional with a passion for design verification in the semiconductor industry. With a solid foundation in Electrical/Electronic Engineering, Computer Engineering, or Computer Science, you possess 4 to 8 years of hands-on experience in IP/SOC verification domains. Your expertise in industry-standard EDA tools, fault injection methods, and diagnostic coverage techniques sets you apart. You excel in creating test environments from functional specifications using methodologies like UVM/VMM/OVM and are proficient in advanced languages such as Verilog and System Verilog. Your strong analytical skills enable you to identify safety gaps in designs, ensuring robust and reliable IP cores. As an excellent communicator, you collaborate effectively with international teams, driving innovation and achieving project milestones. Your ability to work independently, precisely, and generate quality documentation makes you a valuable asset to our team. Experience with ISO26262 developments, fault injection, and scripting languages like Perl, TCL, or Python would be highly advantageous. What You’ll Be Doing: Developing design verification solutions for RTL-based IP Cores implementing complex protocols. Collaborating with architects, designers, and verification team members across multiple international sites. Performing fault injection on IP/SOC RTL designs to identify and address safety gaps using FMEDA data. Creating and running test environments from functional specifications using UVM/VMM/OVM methodologies. Analyzing fault lists and developing test cases for fault injection to achieve diagnostic coverage. Debugging designs in simulation and providing verification solutions for productivity, performance, and throughput improvement. The Impact You Will Have: Ensuring the reliability and safety of IP Cores used in automotive end-customer applications. Contributing to the development of high-performance silicon chips that drive innovation in the semiconductor industry. Enhancing the diagnostic coverage and safety standards of our IP designs. Improving the overall efficiency and performance of our verification processes. Collaborating with global teams to achieve project milestones and deliver high-quality IP solutions. Driving continuous technological innovation in the verification domain. What You’ll Need: Degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. 4 to 8 years of experience in IP/SOC verification domains. Hands-on knowledge of fault injection methods and diagnostic coverage techniques. Proficiency in Verilog, System Verilog, and debugging designs in simulation. Experience with UVM/VMM/OVM methodologies and creating test environments from functional specifications. Who You Are: An independent and precise worker with a drive for innovation. An excellent communicator with strong documentation skills. A collaborative team player who excels in problem-solving. Ideally experienced in ISO26262 developments and fault injection. Knowledgeable in C/C++, Shell, and scripting languages like Perl, TCL, or Python. The Team You’ll Be A Part Of: You will be part of the IP Group at Synopsys, working with a talented team of architects, designers, and verification engineers across multiple international sites. Our team focuses on developing robust and reliable IP Cores for automotive applications, driving innovation and ensuring the highest standards of safety and performance. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: Senior Verification Engineer IP Verification Specialist RTL Verification Expert We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and experienced verification engineer with a keen eye for detail and a knack for problem-solving. With a strong background in Electrical/Electronic Engineering, Computer Engineering, or Computer Science, you bring 4 to 8 years of hands-on experience in IP/SOC verification domains. Your advanced knowledge of Verilog and System Verilog, coupled with your proficiency in debugging designs in simulation, makes you an ideal candidate for this role. You have a proven track record of creating test environments from functional specifications using UVM/VMM/OVM, test planning, coverage closure, and assertion-based verifications. Your expertise in protocols like UCIe, PCIE, AMBA, and memory controllers, along with your ability to provide verification solutions for productivity, performance, and throughput improvement, sets you apart. You are a collaborative team player with excellent communication skills, capable of generating quality documentation and interacting effectively with R&D teams. Your experience with JAMA/Doors or similar tools, along with your knowledge of C/C++, shell scripting, and programming languages like Perl, TCL, or Python, adds to your versatility. Ideally, you have experience working on ISO26262 developments, and any fault injection experience would be highly advantageous. What You’ll Be Doing: Developing design verification solutions for RTL-based IP cores implementing complex protocols. Working with an internationally based team of architects, designers, and verification team members across multiple sites worldwide. Creating test environments from functional specifications using UVM/VMM/OVM. Planning and executing tests, ensuring coverage closure and assertion-based verifications. Debugging designs in simulation to ensure high-quality IP cores. Generating quality documentation and collaborating with R&D teams to achieve project milestones. The Impact You Will Have: Enhancing the reliability and performance of IP cores used in automotive end-customer applications. Driving innovation and ensuring the highest standards of verification for complex protocols. Contributing to the success of Synopsys' IP Group by delivering high-quality verification solutions. Collaborating with global teams to streamline verification processes and improve productivity. Ensuring compliance with industry standards and customer requirements. Supporting the development of cutting-edge technology that shapes the future of the semiconductor industry. What You’ll Need: Degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. 4 to 8 years of experience in IP/SOC verification domains. Advanced knowledge of Verilog and System Verilog. Experience with debugging designs in simulation. Hands-on experience in creating test environments from functional specifications using UVM/VMM/OVM, test planning, coverage closure, and assertion-based verifications. Knowledge of protocols like UCIe, PCIE, AMBA, memory, and memory controllers. Ability to provide verification solutions for productivity, performance, and throughput improvement. Working knowledge of JAMA/Doors or similar tools. Experience with C/C++, shell scripting, and programming languages like Perl, TCL, or Python. Who You Are: You are a detail-oriented professional with excellent problem-solving skills, capable of working independently and driving innovation. You are a collaborative team player with strong communication skills, able to interact effectively with R&D teams and generate quality documentation. You are adaptable and versatile, with a passion for continuous learning and growth. Your experience with ISO26262 developments and fault injection, coupled with your knowledge of C/C++, shell scripting, and programming languages, adds to your expertise and makes you a valuable asset to the team. The Team You’ll Be A Part Of: You will be part of the IP Group at Synopsys, a dynamic and innovative team responsible for the development of design verification solutions for IP cores used in automotive end-customer applications. Collaborating with architects, designers, and verification team members across multiple sites worldwide, you will play a crucial role in ensuring the highest standards of verification for complex protocols. This is a Senior Technical Individual Contributor role that offers challenges and opportunities for growth in the verification domain. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

3+ YOE Python Scripting & Python for Data processing Scripting proficiency using programming languages such as Python, Ruby, or TCL. Compiled programming knowledge with languages such as C++ or C. Semiconductor process technology understanding particularly layout design rules, tech files, and Custom and/or ASIC EDA design tools. Version control systems such as git. Working knowledge of UNIX/Linux environment Show more Show less

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. As CPU Physical Design CAD engineer, you will build and support the world"™s best implementation tools and flows. Your tools and flows will ensure our custom CPUs have industry-leading power, performance and area. Roles and Responsibilities Develop, integrate and release new features in our high-performance place-and-route CAD flow Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area Maintain, support and debug implementation flows, and resolve project-specific issues Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA. Work with EDA vendors to define roadmap and to resolve tool issues Preferred Qualifications: Bachelors/Masters degree in Electrical/Electronics Engineering or Computer Science Ten+ years of hands-on experience in place-and-route of high-performance chips - either in a design or CAD role High level of proficiency in Tcl as well as Python Experience with automation Experience with a wide variety of Physical Design tasks - ranging all the way from place-and-route, analysis, timing sign-off and PDV Experience with advanced technology nodes (5nm or lower) Solid understanding of digital design, timing analysis and physical verification Strong user of industry-standard place-and-route tools such as Cadence Innovus Proven track record of managing and regressing place-and-route flows

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. As CPU Physical Design CAD engineer, you will build and support the world"™s best implementation tools and flows. Your tools and flows will ensure our custom CPUs have industry-leading power, performance and area. Roles and Responsibilities Develop, integrate and release new features in our high-performance place-and-route CAD flow Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area Maintain, support and debug implementation flows, and resolve project-specific issues Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA. Work with EDA vendors to define roadmap and to resolve tool issues Preferred Qualifications: Bachelors/Masters degree in Electrical/Electronics Engineering or Computer Science Ten+ years of hands-on experience in place-and-route of high-performance chips - either in a design or CAD role High level of proficiency in Tcl as well as Python Experience with automation Experience with a wide variety of Physical Design tasks - ranging all the way from place-and-route, analysis, timing sign-off and PDV Experience with advanced technology nodes (5nm or lower) Solid understanding of digital design, timing analysis and physical verification Strong user of industry-standard place-and-route tools such as Cadence Innovus Proven track record of managing and regressing place-and-route flows

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications Bachelor's degree in Science, Engineering or closely related field Experience with digital design and RTL development, Experience with front end EDA tools such as Synopsys Next Generation tools, Conformal LEC, Synopsys Formality and Synopsys PrimeTime Preferred Qualifications Knowledge and experience of graphics design and development Proficient in Perl, TCL and shell scripting Excellent interpersonal and team skills yet able to work independently and able to problem solve complex, unique and detailed issues Be Familiar with The latest EDA tools for synthesis, formal verification, timing analysis and physical design