Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. IPPDPhysical design engineer Physical Implementation activities for high performance Cores for 16/14/7/5nm or lower technologies, which includes all or some of the below. Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), Low Power verification, PDN, Timing Closure and / or power optimization Exposure to PD implementation of PPA critical cores. Exposure to timing convergence of high frequency data-path intensive Cores and advanced STA concepts. Able to handle Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes. Understanding of clocking architecture. Tcl/Python/Perl Scripting aware for small automation Strong problem-solving skills , good communication skills and good team player Collaborate with design, DFT and PNR teams and support issue resolutions wrt constraints validation, verification, STA, Physical design, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. * Work with multiple SOC Design teams to rollout robust Logic Synthesis, UPF synthesis, QoR optimization and netlist Signoff flows * Provide implementation flows support and issue debugging services to SOC design teams across various site * Develop and maintain 3rd party tool integration and product enhancement routines * Should drive new tool evaluation, methodology refinement for PPA optimization Skill Set * Proficiency in Python/Tcl * Familiar with Synthesis tools (Fusion Compiler/Genus), * Fair knowledge in LEC, LP signoff tools * Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking * Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus * Should be sincere, dedicated and willing to take up new challenges Experience 3 to 5 years of experience in RTL,UPF & Physical aware Synthesis for cutting edge technology nodes, logic equivalence checking, Scripting and Netlist Timing Signoff

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: About The Role Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles "¢ Synthesis, Static Timing Analysis and LEC of SoC/Cores "¢ Full chip and block level timing closure, IO budgeting for blocks "¢ Logical equivalence check between RTL to Netlist and Netlist to Netlist "¢ Knowledge of low-power techniques including clock gating, power gating and MV designs "¢ ECO timing flow "¢ Proficient in scripting languages (TCL and Perl). Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 4+ yrs of experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Experience "“ 4 to 7 Years in EM/IR/PDN Roles and Responsibilities Perform various electrical analyses at block and top levels, including static/dynamic IR, power/signal EM, and ESD Drive block and top-level electrical verification closure Develop power grid specs based on power/performance/area targets of different SOC blocks. Implement power grids in industry standard PnR tool environments. Work closely with the PI team to optimize the overall PDN performance. Work with CAD and tool vendors to develop and validate new flows and methodologies. Preferred qualifications BS/MS/PhD degree in Electrical Engineering; 4+ years of practical experience In-depth knowledge of EMIR tools such as Redhawk and Voltus Experience in developing and implementing power grid Good knowledge of system-level PDN and power integrity Practical experience with PnR implementation, verification, power analysis and STA Proficient in scripting languages (TCL/Perl/Python) Experience with industry standard EMIR tools such as Redhawk and Voltus Basic knowledge of the physical design flow and industry standard PnR tools Experience with scripting languages such as TCL, Perl and Python Ability to communicate effectively with cross-functional teams

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications "¢ 2+ years Hardware Engineering experience or related work experience. "¢ 2+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications "¢ 5+ years Hardware Engineering experience or related work experience. "¢ 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional PE Logic Design Engineer to join our MIC IDC Design team in Bengaluru In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer, As a PE Logic Design Engineer, youll play a pivotal role in designing and implementing the worlds best Registered Clocking Driver (RCD) products In this full-time role, youll report directly to our Logic Design Manager Our MIC IDC is dedicated to leverage over three decades of high-performance memory expertise to deliver cutting-edge memory interface chipset solutions, enhancing memory bandwidth and capacity for data centers and client applications alike, and your contributions will be instrumental in RCD product development, Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work Responsibilities Understand the spec requirements and convert into a micro architecture specification, Realize the RTL design using Verilog/System Verilog, Works with verification teams in defining the test plan and reviews the test coverage, Does pre implementation design checks like lint, CDC, RDC, constraint validation, Works with physical design team in defining the design and timing constraints and driving implementation till timing closure, Interact with cross functional circuit teams for new product development Participate in Architecture level discussions to define the specifications, Post silicon validation support in bringing up parts, Qualifications Minimum 10 years of solid ASIC logic/Digital design expertise with bachelors degree or masters degree Strong digital design fundamentals, Strong hands on expertise in HDLs like Verilog/System Verilog, Experience with EDA tools for simulation, synthesis, and timing analysis and logic equivalence check, Knowledge of High speed protocols is plus, Strong scripting abilities using Perl/Tcl/python is a plus Strong written and verbal communication skills Able to break down technical concepts to a larger audience is desired, About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrows systems, Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits, Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard, Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics, Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures If you require assistance or an accommodation due to a disability, please feel free to inform us in your application, Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services, For more information about Rambus, visit rambus For additional information on life at Rambus and our current openings, check out rambus /careers/,

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group Here you will exercise your skills on key components that meet latest demands and improvements for graphics IP, You will: Put in dedicated effort to understand graphics concepts and enhance your verification expertise, Collaborate effectively within a team, demonstrating a willingness to learn and contribute, Take ownership of your tasks by planning, estimating, and tracking your progress, Assist in developing tests, sequences, checkers, scoreboards, and other components in UVM, About You Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard, You'll have: Strong expertise in Digital Circuits and Verilog, Proficient in SystemVerilog and UVM, with a strong desire to further enhance skills in these areas, You might also have: Knowledge of Graphics, GPU, CPU, or SoC architectures, Experience with broader verification technologies, including formal property-based verification (FPV), Proficiency in coding and scripting using Python, TCL, Perl, SystemC, or C++, Who We Are Imagination is a UK-based company that creates silicon and software IP designed to give its customers an edge in competitive global technology markets Its GPU and AI technologies enable outstanding power, performance, and area (PPA), fast time-to-market, and lower total cost of ownership Products based on Imagination IP are used by billions of people across the globe in their smartphones, cars, homes, and workplaces, We need your skills to help us continue to deliver technology that will impress the industry and our customers alike, ensuring that people everywhere can enjoy smarter and faster tech than ever before, So come join us if you're wanting that something more Bring your talent, curiosity and expertise and well help you do the rest Youll be part of one of the worlds most exciting companies who are one of the leaders in semiconductor IP solutions, As a part of our team, you can help us transform, innovate, and inspire the lives of millions through our technology, Additional Information If you encounter accessibility barriers in the application process or if you have access needs and require support or adjustments to participate equitably in the recruitment process, please email recruitment@imgtec ,

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group Here you will exercise your skills on key components that meet latest demands and improvements for graphics IP, You will: Put in dedicated effort to understand graphics concepts and enhance your verification expertise, Collaborate effectively within a team, demonstrating a willingness to learn and contribute, Take ownership of your tasks by planning, estimating, and tracking your progress, Assist in developing tests, sequences, checkers, scoreboards, and other components in UVM, About You Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard, You'll have: Strong expertise in Digital Circuits and Verilog, Proficient in SystemVerilog and UVM, with a strong desire to further enhance skills in these areas, You might also have: Knowledge of Graphics, GPU, CPU, or SoC architectures, Experience with broader verification technologies, including formal property-based verification (FPV), Proficiency in coding and scripting using Python, TCL, Perl, SystemC, or C++, Who We Are Imagination is a UK-based company that creates silicon and software IP designed to give its customers an edge in competitive global technology markets Its GPU and AI technologies enable outstanding power, performance, and area (PPA), fast time-to-market, and lower total cost of ownership Products based on Imagination IP are used by billions of people across the globe in their smartphones, cars, homes, and workplaces, We need your skills to help us continue to deliver technology that will impress the industry and our customers alike, ensuring that people everywhere can enjoy smarter and faster tech than ever before, So come join us if you're wanting that something more Bring your talent, curiosity and expertise and well help you do the rest Youll be part of one of the worlds most exciting companies who are one of the leaders in semiconductor IP solutions, As a part of our team, you can help us transform, innovate, and inspire the lives of millions through our technology, Additional Information If you encounter accessibility barriers in the application process or if you have access needs and require support or adjustments to participate equitably in the recruitment process, please email recruitment@imgtec ,

The candidate will be part of the R&D in Solutions Group in India The position offers learning and growth opportunities, This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in a role that will include IP Design Verification using UVM based environment methodology, Job Description: The candidate will be part of the Synopsys CXL IP Design verification R&D team at Synopsys You will own UVM based verification environment, which handles multiple features of IP, test plan creation, test case writing, random constraint creation, coverage closure, SVA and Release As part of the work, you will closely work with lead and be part of a global team of experienced Engineers, Technical Expertise Needed: BS or MS degree in Computer Science, Electrical or Electronics Engineering, or Related Field with 8+ years of experience in the following areas: Own UVM based testbench environment and developed UVM testbench architecture, Testplan and SVA for an IP/SoC, Knowledge of one or more of protocols/standards: PCIe, CXL, UCIe, AMBA (AXI,APB,AHB) etc Good knowledge of System Verilog, Hands-on experience with coverage closure and writing SVA for IP/SOC, Good simulation debugging skills, Experience with Perforce or similar revision control environment, Experience with Python/TCL or any scripting knowledge is an added advantage, Job Responsibilities Include - Understand Standard Specifications, create testplan for the product and create UVM based testbench architecture Propose and enhance the UVM architecture with unique idea for verification, Be single point of contact with hands-on experience on all verification tasks Testbench Creation Testplan creation Coverage closure SVA Release Perform peer review of testbench code for continuous quality, Own simulation debugs using DVE/Verdi, interact with Design Team and aid in debug and Verification closure, Periodically publish technical papers and/or file patents on the feature updates/innovation carried out, The candidate will work in a project and team-oriented environment with teams spread across multiple sites, worldwide, In addition, the candidate should have excellent oratory and written communication skills in English, should be a team player and possess good problem-solving skills and show high levels of initiative, This position requires prior industry experience and is not open for college fresh grads,

Job Description And Requirements You Are: You are a highly motivated Staff Engagement Applications Engineer with over 4+ years of hands-on experience in synthesis or place and route (P&R), You have a robust understanding of the Synthesis concepts and are eager to work closely with R&D on driving product and methodology development, You thrive in dynamic environments and possess excellent communication skills, including a strong command of English Your background in EE/CS, coupled with your experience with EDA tools like DC, FM, ICC2, and Fusion Compiler, makes you an ideal fit for this role, What Youll Be Doing: Providing Customer Support and Collaborating with R&D teams to drive product development for wide deployment, Demonstrating differentiated PPA results to showcase our technology's superiority, Providing technical support to key global customers to address PPA bottlenecks and design challenges on the most advanced designs, Aggressively engaging in worldwide critical benchmarks and deployments to ensure the highest quality and performance of designs, Utilizing scripting languages such as Perl and Tcl for automation and optimization tasks, Staying updated with the latest advancements in ASIC design flow, VLSI, and CAD development to continually improve processes, The Impact You Will Have: Enhancing the performance and efficiency of Fusion Compiler designs, Driving innovations that contribute to the success of Synopsys' cutting-edge technologies, Providing critical support that helps key customers overcome their PPA challenges, Contributing to the development of new features that keep Synopsys at the forefront of the industry, Improving the overall quality and reliability of our products through meticulous design and optimization, Fostering strong relationships with global customers, reinforcing Synopsys' reputation as a leader in chip design and software security, What Youll Need: BS/MS in Electrical Engineering or Computer Science with 4+ years of relevant experience, Hands-on experience with synthesis and place and route (P&R) tools, Proficiency with EDA tools such as DC, FM, ICC2, and Fusion Compiler, Knowledge of advanced placement and routing rules, Experience with scripting languages like Perl and Tcl, Strong understanding of ASIC design flow, VLSI, and CAD development, Never give-up attitude and flexibility in supporting worldwide engagements, Who You Are: Excellent communicator with strong command of English, Highly motivated and self-driven, Detail-oriented with a focus on quality and performance, A team player who thrives in collaborative environments, Adaptable and eager to learn new technologies and methodologies,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, PVT Sensor IP development is a critical offering for process, voltage, temperature and other monitoring IPs within SOC subsystem Synopsys is market leader for these IP developments which are integral part of Silicon lifecycle monitoring, You Are: As a new, exciting and challenging position, we are looking for a talented person that can show a great level of initiative and ability to work in a busy and fast changing environment This rewarding role being fundamental to the successful and smooth operation of the engineering teams, You will play a vital role in helping to strengthen and develop forecasting capabilities, based upon improved monitoring capacity and forward-looking project schedules, Develop and maintain automation scripts for CAD tools using languages like Python, Perl, or TCL, Collaborate with designers and engineers to identify automation opportunities and implement solutions, Design and implement automation frameworks for design flow of multiple functions using AI, Proficient in troubleshooting and debug automation scripts and CAD tool issues, Develop and maintain documentation for automation scripts and processes, Understanding of DV flow and generating test benches and test cases, Understanding RTL and gate-level SDF-annotated simulations and debug, May perform mixed-signal (digital + analog) simulations and debug, Interact with our application engineers and provide guidance to customers, Participate in the generation of data books, application notes, and white papers, Understanding CAD infrastructure, methodology will help to setup project environment, Contribute to enhance quality assurance methodology by adding more quality checks/gatings, Front End development process understanding and support Internal tools development and automation to help improve productivity across ASIC design cycles, Work with design engineers on new tools/technology and new features evaluation and adoption Perform physical verification and design rule checks to ensure design integrity and manufacturability, Understanding of tools like VC Spyglass, Verdi, & views like SDF, Liberty etc and other frontend views will add value to this position, Writing RTL Code, Solid Verilog, PERL, and Python skills and TCL are good additions, Understanding static timing analysis and synthesis, DFT/ATPG skills would be a plus, Previous knowledge of customer support and/or silicon bring-up is a plus, Drive automation to enhance IP Quality-Assurance flow & Release process, Define and establish a comprehensive QA process for IP development, Integrate new features and functionalities into IPQA scripts with automation team, Streamline the release process to reduce cycle time and improve efficiency, Automate release tasks, such as packaging and documentation, to reduce manual errors, Improve release quality by integrating QA processes into the release workflow, Enhance releasing documentation to ensure completeness and accuracy, Validate the integrity of the release package by checking for corruption, tampering, or other issues (Time Stamp and Locking Source of Release package and Release package itself), Required Skills: Bachelors or masters degree in electrical engineering or a related field, 3 to 7+ years of experience in A&MS frontend and backend views & collaterals development flows, Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler, Exceptional knowledge of layout design methods, techniques, and methodologies, Experience with physical verification tools, such as Calibre or Assura, Understanding of semiconductor process technologies and their impact on layout design, Excellent problem-solving and systematic skills, Ability to work effectively in a team-oriented environment, Familiarity with Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV), Good communication and interpersonal skills,

Alternate Job Titles: Digital IP Verification Engineer IP Methodology Engineer ASIC Methodology Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a seasoned professional with a strong background in electronics or electrical engineering, holding a Bachelor's or Master's degree from a reputed university With 6-10 years of experience in ASIC/SoC/IP Methodology, you possess a deep understanding of Synopsys implementation and infrastructure tools such as coreConsultant, coreAssembler, SpyGlass/VC-SpyGlass, Fusion Compiler/Design Compiler, Prime Time, Formality, TestMax Manager, TCM, Verdi, and VCS Your proficiency in scripting languages like TCL, Perl, or Python complements your technical expertise You excel in multi-clock designs and understand Clock-Domain-Crossing principles You are an effective communicator, a collaborative team player, and a problem-solver who thrives in dynamic environments, What Youll Be Doing: Create and support innovative Design Methodologies by leveraging feedback from our EDA and Digital IP teams, Integrate Methodologies into the development infrastructures of the Digital IP teams and demonstrate successful results, Support and maintain our regression infrastructure to manage changes and revise methodologies regularly, Test a range of Digital IPs through our Methodologies centered around Synopsys EDA tools, Collaborate with various teams to improve methodologies, enhancing both team and customer experiences, Develop and manage infrastructures, processes, methodologies, and checklists for the SG Digital IP Controllers, The Impact You Will Have: Enhance the efficiency and effectiveness of Digital IP development processes, Ensure high-quality and robust Digital IP products through rigorous methodology testing, Improve customer satisfaction by delivering superior Digital IP solutions, Drive innovation in design methodologies, contributing to Synopsys' leadership in the industry, Facilitate seamless integration of methodologies into development infrastructures, optimizing workflows, Support the continuous improvement of regression infrastructures, ensuring up-to-date methodologies, What Youll Need: Bachelors or Masters degree in electronics or electrical engineering or equivalent from reputed universities, 6-10 years of relevant experience in ASIC/SoC/IP Methodology, Proficiency in Synopsys implementation and infrastructure tools (coreConsultant, coreAssembler, SpyGlass/VC-SpyGlass, Fusion Compiler/Design Compiler, Prime Time, Formality, TestMax Manager, TCM, Verdi, VCS), Familiarity with multi-clock designs and understanding of Clock-Domain-Crossing principles, Proficiency in scripting languages (TCL, Perl, Python), Who You Are: You are an effective communicator with strong collaboration skills You have a knack for problem-solving and possess a systems-level thinking approach Your ability to write code in various scripting languages enables you to develop and manage complex infrastructures and methodologies efficiently, The Team Youll Be A Part Of: You will be joining the Synopsys IP Group Digital Methodology team, a dynamic and innovative group focused on designing, developing, and managing infrastructures, processes, and methodologies for Digital IP Controllers This team thrives on collaboration, continuous improvement, and delivering high-quality solutions to meet the evolving needs of our customers, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a seasoned professional with a strong background in Static Timing Analysis (STA) and Synopsys Design Constraints (SDC) Your expertise in RTL and System Verilog, along with your proficiency in scripting languages like Perl, Tcl, or Python, makes you stand out You have a deep understanding of front-end EDA design methodologies and experience with logic synthesis tools Your prior experience with SDC tools and RTL simulation is a significant plus You are an excellent communicator, capable of producing detailed product requirement documents, and you have a knack for translating customer needs into actionable insights for our R&D team With a BS in Electrical or Computer Engineering and over 10 years of experience in STA/Synthesis/Front-End Flows, you are ready to take on a leadership role and drive innovation at Synopsys, What Youll Be Doing: Collaborating with customers to ensure our SDC Constraints solution meets their expectations, Developing and integrating design methodologies with other Synopsys products, Tracking customer engagements and communicating status with Marketing and Upper Management, Preparing and delivering technical presentations to customers and Field Application Engineers (FAEs), Creating customer training material related to our SDC Constraints solution, Routinely meeting with customers to understand their key priorities and communicating these internally, Providing technical direction to our R&D team and championing key customer requests, The Impact You Will Have: Enhancing customer satisfaction by ensuring our solutions meet their needs and expectations, Driving the integration of our SDC Constraints solution with other Synopsys products, enhancing overall product offerings, Improving communication and collaboration between customers, marketing, and upper management, Empowering customers and FAEs with comprehensive technical knowledge through effective presentations and training materials, Influencing product development by providing valuable insights and priorities from customer feedback, Ensuring the continuous improvement and innovation of our SDC Constraints solution, What Youll Need: Proficiency with STA, SDC, Proficiency with RTL, System Verilog, Strong understanding of front-end EDA design methodologies, Strong Perl, Tcl, or Python scripting skills, Prior experience with logic synthesis tools, Prior experience using or supporting SDC tools (a significant plus), Prior experience with RTL simulation and SVA (a plus), Sound communication skills, both verbal and written, Ability to produce detailed product requirement documents, BS in Electrical or Computer Engineering with 10+ years of experience in STA/Synthesis/Front-End Flows, Who You Are: You are a highly skilled and experienced engineer with a passion for technology and innovation You possess excellent problem-solving abilities and have a customer-centric mindset You are a great communicator and collaborator, capable of working effectively with cross-functional teams Your ability to translate complex technical concepts into actionable insights makes you a valuable asset to the team, The Team You will be a part Of: You will be part of the industry??s leading SDC Management product engineering team This team focuses on developing and enhancing our SDC Constraints solution, ensuring it meets the highest standards of quality and performance You will work alongside talented engineers and collaborate with various departments to drive innovation and customer satisfaction,

PHYSICAL DESIGN ENGINEER/LEAD - NOIDA/Ahmedabad/Bangalore/Hyderabad (NO WORK FROM HOME OR REMOTE WORK) Job description: 5 to 15 Years of Hands on Experience Block level Physical Design Implementation from RTL to GDSII or Netlist to GDSII, Block level Physical Signoff, Block level Timing Signoff and ECO generation. Block level Power signoff. Good skill on Automation (Perl/Tcl/Awk/Python) Able to provide technical guidance to Junior Engineer and lead 4-6 engineers. Must have led small project team. Good in communication skill as he/she would be single point of contact for client. NO WORK FROM HOME. Show more Show less

At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your unique voice and perspective to help EY become even better, too. Join us and build an exceptional experience for yourself, and a better working world for all. Solution Architect – Network Enterprise Technology (ET): Build your legacy with us. Enterprise Technology provides reliable, secure and resilient technology services and solutions to support over 300,000 EY people. As part of Enterprise Technology, you’ll be at the forefront of enabling innovative technologies including emerging collaboration tools and world-class technology infrastructure. Our aim is to build an outstanding customer experience with clear investment in innovation, alongside operational excellence that delivers efficient, quality services and solutions. You will work with technologists and business specialists to meet the increasing pace of our business. That means more growth for you, exciting learning opportunities, career choices and the chance to make a real impact. The opportunity With the emergence and promise of Software Defined Networking (SDN) , Automation, Hybrid Cloud, Zero Trust, Internet-of-Things (IoT), Artificial Intelligence (AI) and other areas the need for introduction of new network and security technologies into the enterprise environment is accelerating. To keep pace with the growth, we have a unique opportunity open up for a seasoned Solution Architect - Network to join our dynamic team to help meet today and tomorrow's business and technology needs of the firm. In this role you will be responsible for bringing strategy to fruition through the creation and delivery of architectural solution artifacts, and so candidates should be fluent with the aforementioned network technology areas and be able to drive the delivery of solutions which align with the strategy. Your Key Responsibilities Drive the successful delivery of network and security technology investment efforts. Network with stakeholders, sponsors, engineering, and operations teams across EY Technology to drive development of networking products, services, and solutions. Work with Technology Architects to ensure alignment with strategic objectives and targets, while providing input into strategic direction as needed. Come up to speed with strategic artifacts and align solution efforts to those strategies. Translate business needs into technical requirements and formulation of solutions, while identifying gaps, strategic impacts, financial impacts and the risk profile in the technical solution or offering. Lead RFI and RFP technology selection efforts from a technical perspective, including: Formulate requirements which guide technology selections and solution exercises. Formulate technology recommendations while working with stakeholders. Lead proof-of-concept efforts to finalize technology selection and fit into EY environment. Compile technology findings and recommendations for leadership decisions. Drive proof-of-concept, design and implementation activities from an architectural perspective. Develop and maintain solution architecture documents and other artifacts to guide design creation and implementations. Identify technologies appropriate to incorporate in solution architectures. Stay abreast of industry trends and new technology offerings, perform in-depth research analysis and maintain collaborative partnership with internal IT teams and business customers along with external technology vendors and service providers to ensure robust outcomes. Present subject matter to program / project teams, governance forums and other audiences as needed. Skills And Attributes For Success We are interested in people with a deep and broad networking background, who bring in experience working in large enterprise environments, performing senior network architecture or network engineering role. A successful candidate will have technical and all-round experience in being part of a fast-paced team that is enabling the realization of strategic intent by solutioning and building modern network landscapes. These experiences include: Deep understanding of how the Internet works on a global and local basis including Internet backbone capacity, undersea cable routes and peering arrangements between service providers. Solid understanding and experience with DNS, IP addressing, BGP etc to support efficient, low latency processing of all Internet traffic which is on the rise as enterprises continue migration away from monolithic MPLS WAN to an intelligent and flexible software defined platform (SD-WAN) platform. First-hand experience with enterprise network solutions in data center and branch office environments including routing, switching and wireless LAN technologies; application networking and delivery technologies - data center server load balancing (SLB) and global load balancing (GLB) solutions; WAN, Internet connectivity & related technologies (SD-WAN, MPLS, IPSEC VPN, WAN Optimizers, Rate Limiters, QoS, etc); Infrastructure Services (DNS, DHCP and Active Directory); Network Monitoring & Management Platforms. Exposure to various facets of converged data center and branch office build-out including planning, designing and implementation of facilities and structured cabling solutions. Working knowledge of wireless LAN radio and security concepts, including site surveys and wireless Guest Access solutions. Good understanding of what it takes to build a Full WiFi branch office environment supporting users and unattended IoT infrastructure components. In-depth knowledge of Internet of Things (IoT) landscape with prior experience in evaluation, design, implementation, administration of “secure” enterprise network solutions for IoT in the “Smart Offices” space. These include: Environmental Sensors and Control, Bluetooth Low Energy Beacons, Digital Lockers, Digital Assistants, Next Generation A/V devices, Interactive Whiteboards, others. First-hand knowledge and experience in design, implementation and migration aspects to a SD-WAN solution including inter-connecting global enterprise branch offices, data centers (on-prem, hybrid cloud), SaaS cloud (Microsoft O365, Cloud Secure Web Gateway, others), and local Internet breakout. Through understanding of DDoS mitigation strategies employed by enterprises along with different local and cloud DDoS services available in the marketplace. Expertise with IPv6 design, planning, migration and adoption strategies for large enterprise networks, including identifying dependencies across all infrastructure and application stacks. Familiarity with Zero Trust architectures, policies and supporting network and security technologies. Hand-on knowledge and understanding of operating systems, data management platforms, OpenStack, REST API, JSON-RPC, and Data Visualization Tools like Microsoft Power BI especially as these apply to network build and integration. Proficiency with Linux and one or more scripting languages (Python, Perl, TCL, Shell). Knowledge of Python is a plus. Strong ability to document processes, procedures and network designs clearly and accurately for distribution to internal teams and customers. To qualify for the role, you must have Creative and self-starter mindset with strong analytical and quantitative skills to operate without direct supervision on multiple complex projects and tasks, and their shifting priorities in parallel. Effective listening skills and display openness to other people's ideas and thoughts. Ability to deal efficiently with escalations, conflicts and difficult situations/people under pressure. Strong executive presence and skills to present complex and difficult messages, using a variety of media and methods across non-technical and technical audiences. Strong influencing skills to collaborate effectively and efficiently across the firm. English language skills - excellent written and verbal communication. Ability to understand and integrate cultural and/or individual differences to work in virtual cross-cultural, cross-border global teams. Flexibility to work out of regular office hours to cater to the global organization needs. Ready to travel as needed (travel involved Ideally, you’ll also have Bachelor’s or Master’s degree from an accredited college or university in Computer Science, Computer Engineering, MIS, or a closely related field. 15+ years in an engineering or architecture function which includes at least 5 years of experience in a network solution architecture capacity. Experience in roles ranging from operations/engineering to architecture both within and outside of networking context Possession of a current (non-expired) professional, industry recognized certification. Examples of equivalent certifications include but are not limited to: CCNP CCIE MCSA Familiarity/experience with TOGAF methodology What We Look For This role is perfect for you, if you are passionate about your work and are very comfortable being a central driving force, thinking holistically, incorporating diverse technologies and options, networking with key stakeholders & sponsors, cross-teaming across the organization, making sense of complexity & uncertainty, recognizing and navigating “basic issues”, challenging limited notions, voicing thoughts & opinions, asserting pragmatic ideas & influence, being a common sense thought leader, and presenting to a variety of audiences. What We Offer As part of this role, you'll work in a highly integrated, globally diverse team with the opportunity and tools to grow, develop and drive your career forward. Here, you can combine global opportunity with flexible working. The EY benefits package goes above and beyond too, focusing on your physical, emotional, financial and social well-being. Your recruiter can talk to you about the benefits available in your country. Here’s a snapshot of what we offer: Continuous learning: You’ll develop the mindset and skills to navigate whatever comes next. Success as defined by you: We’ll provide the tools and flexibility, so you can make a significant impact, your way. Transformative leadership: We’ll give you the insights, coaching and confidence to be the leader the world needs. Diverse and inclusive culture: You’ll be accepted for who you are and empowered to use your voice to help others find theirs. EY | Building a better working world EY exists to build a better working world, helping to create long-term value for clients, people and society and build trust in the capital markets. Enabled by data and technology, diverse EY teams in over 150 countries provide trust through assurance and help clients grow, transform and operate. Working across assurance, consulting, law, strategy, tax and transactions, EY teams ask better questions to find new answers for the complex issues facing our world today. Show more Show less

At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your unique voice and perspective to help EY become even better, too. Join us and build an exceptional experience for yourself, and a better working world for all. Solution Architect – Network Enterprise Technology (ET): Build your legacy with us. Enterprise Technology provides reliable, secure and resilient technology services and solutions to support over 300,000 EY people. As part of Enterprise Technology, you’ll be at the forefront of enabling innovative technologies including emerging collaboration tools and world-class technology infrastructure. Our aim is to build an outstanding customer experience with clear investment in innovation, alongside operational excellence that delivers efficient, quality services and solutions. You will work with technologists and business specialists to meet the increasing pace of our business. That means more growth for you, exciting learning opportunities, career choices and the chance to make a real impact. The opportunity With the emergence and promise of Software Defined Networking (SDN) , Automation, Hybrid Cloud, Zero Trust, Internet-of-Things (IoT), Artificial Intelligence (AI) and other areas the need for introduction of new network and security technologies into the enterprise environment is accelerating. To keep pace with the growth, we have a unique opportunity open up for a seasoned Solution Architect - Network to join our dynamic team to help meet today and tomorrow's business and technology needs of the firm. In this role you will be responsible for bringing strategy to fruition through the creation and delivery of architectural solution artifacts, and so candidates should be fluent with the aforementioned network technology areas and be able to drive the delivery of solutions which align with the strategy. Your Key Responsibilities Drive the successful delivery of network and security technology investment efforts. Network with stakeholders, sponsors, engineering, and operations teams across EY Technology to drive development of networking products, services, and solutions. Work with Technology Architects to ensure alignment with strategic objectives and targets, while providing input into strategic direction as needed. Come up to speed with strategic artifacts and align solution efforts to those strategies. Translate business needs into technical requirements and formulation of solutions, while identifying gaps, strategic impacts, financial impacts and the risk profile in the technical solution or offering. Lead RFI and RFP technology selection efforts from a technical perspective, including: Formulate requirements which guide technology selections and solution exercises. Formulate technology recommendations while working with stakeholders. Lead proof-of-concept efforts to finalize technology selection and fit into EY environment. Compile technology findings and recommendations for leadership decisions. Drive proof-of-concept, design and implementation activities from an architectural perspective. Develop and maintain solution architecture documents and other artifacts to guide design creation and implementations. Identify technologies appropriate to incorporate in solution architectures. Stay abreast of industry trends and new technology offerings, perform in-depth research analysis and maintain collaborative partnership with internal IT teams and business customers along with external technology vendors and service providers to ensure robust outcomes. Present subject matter to program / project teams, governance forums and other audiences as needed. Skills And Attributes For Success We are interested in people with a deep and broad networking background, who bring in experience working in large enterprise environments, performing senior network architecture or network engineering role. A successful candidate will have technical and all-round experience in being part of a fast-paced team that is enabling the realization of strategic intent by solutioning and building modern network landscapes. These experiences include: Deep understanding of how the Internet works on a global and local basis including Internet backbone capacity, undersea cable routes and peering arrangements between service providers. Solid understanding and experience with DNS, IP addressing, BGP etc to support efficient, low latency processing of all Internet traffic which is on the rise as enterprises continue migration away from monolithic MPLS WAN to an intelligent and flexible software defined platform (SD-WAN) platform. First-hand experience with enterprise network solutions in data center and branch office environments including routing, switching and wireless LAN technologies; application networking and delivery technologies - data center server load balancing (SLB) and global load balancing (GLB) solutions; WAN, Internet connectivity & related technologies (SD-WAN, MPLS, IPSEC VPN, WAN Optimizers, Rate Limiters, QoS, etc); Infrastructure Services (DNS, DHCP and Active Directory); Network Monitoring & Management Platforms. Exposure to various facets of converged data center and branch office build-out including planning, designing and implementation of facilities and structured cabling solutions. Working knowledge of wireless LAN radio and security concepts, including site surveys and wireless Guest Access solutions. Good understanding of what it takes to build a Full WiFi branch office environment supporting users and unattended IoT infrastructure components. In-depth knowledge of Internet of Things (IoT) landscape with prior experience in evaluation, design, implementation, administration of “secure” enterprise network solutions for IoT in the “Smart Offices” space. These include: Environmental Sensors and Control, Bluetooth Low Energy Beacons, Digital Lockers, Digital Assistants, Next Generation A/V devices, Interactive Whiteboards, others. First-hand knowledge and experience in design, implementation and migration aspects to a SD-WAN solution including inter-connecting global enterprise branch offices, data centers (on-prem, hybrid cloud), SaaS cloud (Microsoft O365, Cloud Secure Web Gateway, others), and local Internet breakout. Through understanding of DDoS mitigation strategies employed by enterprises along with different local and cloud DDoS services available in the marketplace. Expertise with IPv6 design, planning, migration and adoption strategies for large enterprise networks, including identifying dependencies across all infrastructure and application stacks. Familiarity with Zero Trust architectures, policies and supporting network and security technologies. Hand-on knowledge and understanding of operating systems, data management platforms, OpenStack, REST API, JSON-RPC, and Data Visualization Tools like Microsoft Power BI especially as these apply to network build and integration. Proficiency with Linux and one or more scripting languages (Python, Perl, TCL, Shell). Knowledge of Python is a plus. Strong ability to document processes, procedures and network designs clearly and accurately for distribution to internal teams and customers. To qualify for the role, you must have Creative and self-starter mindset with strong analytical and quantitative skills to operate without direct supervision on multiple complex projects and tasks, and their shifting priorities in parallel. Effective listening skills and display openness to other people's ideas and thoughts. Ability to deal efficiently with escalations, conflicts and difficult situations/people under pressure. Strong executive presence and skills to present complex and difficult messages, using a variety of media and methods across non-technical and technical audiences. Strong influencing skills to collaborate effectively and efficiently across the firm. English language skills - excellent written and verbal communication. Ability to understand and integrate cultural and/or individual differences to work in virtual cross-cultural, cross-border global teams. Flexibility to work out of regular office hours to cater to the global organization needs. Ready to travel as needed (travel involved Ideally, you’ll also have Bachelor’s or Master’s degree from an accredited college or university in Computer Science, Computer Engineering, MIS, or a closely related field. 15+ years in an engineering or architecture function which includes at least 5 years of experience in a network solution architecture capacity. Experience in roles ranging from operations/engineering to architecture both within and outside of networking context Possession of a current (non-expired) professional, industry recognized certification. Examples of equivalent certifications include but are not limited to: CCNP CCIE MCSA Familiarity/experience with TOGAF methodology What We Look For This role is perfect for you, if you are passionate about your work and are very comfortable being a central driving force, thinking holistically, incorporating diverse technologies and options, networking with key stakeholders & sponsors, cross-teaming across the organization, making sense of complexity & uncertainty, recognizing and navigating “basic issues”, challenging limited notions, voicing thoughts & opinions, asserting pragmatic ideas & influence, being a common sense thought leader, and presenting to a variety of audiences. What We Offer As part of this role, you'll work in a highly integrated, globally diverse team with the opportunity and tools to grow, develop and drive your career forward. Here, you can combine global opportunity with flexible working. The EY benefits package goes above and beyond too, focusing on your physical, emotional, financial and social well-being. Your recruiter can talk to you about the benefits available in your country. Here’s a snapshot of what we offer: Continuous learning: You’ll develop the mindset and skills to navigate whatever comes next. Success as defined by you: We’ll provide the tools and flexibility, so you can make a significant impact, your way. Transformative leadership: We’ll give you the insights, coaching and confidence to be the leader the world needs. Diverse and inclusive culture: You’ll be accepted for who you are and empowered to use your voice to help others find theirs. EY | Building a better working world EY exists to build a better working world, helping to create long-term value for clients, people and society and build trust in the capital markets. Enabled by data and technology, diverse EY teams in over 150 countries provide trust through assurance and help clients grow, transform and operate. Working across assurance, consulting, law, strategy, tax and transactions, EY teams ask better questions to find new answers for the complex issues facing our world today. Show more Show less

At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your unique voice and perspective to help EY become even better, too. Join us and build an exceptional experience for yourself, and a better working world for all. Solution Architect – Network Enterprise Technology (ET): Build your legacy with us. Enterprise Technology provides reliable, secure and resilient technology services and solutions to support over 300,000 EY people. As part of Enterprise Technology, you’ll be at the forefront of enabling innovative technologies including emerging collaboration tools and world-class technology infrastructure. Our aim is to build an outstanding customer experience with clear investment in innovation, alongside operational excellence that delivers efficient, quality services and solutions. You will work with technologists and business specialists to meet the increasing pace of our business. That means more growth for you, exciting learning opportunities, career choices and the chance to make a real impact. The opportunity With the emergence and promise of Software Defined Networking (SDN) , Automation, Hybrid Cloud, Zero Trust, Internet-of-Things (IoT), Artificial Intelligence (AI) and other areas the need for introduction of new network and security technologies into the enterprise environment is accelerating. To keep pace with the growth, we have a unique opportunity open up for a seasoned Solution Architect - Network to join our dynamic team to help meet today and tomorrow's business and technology needs of the firm. In this role you will be responsible for bringing strategy to fruition through the creation and delivery of architectural solution artifacts, and so candidates should be fluent with the aforementioned network technology areas and be able to drive the delivery of solutions which align with the strategy. Your Key Responsibilities Drive the successful delivery of network and security technology investment efforts. Network with stakeholders, sponsors, engineering, and operations teams across EY Technology to drive development of networking products, services, and solutions. Work with Technology Architects to ensure alignment with strategic objectives and targets, while providing input into strategic direction as needed. Come up to speed with strategic artifacts and align solution efforts to those strategies. Translate business needs into technical requirements and formulation of solutions, while identifying gaps, strategic impacts, financial impacts and the risk profile in the technical solution or offering. Lead RFI and RFP technology selection efforts from a technical perspective, including: Formulate requirements which guide technology selections and solution exercises. Formulate technology recommendations while working with stakeholders. Lead proof-of-concept efforts to finalize technology selection and fit into EY environment. Compile technology findings and recommendations for leadership decisions. Drive proof-of-concept, design and implementation activities from an architectural perspective. Develop and maintain solution architecture documents and other artifacts to guide design creation and implementations. Identify technologies appropriate to incorporate in solution architectures. Stay abreast of industry trends and new technology offerings, perform in-depth research analysis and maintain collaborative partnership with internal IT teams and business customers along with external technology vendors and service providers to ensure robust outcomes. Present subject matter to program / project teams, governance forums and other audiences as needed. Skills And Attributes For Success We are interested in people with a deep and broad networking background, who bring in experience working in large enterprise environments, performing senior network architecture or network engineering role. A successful candidate will have technical and all-round experience in being part of a fast-paced team that is enabling the realization of strategic intent by solutioning and building modern network landscapes. These experiences include: Deep understanding of how the Internet works on a global and local basis including Internet backbone capacity, undersea cable routes and peering arrangements between service providers. Solid understanding and experience with DNS, IP addressing, BGP etc to support efficient, low latency processing of all Internet traffic which is on the rise as enterprises continue migration away from monolithic MPLS WAN to an intelligent and flexible software defined platform (SD-WAN) platform. First-hand experience with enterprise network solutions in data center and branch office environments including routing, switching and wireless LAN technologies; application networking and delivery technologies - data center server load balancing (SLB) and global load balancing (GLB) solutions; WAN, Internet connectivity & related technologies (SD-WAN, MPLS, IPSEC VPN, WAN Optimizers, Rate Limiters, QoS, etc); Infrastructure Services (DNS, DHCP and Active Directory); Network Monitoring & Management Platforms. Exposure to various facets of converged data center and branch office build-out including planning, designing and implementation of facilities and structured cabling solutions. Working knowledge of wireless LAN radio and security concepts, including site surveys and wireless Guest Access solutions. Good understanding of what it takes to build a Full WiFi branch office environment supporting users and unattended IoT infrastructure components. In-depth knowledge of Internet of Things (IoT) landscape with prior experience in evaluation, design, implementation, administration of “secure” enterprise network solutions for IoT in the “Smart Offices” space. These include: Environmental Sensors and Control, Bluetooth Low Energy Beacons, Digital Lockers, Digital Assistants, Next Generation A/V devices, Interactive Whiteboards, others. First-hand knowledge and experience in design, implementation and migration aspects to a SD-WAN solution including inter-connecting global enterprise branch offices, data centers (on-prem, hybrid cloud), SaaS cloud (Microsoft O365, Cloud Secure Web Gateway, others), and local Internet breakout. Through understanding of DDoS mitigation strategies employed by enterprises along with different local and cloud DDoS services available in the marketplace. Expertise with IPv6 design, planning, migration and adoption strategies for large enterprise networks, including identifying dependencies across all infrastructure and application stacks. Familiarity with Zero Trust architectures, policies and supporting network and security technologies. Hand-on knowledge and understanding of operating systems, data management platforms, OpenStack, REST API, JSON-RPC, and Data Visualization Tools like Microsoft Power BI especially as these apply to network build and integration. Proficiency with Linux and one or more scripting languages (Python, Perl, TCL, Shell). Knowledge of Python is a plus. Strong ability to document processes, procedures and network designs clearly and accurately for distribution to internal teams and customers. To qualify for the role, you must have Creative and self-starter mindset with strong analytical and quantitative skills to operate without direct supervision on multiple complex projects and tasks, and their shifting priorities in parallel. Effective listening skills and display openness to other people's ideas and thoughts. Ability to deal efficiently with escalations, conflicts and difficult situations/people under pressure. Strong executive presence and skills to present complex and difficult messages, using a variety of media and methods across non-technical and technical audiences. Strong influencing skills to collaborate effectively and efficiently across the firm. English language skills - excellent written and verbal communication. Ability to understand and integrate cultural and/or individual differences to work in virtual cross-cultural, cross-border global teams. Flexibility to work out of regular office hours to cater to the global organization needs. Ready to travel as needed (travel involved Ideally, you’ll also have Bachelor’s or Master’s degree from an accredited college or university in Computer Science, Computer Engineering, MIS, or a closely related field. 15+ years in an engineering or architecture function which includes at least 5 years of experience in a network solution architecture capacity. Experience in roles ranging from operations/engineering to architecture both within and outside of networking context Possession of a current (non-expired) professional, industry recognized certification. Examples of equivalent certifications include but are not limited to: CCNP CCIE MCSA Familiarity/experience with TOGAF methodology What We Look For This role is perfect for you, if you are passionate about your work and are very comfortable being a central driving force, thinking holistically, incorporating diverse technologies and options, networking with key stakeholders & sponsors, cross-teaming across the organization, making sense of complexity & uncertainty, recognizing and navigating “basic issues”, challenging limited notions, voicing thoughts & opinions, asserting pragmatic ideas & influence, being a common sense thought leader, and presenting to a variety of audiences. What We Offer As part of this role, you'll work in a highly integrated, globally diverse team with the opportunity and tools to grow, develop and drive your career forward. Here, you can combine global opportunity with flexible working. The EY benefits package goes above and beyond too, focusing on your physical, emotional, financial and social well-being. Your recruiter can talk to you about the benefits available in your country. Here’s a snapshot of what we offer: Continuous learning: You’ll develop the mindset and skills to navigate whatever comes next. Success as defined by you: We’ll provide the tools and flexibility, so you can make a significant impact, your way. Transformative leadership: We’ll give you the insights, coaching and confidence to be the leader the world needs. Diverse and inclusive culture: You’ll be accepted for who you are and empowered to use your voice to help others find theirs. EY | Building a better working world EY exists to build a better working world, helping to create long-term value for clients, people and society and build trust in the capital markets. Enabled by data and technology, diverse EY teams in over 150 countries provide trust through assurance and help clients grow, transform and operate. Working across assurance, consulting, law, strategy, tax and transactions, EY teams ask better questions to find new answers for the complex issues facing our world today. Show more Show less

About the Role Senior DFT Engineer (4 - 8 Years) | Hyderabad / Bangalore, India Are you passionate about making complex SoCs more testable, robust, and production-ready? As a Senior DFT Engineer , youll play a hands-on role in implementing critical DFT features that ensure silicon success across next-generation ASICs. You will work alongside experienced leads on advanced nodes (14nm and below), contribute to DFT flow development, and implement key test strategies such as scan compression, MBIST, and JTAG. This is your chance to grow into a technical specialist while playing a central role in the silicon lifecyclefrom RTL to tape-out. Key Responsibilities Support DFT architecture implementation and feature insertion for complex SoCs. Implement Scan Insertion , ATPG , Compression , MBIST , and Boundary Scan (JTAG) . Work with Mentor Graphics, Synopsys , or Cadence DFT tools for flow execution and verification. Generate and validate test vectors , support simulation, and ensure fault coverage goals. Assist with DFT verification , timing closure support , and pre-silicon checks . Collaborate with RTL, PD, and STA teams during integration and tape-out phases. Automate DFT flows using Tcl , Perl , or other scripting tools to improve efficiency. Contribute to post-silicon bring-up and production test debugging , where applicable. Work under the guidance of technical leads while also mentoring junior team members when needed. Required Skills & Qualifications Bachelor’s or Master’s degree in Electronics , Electrical Engineering , or a related discipline. 4–8 years of hands-on DFT experience in SoC/ASIC environments. Practical knowledge of: Scan/Compression Insertion and ATPG MBIST architectures and memory BIST flows Boundary Scan (JTAG / IEEE 1149.x) Exposure to silicon bring-up or production test is a strong advantage. Scripting experience using Tcl, Perl , or similar languages. Strong debugging, documentation, and collaboration skills. Interested? Apply or or know someone great? Reach out via DM or WhatsApp +91 9966034636 / Send your profile to ranjith.allam@cyient.com

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Good knowledge of Tcl/Perl Scripting Strong problem-solving skills and good communication skills. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3- 6yrs years of experience in Physical Design/Implementation Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3071100 Show more Show less

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description SoC Verification Engineer The SoC Development team at Sandisk is seeking highly motivated SoC Verification Engineers to join our talented team, working on cutting-edge controller development for high-performance SoCs used in industry-leading products. Role & Responsibilities As a SoC Verification Engineer , you will play a key role in ensuring the quality and reliability of our SoC designs. You will be responsible for: Developing verification test plans based on design specifications. Creating and executing test cases across multiple platforms, including RTL simulation, FPGA prototyping, and Palladium emulation. Performing Gate-Level Simulations (GLS) and debugging complex SoC designs. Collaborating with design, architecture, and firmware teams to define verification strategies and drive coverage-driven verification methodologies. Contributing to the development of advanced verification environments, including UVM, PSS testbenches. Analyzing functional coverage and simulation results to enhance verification efficiency and effectiveness. Why Join Us? At Sandisk , you’ll be part of a team of highly skilled engineers solving complex verification challenges and driving innovations in data storage solutions . Your work will directly impact the performance and reliability of high-volume new age data solutions, consumer and enterprise products. Together, we’ll push the boundaries of technology, unlock the full potential of data, and shape the future of storage solutions. Qualifications Required : BE or MS degree in Electrical/Electronics Engineering or Computer Engineering, with 4-8 years of experience Deep understanding of C, SystemVerilog UVM and coverage driven verification methodology History of building and improving UVM based verification methodology Knowledge on Chiplet Protocols - UCIe Skills Develop and execute verification plans Proficiency with C, Verilog, System Verilog and UVM based verification Experience in implementing advanced test benches, verification models, scoreboards/checkers. Knowledge in bus protocols - AXI, AHB, APB and bus interconnects Experience with test plan creation and test-bench development Experience with test development and test coverage assessment Excellent debugging and problem-solving skill Knowledge in various interfaces – PCIe, DP, UART, I2C, I2S, SPI, USB, SD Experience working on processor-based SoC -- ARC/ARM/RISC.. Create and modify SoC-level, and sub-system level test benches. Experience in setting up and running gate-level simulations Gate Level / Power-Aware simulations Great written and verbal communication skills Good Programming/Scripting skills with languages such as Python, Perl, TCL, and BASH Interest in ASICs, SoCs, flash memory, semiconductor components Strong team player who can collaborate with colleagues Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Show more Show less

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description Are you ready to push the boundaries of what's possible in technology? Join the trailblazers at Sandisk, as an ASIC RTL Design Engineer, you will be at the forefront of designing high-performance ASICs. By leveraging your expertise in RTL design and modern tools like GitHub Copilot, you will enhance the design process and productivity. You will collaborate with cross-functional teams to deliver groundbreaking solutions that meet our high standards of quality and performance. Key Responsibilities Innovate, implement, and verify RTL code for complex ASICs. Own SoC subsystems related to CPU complex, DDR, Host, Flash, Debug, Clocks, resets, Power domains etc. for top of the line flash controllers. Utilize advanced AI-driven tools, including GitHub Copilot, to streamline the design process. Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal solution Lead design reviews and provide mentorship to junior engineers. Work along side with the SoC Managers and SoC Leads to deliver best-in-class solution. Stay abreast of the latest industry trends and emerging technologies in AI and ASIC design. Qualifications Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field with 14-18 years of experience. Proven experience in ASIC RTL design, with a strong grasp of Verilog/System Verilog. Proficiency in leveraging AI tools, including GitHub Copilot, for design and development. Strong problem-solving skills and the ability to thrive in a dynamic environment. Excellent communication and teamwork abilities. Prior knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must. Preferred Qualifications Experience in low-power design techniques and methodologies. Prior knowledge with storage ASICs is a plus. Familiarity with high-speed interfaces (e.g., USB, SD Express, Compact Flash, PCIe, DDR). Proficiency in scripting languages (e.g., Python, TCL) for automation. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties And Responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 1+ years Hardware Engineering experience or related work experience. 1+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075279 Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we transform how the world uses information to enrich life for all. The pace is fast, collaboration occurs on a regular basis, and innovation is expected. As a test platform development Engineer within the Non-Volatile Engineering (NVEG) Product Engineer team, you will develop and qualify low-cost in-house engineering test platforms and solve complex problems. This role requires deep understanding of test hardware and software along with NAND, UFS and PCIe protocol knowledge. You will be responsible to enable the PE test infrastructure and test platforms to test, debug and characterizing the NAND component and System products by closely working with the cross functional teams such as Test Engineering and System Integration, ASIC and FW teams and assist Qualification and Ramping of cutting-edge NAND and System Micron products. The candidate's responsibility is to design, develop, debug and optimize the firmware for the test platform. Key Responsibilities Design, develop, and qualify product engineering test hardware, platforms, test firmware and software for non-volatile memory product bring up and debug. Design, develop, debug, validate and optimize firmware code for products. Collaborate with cross-functional teams, including Test Engineering & System Integration, ASIC, FW, Product Engineering and operations, to integrate FPGA designs with other system components. Provide engineering test solutions (HW & SW) for Product Development for NAND/System characterization and Silicon debug capabilities Drive and support new protocol enablement (SCA- Separate Command Address, ONFI, UFS, PCIe) and capability bring up Routinely communicate overall project status to leadership and cross functional product team Provide guidance through debug and resolution of product related issues Qualifications Successful candidates for this exciting opportunity will have: 8+ years of strong hands-on experience working on firmware development using C/C++ and good understanding of scripting languages including TCL, Perl/Python. Proficiency with GNU toolchain to compile, debug and build software applications. Experience in embedded systems, and good understanding of low-level firmware architecture. Knowledge of the entire firmware development lifecycle from requirements analysis, design, testing and maintenance. Knowledge of storage interface such as High Speed ONFI, UFS, PCIe, etc. Memory and Storage System behavior, architecture and design Working experience on NAND and non-volatile System products Experience with non-volatile memory, logic analyzers, oscilloscopes, and/or Automated Test Equipment (ATE) is preferred Familiar working on Unix/Linux terminal. Hands-on experience with hardware bring-up and debugging and understanding of hardware schematic and layout. Excellent data analysis, problem solving, and decision-making skills Ability to work independently in a very fast paced environment and adapt to change Drive to determine root-cause and provide corrective action for product issues Proficiency in using version control systems like Git for managing code repositories and collaboration. Self-motivated and enthusiastic in a challenging, dynamic environment Demonstrated ability to partner successfully with other groups to build strong peer relationships and achieve the best outcomes for Micron Education Position requires a minimum of a Bachelor's degree in Electrical, Electronics or Computer Engineering Course work in VLSI, semiconductor process is desirable, but not required About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities of your team will include, but are not limited to: Contributing to the development of new DRAM, emerging memory products and IP’s by enabling the overall design, layout, and optimization of Memory/Logic/Analog circuits Supporting design validation & verification, reticle experiments and required tape-out revisions Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure proper manufacturability of product Proactively solicit inputs from Standards, CAD, modeling, Technology Development groups to ensure the design quality and reliability Driving innovation into the future Memory generations within a dynamic work environment. Successful Candidates For This Position Will Have Experience leading a team of young engineers and technical subject matter experts Excellent communication skills with the ability to convey complex technical concepts to other design and verification peers in verbal and written form A mindset and passion for continuous learning, innovation, success, and enabling others to do the same Excellent problem-solving and analytical skills Extensive knowledge of Custom Circuit Design, Analog Design, Verification and Layout Knowledge about complete product design and development flow including: Memory Design Power network development & analysis Reliability analysis and improvements State machine modelling, design and verification Verification methodologies and frameworks including behavioral modeling, Timing analysis, equivalence check Familiarity with a scripting language (Python, Tcl, Perl, etc) Familiarity with various memory design architectures Good exposure to various CAD tools Qualifications Bachelors or Post Graduate Degree in Electronics Engineering or related engineering field 3+ years of experience About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less