1597 Tcl Jobs - Page 27

Key Responsibilities Define and implement DFT architecture for digital IP and SoCs. Insert and verify scan chains, boundary scan (JTAG), and test points. Develop and run ATPG and MBIST for various memory instances. Health insurance

About The Company (Industry & Sector) An advanced-technology scale-up at the crossroads of Quantum Computing, Artificial Intelligence and Semiconductor Engineering . The hardware division designs full-stack enterprise quantum computers—spanning superconducting processors, cryogenic control electronics and RF instrumentation—to unlock breakthroughs across life-sciences, finance, transportation and space. Role & Responsibilities Design and simulate novel superconducting-qubit circuits that will power India’s most powerful production quantum computer. Apply deep RF / microwave theory to optimise resonance, coupling and loss in on-chip cavities and interconnects. Drive multi-physics modelling in HFSS, Sonnet, COMSOL and ADS, validating results with cryogenic measurements. Collaborate with fabrication, control-electronics and theory teams to iterate processor architecture and tape-out flows. Analyse qubit-level metrics, author concise DoE reports and present design recommendations to leadership. Champion best practices in simulation automation, version control and peer design reviews within an agile R&D setup. Skills & Qualifications Must-Have Master’s or PhD in Physics, Electronics or Communication Engineering plus 2 + years’ experience designing superconducting qubits. Proven expertise in qubit-level circuit design, RF/microwave theory and superconducting-device analysis. Hands-on with HFSS, Sonnet, COMSOL and ADS for 3-D EM and multi-tone simulations. Familiarity with Linux environments and scripting (TCL / Python) to automate simulation and data-processing pipelines. Strong problem-solving and communication skills; thrive in cross-functional hardware teams. Team-player mentality with a bias for rapid experimentation and data-driven design iteration. Preferred Experience in RF or mixed-signal PCB design for cryogenic or microwave subsystems. Prior work characterising or simulating Josephson-junction devices and qubit coherence limits. Ability to interpret RF component datasheets and translate specs into layout constraints. Familiarity with yield-optimisation techniques and SPC dashboards for nanofabrication flows. Publications or patents in quantum-hardware design or superconducting circuits. Contributions to open-source EM simulation or quantum-design toolchains. Skills: numerical tool-chains,comsol,problem-solving,coherence times measurement,statistical process control,cleanroom safety,superconducting-qubit error-correction schemes,gate fidelity measurement,ldpc codes,numerical methods,quantum-software stacks,circuit design,peer-reviewed publications,semiconductor,experimental protocols,data processing in matlab,matlab,dry etching,collaboration,quantum computing,data-driven design,automated data acquisition,quantum-state & process tomography,afm,qubit-control schemes,dynamical decoupling,artificial intelligence,optical lithography,python-based quantum platforms,quantum error-correction codes,hfss,thin-film deposition,rf/microwave theory,process-automation scripts,quantum device characterization,sem,wet etching,cryogenic fixture design,communication,quantum-process tomography,computational modelling of quantum circuits,superconducting qubit design,error-correction concepts,tcl,circuit qed,linux,hamiltonian engineering,teamwork,sonnet,team collaboration,quantum hardware,ads,error-mitigation techniques,fault-tolerant architectures,python,quantum-state tomography,e-beam lithography,data processing in python,surface codes,xrd

About The Company (Industry & Sector) An advanced-technology scale-up at the crossroads of Quantum Computing, Artificial Intelligence and Semiconductor Engineering . The hardware division designs full-stack enterprise quantum computers—spanning superconducting processors, cryogenic control electronics and RF instrumentation—to unlock breakthroughs across life-sciences, finance, transportation and space. Role & Responsibilities Design and simulate novel superconducting-qubit circuits that will power India’s most powerful production quantum computer. Apply deep RF / microwave theory to optimise resonance, coupling and loss in on-chip cavities and interconnects. Drive multi-physics modelling in HFSS, Sonnet, COMSOL and ADS, validating results with cryogenic measurements. Collaborate with fabrication, control-electronics and theory teams to iterate processor architecture and tape-out flows. Analyse qubit-level metrics, author concise DoE reports and present design recommendations to leadership. Champion best practices in simulation automation, version control and peer design reviews within an agile R&D setup. Skills & Qualifications Must-Have Master’s or PhD in Physics, Electronics or Communication Engineering plus 2 + years’ experience designing superconducting qubits. Proven expertise in qubit-level circuit design, RF/microwave theory and superconducting-device analysis. Hands-on with HFSS, Sonnet, COMSOL and ADS for 3-D EM and multi-tone simulations. Familiarity with Linux environments and scripting (TCL / Python) to automate simulation and data-processing pipelines. Strong problem-solving and communication skills; thrive in cross-functional hardware teams. Team-player mentality with a bias for rapid experimentation and data-driven design iteration. Preferred Experience in RF or mixed-signal PCB design for cryogenic or microwave subsystems. Prior work characterising or simulating Josephson-junction devices and qubit coherence limits. Ability to interpret RF component datasheets and translate specs into layout constraints. Familiarity with yield-optimisation techniques and SPC dashboards for nanofabrication flows. Publications or patents in quantum-hardware design or superconducting circuits. Contributions to open-source EM simulation or quantum-design toolchains. Skills: numerical tool-chains,comsol,problem-solving,coherence times measurement,statistical process control,cleanroom safety,superconducting-qubit error-correction schemes,gate fidelity measurement,ldpc codes,numerical methods,quantum-software stacks,circuit design,peer-reviewed publications,semiconductor,experimental protocols,data processing in matlab,matlab,dry etching,collaboration,quantum computing,data-driven design,automated data acquisition,quantum-state & process tomography,afm,qubit-control schemes,dynamical decoupling,artificial intelligence,optical lithography,python-based quantum platforms,quantum error-correction codes,hfss,thin-film deposition,rf/microwave theory,process-automation scripts,quantum device characterization,sem,wet etching,cryogenic fixture design,communication,quantum-process tomography,computational modelling of quantum circuits,superconducting qubit design,error-correction concepts,tcl,circuit qed,linux,hamiltonian engineering,teamwork,sonnet,team collaboration,quantum hardware,ads,error-mitigation techniques,fault-tolerant architectures,python,quantum-state tomography,e-beam lithography,data processing in python,surface codes,xrd

90/130/150nm and higher node with PMIC layout experience. Performs layout and takes corrective actions in such a way that the final result meets all requirements as stated in the Design document, section layout, including all remarks from review, the customer and back annotation. Performs layout in such a way that the final result meets all general layout guidelines and matches 1-to-1 with parameter devices and hierarchy used in simulations. Create floorplan Performs DRC and takes corrective actions if needed until DRC is error free Performs LVS and takes corrective actions if needed until result is successful Performs layout in such a way that final result meets the foundry layout rules. Provides extracted netlist for back annotation to DE as specified in the Design document, section layout. Translates sub block schematics to sub block layouts, taking care of the same hierarchical build-up and respecting the guidelines of the Block review document, section layout. Adds extra useful information to the Block review document, section layout.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled R&D Staff Engineer passionate about pushing the boundaries of static low power verification products. With 5 to 8 years of experience in software engineering, you have honed your expertise in C/C++ and possess a robust understanding of data structures and algorithms. Your background in Electronic Design Automation (EDA) tools and methodologies, coupled with your knowledge of Verilog, SystemVerilog, and VHDL, positions you as a leader in your field. You are a proactive problem-solver with a keen eye for detail, and you thrive in collaborative environments where you can lead and inspire a team. Your self-motivation and discipline drive you to set and achieve personal goals consistently, and your commitment to quality ensures that your contributions make a significant impact. Based in Noida or Bangalore, you are ready to take on new challenges and help shape the future of technology. What You’ll Be Doing: Designing and developing state-of-the-art EDA tools with innovative algorithms. Collaborating with local and remote teams to ensure seamless integration and execution. Working directly with customers to understand requirements, provide online debugging, and track delivery and execution. Leading a small team of 2-3 members, guiding them through technical challenges and project milestones. Contributing to the continuous improvement of our static low power verification product. Exploring new architectures and leading the charge in developing cutting-edge solutions. The Impact You Will Have: Driving the development of advanced EDA tools, contributing to the efficiency and effectiveness of chip design. Enhancing the quality and reliability of our static low power verification product. Providing critical support to customers, ensuring their needs are met and fostering long-term relationships. Leading and mentoring junior engineers, fostering a culture of innovation and excellence within the team. Contributing to Synopsys' reputation as a leader in the semiconductor and EDA industries. Playing a pivotal role in the successful execution of projects, meeting deadlines, and exceeding expectations. What You’ll Need: Fluency in C/C++ with a strong background in data structures and algorithms. Experience with UPF and familiarity with Tcl and Python-based development on Unix (preferred). Knowledge of Verilog, SystemVerilog, and VHDL HDL (preferred). Experience with production code development on Unix/Linux platforms. Ability to develop new architectures and demonstrate strong leadership skills. Who You Are: You are a dynamic and innovative engineer with a passion for technology and a commitment to quality. You possess excellent problem-solving skills and the ability to think critically and creatively. As a self-motivated individual, you set personal goals and work diligently to achieve them. Your leadership skills enable you to guide and inspire your team, fostering a collaborative and productive work environment. You are detail-oriented, ensuring that your work meets the highest standards of quality and reliability. Your experience in EDA tools and methodologies, coupled with your knowledge of hardware description languages, positions you as a valuable asset to our team. The Team You’ll Be A Part Of: You will be part of the Static Verification team, a group of talented engineers dedicated to developing and enhancing our static low power verification products. This team collaborates closely with other departments, including design, development, and customer support, to ensure seamless integration and execution. Together, you will work on cutting-edge projects that push the boundaries of technology and contribute to the success of Synopsys and its customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

About the job 🚀 About the Role ExcelR is seeking an experienced and passionate Freelance Trainer for our comprehensive Full Stack Web Development Program. You will train aspiring developers through a 50-day structured curriculum focused on real-world application development, interview preparation, and end-to-end deployment at College Campus 🧑‍💻 What You’ll Teach (Curriculum Overview) ✅ Frontend Development (40 Days) HTML5: Text, Media, Forms, Tables, Semantic Tags, Meta Tags CSS3: Box Model, Flexbox, CSS Grid, Responsive Design, Pseudo-classes, Transitions JavaScript (ES6+) ReactJS: JSX, Components, State, Props, useEffect, useRef, useMemo, Forms, Routing Bootstrap Mini Projects & CRUD App Frontend Deployment ✅ Backend Development Node.js & Express.js REST API design and integration ✅ Database Skills (10 Days) MySQL SQL Queries, Joins, Aggregations DDL, DML, TCL Commands Analytical/Window Functions 📌 Requirements Proven experience as a Full Stack Developer or Trainer Hands-on expertise with HTML, CSS, JS, React, Django/FastAPI/Node.js Strong SQL skills (MySQL) Prior teaching/training/mentoring experience preferred Excellent communication and presentation skills Ability to explain complex topics to beginners effectively Comfortable using Zoom, Google Meet, or Microsoft Teams 🎯 Preferred Qualifications Bachelor's degree in Computer Science Engineering. 5 + Years Experience delivering training in bootcamp or corporate environments Familiarity with online learning tools and live coding sessions

🚀 About the Role ExcelR is seeking an experienced and passionate Freelance Trainer for our comprehensive Full Stack Web Development Program . You will train aspiring developers through a 50-day structured curriculum focused on real-world application development, interview preparation, and end-to-end deployment at College Campus 🧑‍💻 What You’ll Teach (Curriculum Overview) ✅ Frontend Development (40 Days) HTML5: Text, Media, Forms, Tables, Semantic Tags, Meta Tags CSS3: Box Model, Flexbox, CSS Grid, Responsive Design, Pseudo-classes, Transitions JavaScript (ES6+) ReactJS: JSX, Components, State, Props, useEffect, useRef, useMemo, Forms, Routing Bootstrap Mini Projects & CRUD App Frontend Deployment ✅ Backend Development Node.js & Express.js REST API design and integration ✅ Database Skills (10 Days) MySQL SQL Queries, Joins, Aggregations DDL, DML, TCL Commands Analytical/Window Functions 📌 Requirements Proven experience as a Full Stack Developer or Trainer Hands-on expertise with HTML, CSS, JS, React, Django/FastAPI/Node.js Strong SQL skills (MySQL) Prior teaching/training/mentoring experience preferred Excellent communication and presentation skills Ability to explain complex topics to beginners effectively Comfortable using Zoom, Google Meet, or Microsoft Teams 🎯 Preferred Qualifications Bachelor's degree in Computer Science Engineering. 5 + Years Experience delivering training in bootcamp or corporate environments Familiarity with online learning tools and live coding sessions

Job Description 1-4 Years of Hands-on experience with Windows and Linux operating systems; administration knowledge is preferred. Proficient in Oracle or MSSQL Server with DBA administration skills preferred. Experience working with application servers/web servers such as Apache, Tomcat; WebSphere/WebLogic experience is acceptable but not the primary requirement. Familiarity with load balancers such as Apache, Big IP-F5, HAProxy, and Netscaler. Ability to deploy new solutions under pressure and deliver high-quality services to demanding clients. Strong system administration skills with a keen interest in network administration and load balancing. Fast learner capable of quickly installing and configuring the latest versions of DS Software. Optional knowledge of the 3DExperience platform, including e-Matrix, MatrixOne, Enovia, EXALEAD, and related installation, upgrade, troubleshooting, and support. MQL/TCL knowledge, basic/intermediate CATIA client skills, and functional understanding of Enovia/MatrixOne/3DExperience are added advantages. (ref:hirist.tech)

Job Overview: Cadence Design Systems is looking for a highly motivated software engineer to work with the R&D engineering team in the Digital & Signoff Group. R&D Software Engineering role in Physical Verification area is a multi-faceted position encapsulating a mix of physical verification software development, algorithm development, software debugging, performance optimization, accuracy analysis, GUI development and integration with layout/schematic editors. R&D engineers collaborate with a large team of EDA professionals across multiple geographical regions to create and deliver best in class next generation software for physical IC application. R&D engineers work on complicated applications and interface them with other applications in a large suite of highly connected modules to enable next-generation physical verification solutions with superior performance and usability. R&D engineers develop code that satisfies the requirements for successful semiconductor design deployment. As R&D Engineer you will be part of a team responsible for designing, developing, troubleshooting, debugging and supporting critical projects. You will have a chance to contribute to the main Physical Verification flows in EDA industry and your work will be visible through billions of electronic devices deployed worldwide. Job Responsibilities: As Lead Software Engineer, this person will be responsible for the following software engineering activities: Write code implementing product requirement specifications Write and maintain unit tests and other tests as needed for implemented features and enhancements Participate in code reviews. Work with PE (Product Engineering) and QPV (Quality Product Validation) to review code quality and coverage of requested functionality Provide code fixes as requested by bug tracking system This person should have personality & communication skills for working within the R&D group, and with cross functional groups, such as PE, QPV, CM This person should be able to work independently, being able to collaborate remotely with team members. Job Qualifications: 5+ years of C++ development using object-oriented methodology Understand algorithm complexity and data structures Be able to write and debug multithreaded applications Have good experience writing Qt-based applications (model-view is mandatory) Successful candidate should have the knowledge of LISP or Tcl. Educational Qualification: BE/BTech/ME/MTech in CS/ECE/EE or equivalent Additional Skills/Preferences: experience with physical verification schematic and layout design experience with SKILL programming object oriented design basics Additional Information: Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.

Position: RTL Design Engineer Experience: 5 - 8 Years Qualifications: BE/Btech in ECE/EEE Responsibilities - The candidate should have strong RTL design experience. Strong design experience in Ethernet IPs or Ethernet protocol domain. Knowledge in Verilog/VHDL languages Scripting languages: TCL/Perl/Python (any one). Knowledge of AXI Protocols.

ob Title: Store Promoter — TCL Location: [Kerala] Job Description: We are looking for enthusiastic Store Promoters to represent TCL at retail outlets. You will engage with customers, explain TCL products (TVs, ACs, home appliances), and help them choose the right products. You will be responsible for achieving sales targets, maintaining attractive displays, and ensuring a great in-store experience. Requirements: Minimum 12th pass; graduates preferred. 6 months to 1 year of experience in retail or promoter roles (electronics preferred). Good communication and selling skills. Energetic, customer-focused, and target-driven. Flexible to work on weekends and holidays. What We Offer: Attractive salary, performance-based incentives, and opportunities to grow with a leading global brand.

CATIA V6 Working Experience on Using CATIA V6 & PLM application. Experience in Wheels ,Tyres & Braking System Stellantis know-how Synthesis and verification of the necessary input data/documents. Develop supplier consultation files (Int/Ext) for a 'complex' component in series production or a 'simple/complex' component purchased as part of a new PTF or new vehicle, or a 'simple/complex' component in development Manage the BE Formalization of consultation documents for a 'complex' component in series production or a 'simple/complex' component purchased as part of a new PTF or new vehicle, or a 'simple/complex' component in development Supplier management (including new) Technical reviews Management of the Development Schedule Management of the Organic and Subsystem Digital and Physical Validation Plan Management of quality/Risk convergence Project Reporting Use of CAD software or other specific software Contribute the QCDP synthesis of the component/Capitalization

Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : SAP S/4HANA Embedded Production Planning and Detailed Scheduling (EPPDS) Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary Experience in Production Planning and Detailed Scheduling in SAP S/4HANA embedded PP/DS Planning Demand in the Supply Chain Roles & ResponsibilitiesExperience in Production Planning and Detailed Scheduling in SAP S/4HANA embedded PP/DS.- Expected to be an SME.- Collaborate and manage the team to perform.- Responsible for team decisions.- Engage with multiple teams and contribute on key decisions.- Provide solutions to problems for their immediate team and across multiple teams.- Facilitate knowledge sharing sessions to enhance team capabilities.- Monitor project progress and ensure timely delivery of application features. Professional & Technical Skills: Production Planning Results Evaluation:Production Planning executing and evaluating the Planning Run Results with Alerts Planning Procedure:Configuring Basic Parameters for Planning / Executing the Production Planning Run / Planning a Product Using the Planning Procedure Order Creation with Product Heuristics:Using Demand Management in PP/DS / Planning Make-to-Order Production Using PP/DS / Using Firming in PP/DS / Configuring Product Heuristics Scheduling in Production Planning:Determining the Source of Supply of the Order / Scheduling Operations with the Strategy Profile / Scheduling a Planned Order for Production Pegging in Production Planning:Configuring Dynamic and Fixed Pegging Scheduling Operations with the Detailed Scheduling Planning BoardPlanning Production with Detailed Scheduling Strategies and Heuristics / Managing Setup Times with the Setup Matrix / Managing Scheduling with the PP/DS Optimizer. Qualification 15 years full time education

Teamcenter client-side customization, server-side customization.T4S Integration / Teamcenter SAP Integration / T4EA Integration. C/C++, BMIDE configuration, ITK, TCL. Modules - Structure Manager, Workflows, Change Management, Access control.

Job Description : Hands on experience in Block level PnR convergence with Synopsys ICC2/Cadence Innovus and timing convergence in PTSI/Tempus In this position, candidate is expected to lead all block/chip level PD activities including floor plans, placement, CTS, optimization and routing techniques, RC extraction, STA, EM/IR DROP, PV Familiar with deep sub-micron designs below 10nm preferred BE/B Tech/ME/M TECH

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 5+ years Hardware Engineering experience or related work experience. 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 12+ years Hardware Engineering experience or related work experience. 12+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 8+ years Hardware Engineering experience or related work experience. 8+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 2+ years Hardware Engineering experience or related work experience. 2+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Product validation and Customer support for High Level Synthesis & Verification Siemens EDA is a leader in automation software for electrical and electronic industries. We enable companies to develop better products faster and more efficiently. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex world of electrical, PCB, and chip design. About the Group: Calypto System Design's Central Engineering Group (CEG) works on pioneering tools like Catapult for High-Level Synthesis, CCOV and SLEC systems for High-Level Verification, and PowerPro for power analysis and optimization. The Product Validation and Customer Support team ensures quality products and satisfied customers in the High-Level Synthesis market. We are a team driven by energy, commonality, and passion. Why Join Us? Do you like to challenge yourself and find innovative solutions to problems, translating them into efficient code? Do you always enjoy learning new things? Are you ready to work on the next-generation synthesis solution technology? If the answer is yes, then come work with us! We don’t need superheroes, just super minds. Role: As an integral part of the Product Validation and Customer Support team, you will test and validate different features of Catapult, CCOV, and SLEC systems, including writing testing specifications and supporting test cases. You will provide solutions and answers to end-users' or field AEs' queries on product usage and identify gaps in the product. You will also maintain the test environment and regression, crafting automated scripts to ensure smooth functioning. Key Responsibilities: Lead projects related to different features of the HLS/HLV product, develop test plans, create test cases, and identify issues and gaps. As the internal end-user of the tool, take measures to improve the quality of the product and test environment. Use technical expertise to respond to customer queries, demonstrate products and their flow, and analyze all incoming issues and queries from customers to identify gaps and improve the product. This role may involve interaction with customers on critical issues to narrow down problems. Support and debug customer design methodologies using our products, produce benchmark data if needed, and participate in architecture reviews and feature prototyping. Understand the tool and user expectations to bring out the best in the tool. Technical Skills (Must Have): B.Tech (EE/ECE/CS) or M.Tech (VLSI/Microelectronics/Embedded Systems) Proficiency in C/C++ for HLS is required. System C is a plus. Experience in running, debugging, validating, and profiling programs on HW design (digital domain) is a huge advantage. Basic knowledge of Verilog/VHDL and experience in Logic Synthesis/High-Level Synthesis is a plus. Knowledge of one of the scripting languages like Perl, Tcl, and experience with LINUX platforms. Excellent problem-solving and analytical skills. Self-motivated and ambitious thinker. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday Accelerate transformation #LI-EDA #li-hybrid

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties And Responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 3+ years Hardware Engineering experience or related work experience. 3+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075845

Job Description: We are looking for a RTL Design Engineer with expertise in SoC and IP-level design and integration. The ideal candidate should have a strong background in RTL coding, architecture-level understanding, and industry-standard quality checks and tools. Key Responsibilities: Develop RTL code in Verilog/SystemVerilog Understand and apply top-level SoC architecture concepts Perform SoC and IP-level integration Implement RTL quality checks including CLP (mandatory), LINT, CDC, RDC, VSI Work on design partitioning (Tilification) Handle IORING, PHYs, GPIOs Collaborate with verification and backend teams Required Skills: RTL coding in Verilog and SystemVerilog IPXACT knowledge Clock Domain Crossing (CDC), Reset Domain Crossing (RDC) UPF and SDC concepts Tools: VC_static, SpyGlass (Lint, CDC, RDC), 0in, Formality, Conformal LEC Scripting: Perl, Python, TCL Nice to Have: Experience with design quality metrics and standards Exposure to physical-aware RTL design

Roles and Responsibilities: Work with offshore and global teams to understand project scope including analysis domain, boundary condition, material models, type of analysis etc. Active Coordinator for multiple groups that include Design, Aerodynamics and Structures teams for Project specific inputs Ability to work autonomously and prioritize multiple projects Review technical presentations, interpret the results and present the same to Customer Expertise in dealing with Design and Technical Discipline reviews Responsible for ensuring 100% quality and on-time delivery Conduct project review meetings to share the lessons learned and best practices to the team to improve the quality Responsible for providing alternative solutions on field issues Responsible for process improvements by developing Automation tools Work on complex CAE problems to assist product development Prepare Technical proposals and Business cases for new process improvement areas Perform Design Modifications as per need and validating the same with FEA Demonstrate Excellent Technical, Project Management, Interpersonal and Problem solving skills Mandatory skills: Minimum 6 years of experience in Stress analysis of Mechanical components (Aero, Rail, Automobile and Industrial) using ANSYS-APDL/Workbench/HyperMesh/ OptiStruct Should have a basic knowledge in FEA Theory, Solid mechanics, Machine design and Fatigue. Expertise in handling various structural analysis tools preferably ANSYS Classic, Ansys Workbench, HyperMesh etc 2D & 3D Finite Element modeling of simple, moderate and complex components (Hexahedral & tetrahedral elements) using ANSYS-APDL or Workbench Linear and non-linear static stress analysis (Geometric, Material and contact Linearity) using ANSYS-APDL or Workbench Modal, Harmonic and transient Dynamic stress analysis using ANSYS-APDL or Workbench Strength, stability and Durability of components Damage tolerance analysis to estimate fracture life Should able to develop/modify APDL Macros Should able to build/update FE Models in HyperMesh. Desired Skills: Experience in scripting using Matlab, VB,TCL/Tk, Python is an added advantage Knowledge of Hand Calculations, Standards and Design codes is an added advantage Basic Knowledge of CAD tools is and added advantage

Roles and Responsibilities: Work with offshore and global teams to understand project scope including analysis domain, boundary condition, material models, type of analysis etc. Active Coordinator for multiple groups that include Design, Aerodynamics and Structures teams for Project specific inputs Ability to work autonomously and prioritize multiple projects Review technical presentations, interpret the results and present the same to Customer Expertise in dealing with Design and Technical Discipline reviews Responsible for ensuring 100% quality and on-time delivery Conduct project review meetings to share the lessons learned and best practices to the team to improve the quality Responsible for providing alternative solutions on field issues Responsible for process improvements by developing Automation tools Work on complex CAE problems to assist product development Prepare Technical proposals and Business cases for new process improvement areas Perform Design Modifications as per need and validating the same with FEA Demonstrate Excellent Technical, Project Management, Interpersonal and Problem solving skills Mandatory skills: Minimum 6 years of experience in Stress analysis of Mechanical components (Aero, Rail, Automobile and Industrial) using ANSYS-APDL/Workbench/HyperMesh/ OptiStruct Should have a basic knowledge in FEA Theory, Solid mechanics, Machine design and Fatigue. Expertise in handling various structural analysis tools preferably ANSYS Classic, Ansys Workbench, HyperMesh etc 2D & 3D Finite Element modeling of simple, moderate and complex components (Hexahedral & tetrahedral elements) using ANSYS-APDL or Workbench Linear and non-linear static stress analysis (Geometric, Material and contact Linearity) using ANSYS-APDL or Workbench Modal, Harmonic and transient Dynamic stress analysis using ANSYS-APDL or Workbench Strength, stability and Durability of components Damage tolerance analysis to estimate fracture life Should able to develop/modify APDL Macros Should able to build/update FE Models in HyperMesh. Desired Skills: Experience in scripting using Matlab, VB,TCL/Tk, Python is an added advantage Knowledge of Hand Calculations, Standards and Design codes is an added advantage Basic Knowledge of CAD tools is and added advantage

About the Company Mempage Technologies is dedicated to providing Product Engineering Services and Building Future Technology to simplify life. Our innovative work spans R&D, MVPs, products, and technology services, leveraging cutting-edge technologies like AI, IoT, Edge, and Cloud computing. Our areas of expertise include smart agriculture, smart grid, healthcare, logistics, and gaming. Additionally, we offer application development, Salesforce, Oracle, and UI/UX product and project services. We serve top-tier clients such as Emaar, Radisys, AMD, and Qualcomm from our offices in India, Malaysia, and the USA. About the Role 🚀 We're Hiring – Post-Silicon Validation Engineer / Embedded Test Engineer 📍 Location: Hyderabad 🧠 Experience: 3–6 Years 🕐 Notice Period: Immediate to 30 Days Preferred 🔧 Key Skills Required: • Strong programming skills in C/C++ • Familiarity with AMD tools – Vivado, Vitis • Experience in scripting using TCL/Python • Sound understanding of Embedded Systems • Knowledge of hardware: Processors, SoC, FPGA, Memory interfaces • Hands-on with communication protocols: SPI, I2C, USB • Excellent problem-solving and hardware debugging skills • Basic working knowledge of Linux 📩 Apply now or share your resume at: akshita@mempagetech.com