Simulation Engineer

We’re Hiring – Simulation Engineer (6–10 Years Experience)

Gandhinagar, Gujarat

Key Responsibilities:

• Develop simulation models for SoC and ASIC designs (functional validation, timing, and cycle-accurate modeling).
• Develop architectural high level simulation models for design space tradeoffs, including performance modeling and estimation.
• Work with RTL engineers to convert architectural simulation into detail RTL design.
• Work with Verification Team on test plan development to achieve high code coverage and functional coverage.
• Incorporate software code emulation to validate simulation models.

Skills:

• Languages: C/C++, Verilog, Python
• Design verification
• ASIC design flow/tools
• Functional coverage

Experience/knowledge:

• Knowledge in advanced nodes, low power SoCs, internal & external IP integration and high performance RISC-V are essential.
• Register-transfer-level (RTL), digital logic design, logic synthesis, clock trees optimization, timing closure, test bench development, circuit analysis, floor-planning, physical layout, and design for test (DFT), prototype bring-up, debug and validation.
• Knowledge on synthesis, timing analysis and formal verification.
• Track record of 'first-pass success' in ASIC development.
• Hands-on experience in Verilog, System Verilog, UVM, C/C++, Python based verification.
• Experience in Cluster and SoC level verification using Hybrid Simulation and Emulation based methodologies.
• Proficiency in scripting languages such as Python, Perl, or TCL to build tools and flows for verification environments.
• Experience using analytical skills to craft novel solutions to tackle industry-level complex designs.
• Demonstrated experience with effective collaboration with cross functional teams.

Preferred Qualifications:

• 6-10 years of experience in development of simulation, modeling and acceleration frameworks.
• Experience in performance verification of complex compute blocks like CPU, GPU or Hardware Accelerators, Ethernet, PCIe, DDR, HBM etc.
• Experience in verification of AI acceleration design.
• Experience with development of fully automated flows and scripts for data exploration, analysis and performance verification.
• Experience with verification of ARM/RISC-V based sub-systems or SoCs.

Location:

👉 Apply now / Reach out directly via DM or email at: vpatel@veevx.com

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