1691 Physical Design Jobs - Page 11

Position Summary Role and Responsibilities About Samsung Semiconductor India Research (SSIR) With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segmentsin component solutions, featuring industry-leading technologies inSystem LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions,AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPsand much more. As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers...

Key Responsibilities Lead block-level PNR from floorplanning through routing, ensuring implementation meets timing, power, and area targets Design robust power grids and implement EM/IR-aware routing for block-level power integrity Work closely with timing engineers to resolve PPA bottlenecks affecting timing and signal integrity Manage and optimize physical verification including DRC, LVS, antenna checks, and physical signoff Automate PNR flows using scripting to enhance productivity and design quality Mentor junior engineers and promote best practices in physical design methodology Coordinate with RTL, STA, verification, and backend integration teams for block-to-chip integration

As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will involve working on circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Your collaboration with cross-functional teams will be essential in developing solutions and meeting performance requirements. **Key Responsibilities:** - Plan, design, optimize, verify, and test electronic systems - Work on circuits, mechanical systems, Digital/Analog/RF/optical systems, test systems, ...

As a Physical Design Engineer, you will be responsible for the physical design of ASICs. This includes tasks such as floorplanning, clock tree synthesis, placement, routing, timing closure, and physical verification. Your contributions will be crucial to the successful tape out cycles of multiple chips, ensuring the efficiency of the PD life cycle and ECO life cycle. Your expertise in clock-tree synthesis and power-aware PD flows, such as ADM, P&R, will be essential for the project's success. Additionally, your familiarity with PD-STA, timing constraints, and multi-mode, multi-corner timing closure will play a key role in achieving project milestones. **Qualifications Required:** - 3+ years ...

Expertise in ASIC PD Expertise in digital physical design Expertise in working with 3nm & 5nm technology nodes Expertise in EDA synthesis, APR, STA tools and methodologies Expertise in one or more of the following tools ICC, ICC2, Innovus, Olympus Working knowledge of one or more of the following tools Primetime, Calibre, and Red hawk Expertise in working with multi modes and multi corners STA Working Knowledge of multiple power planes and multiple VT libraries Basic domain knowledge of EM, IR, RV analysis, Noise and Formal Equivalence Verification Good at scripting languages PERL, TCL, shell Worked on at least 2 tape ins of moderate to high speed designs with multiple power planes Debug, fi...

Work closely with architecture, RTL, PD and power management teams for coming up with the chip low power intent and UPF. Work with architecture, RTL and PD team for chip level power estimation, analysis and optimization Work closely with CAD team to come up with new flows and methodologies in the power analyisis and low power domains. PREFERRED SKILLSET: 8+ years of professional experience in the industry in low power and power estimation domains. Hands on experience on industry standard tools especially PTPX, Power Artitst, VCLP and CLP. Good in scripting languages such as Tcl and Perl Self driven, positive attitude and team worker

RTL2GDS flow creation and qualification for Synthesis, Place and Route, Extraction, Timing and Physical Verification Will be closely collaborating with EDA vendors and PDK to define, implement, customize, and qualify digital design flows Uses TCL, Python, Pandas and Google APIs to create automation for flow regressions, to collect and compare flow errors, warnings and key design metrics to ensure good quality PDK release and released flow backward compatibility to PDK Use reference flows to perform cross tool and PDK PPA benchmarking Define and generate design testcases to target and measure specific aspects of GLOBALFOUNDRIES PDK and technology changes Work independently in an international...

Seeking an experienced Delivery Lead to oversee the overall service delivery management for our Oracle Managed Services project. The Delivery Lead will ensure adherence to Service Levels described in the agreement and collaborate closely with the client's Service Delivery management personnel. The role involves managing the compilation of metrics around open tickets, backlog, aging, etc., and driving metrics-driven continuous improvement and customer satisfaction. Responsibilities: Oversee overall service delivery management Ensure adherence to Service Levels Collaborate with client Service Delivery management personnel Manage the compilation of metrics around open tickets, backlog, aging, e...

Seeking an experienced Delivery Lead to oversee the overall service delivery management for our Oracle Managed Services project. The Delivery Lead will ensure adherence to Service Levels described in the agreement and collaborate closely with the client's Service Delivery management personnel. The role involves managing the compilation of metrics around open tickets, backlog, aging, etc., and driving metrics-driven continuous improvement and customer satisfaction. Responsibilities: Oversee overall service delivery management. Ensure adherence to Service Levels. Collaborate with client Service Delivery management personnel. Manage the compilation of metrics around open tickets, backlog, aging...

As a Manager Sales for IC Design Services, your primary role will involve driving business growth by understanding semiconductor design workflows, design services outsourcing, and establishing strong networks within fabless companies, design centers, and OEMs in India. You will be pivotal in client acquisition, relationship management, and deal closure. Key Responsibilities: - Develop and execute sales strategies to expand the IC design services business in India. - Identify and engage with potential customers in sectors like automotive, consumer electronics, telecom, and IoT. - Showcase our capabilities in RTL Design, Verification, Physical Design, Analog/Mixed-Signal Design. - Cultivate an...

About The Role Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : SAP FI S/4HANA Accounting Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Developer, you will be involved in designing, building, and configuring applications to meet business process and application requirements. Your typical day will revolve around creating innovative solutions to address specific business needs and ensuring seamless application functionality. Roles & Responsibilities:- Liaising...

Work Location : Bangalore, Beijing, Moscow, Noida, Taiwan, Vietnam Work Expertise : 3 - 8 years Desired Profile : - Expertise in ASIC PD - Expertise in digital physical design - Expertise in working with 3nm & 5nm technology nodes - Expertise in EDA synthesis, APR, STA tools and methodologies - Expertise in one or more of the following tools ICC, ICC2, Innovus, Olympus - Working knowledge of one or more of the following tools Primetime, Calibre, and Red hawk - Expertise in working with multi modes and multi corners STA - Working Knowledge of multiple power planes and multiple VT libraries - Basic domain knowledge of EM, IR, RV analysis, Noise and Formal Equivalence Verification - Good at scr...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the worlds most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_Job Description:We are seeking a highly experienced and innovative Fellow to join our Physical ...

Role Overview: As a Manager Sales for IC Design Services, your primary role will involve driving business growth by understanding semiconductor design workflows, design services outsourcing, and establishing strong networks within fabless companies, design centers, and OEMs in India. You will be pivotal in client acquisition, relationship management, and deal closure. Key Responsibilities: - Develop and execute sales strategies to expand the IC design services business in India. - Identify and engage with potential customers in sectors like automotive, consumer electronics, telecom, and IoT. - Showcase our capabilities in RTL Design, Verification, Physical Design, Analog/Mixed-Signal Design....

Qualifications Education: Graduate or Postgraduate Experience: Minimum 4+ years in the relevant field Skills: Strong communication and organizational abilities

Meta is hiring talented individuals to join our Infrastructure organization as ASIC Frontend Implementation Engineers (RDC/CDC). In this role, you will play a critical part in designing and developing efficient System on Chip (SoC) and IP for data center applications. As an ASIC Frontend Implementation Engineer, your primary focus will be on the front-end implementation process and static verification tools, transforming RTL designs into optimized netlists. You will utilize your expertise in RTL Lint, CDC analysis, timing constraints, and synthesis to ensure seamless integration of various components to build efficient System on Chip (SoC) and IP for data center applications. By joining our ...

Position: DFT Engineer (SI46FT RM 3607) Job Description: We are seeking experienced DFT Engineers with strong expertise in Scan, ATPG, and MBIST for SoC/ASIC designs. The role focuses on implementation, pattern generation, and verification of DFT features to ensure high test coverage and silicon readiness. Key Responsibilities: Implement and verify Scan, ATPG, and MBIST for complex SoCs. Perform pattern generation, coverage analysis, and debug. Integrate and validate MBIST with appropriate memory test algorithms. Coordinate with RTL and Physical Design teams for smooth DFT integration and signoff. Develop automation scripts to streamline DFT flows. Required Skills: Minimum 4 years of DFT exp...

Single Line Diagram (SLD) of Plant wide power distribution. schematics and three line diagrams. Conceptualization and Development various electrical layouts such as substation layout, earthing layouts, cable tray/ trench layouts, illumination and lighting protection layout, bus duct layout. Developing physical design deliverables in compliance with Indian/ International codes & standards, OEM recommended practice). Cable routing and developing cable scheduling . Proficiency in 3D. Experience on E3D is preferred. Vendor dwg review and approval. cable schedule and interconnection schedule. Estimation of electrical bulk item such as cables, cable trays, earthing materials, terminations Coordina...

Who we are Kinara is a Bay Area-based venture backed company. Our architecture is based on research done at Stanford University by Rehan Hameed and Wajahat Qadeer under the guidance of legendary Prof. Mark Horowitz (http://www-vlsi.stanford.edu/horowitz/) and Prof. Christos Kozyrakis (http://csl.stanford.edu/christos/). What we do Our game-changing AI solutions revolutionize what people and businesses can achieve. Ara inference processors combined with our SDK deliver unrivaled deep learning performance at the edge to accelerate and optimize real-time decision making where every millisecond is critical, and power efficiency is a must. Kinara solutions embed high-performance AI into edge devi...

Job Description In your new role you will: Contribute to the implementation of highly complex automotive SoC designs in a multi-site organization covering all aspects of Physical Design. Work independently in different phases of the RTL2GDS flow: With focus on (one or many) Synthesis, Constraints and equivalence check, Generation of Floorplans, Placement, Clock Trees, Routing and Power Distribution Network for efficient Timing Closure with Signal Integrity and Physical Sign off including Power Integrity Work with industry standard tools for physical design and signoff with good understanding of scripting languages (shell, perl, tcl) and Make flow. Focus on PPA, define the Partition shapes, p...

Responsible for planning and execution of all aspects of Physical Design including Synthesis, Floor planning, Place and Route, Clock Tree Synthesis, IP integration, Extraction, Physical Verification, and taking blocks to the closure. Job Description In your new role you will: Responsible for planning and execution of all aspects of Physical Design including Synthesis, Floor planning, Place and Route, Clock Tree Synthesis, IP integration, Extraction, Physical Verification, and taking blocks to the closure. Design Application Engineering (DAE) will be responsible for supporting project teams using Infineon Design System (Flows, Design Package & Design assistance). You will be the first point o...

Electrical Engineer experience on basic and detailed design and project co-ordination of Electrical works on Infrastructure, Power, Oil and Gas and M&M projects. Has a good knowledge of Electrical System and Physical design, the principles, and practices of related technical areas and of coordinating with other technical disciplines. Candidate should have exposure to Indian, US, Euro and other foreign codes/standards and local practices. Major Responsibilities: Plans, develops, coordinates and reviews engineering work within a discipline on a project or assignment in a global business unit. Supervises the day-to-day technical work of discipline engineers, specialists, designers and drafters....

Electrical Engineer experience on basic and detailed design and project co-ordination of BESS on CCPP Power, Renewables projects. He has a good knowledge of Electrical System and Physical design, the principles, and practices of related technical areas and of coordinating with other technical disciplines. Candidate should have exposure to Indian, US, Euro and other foreign codes/standards and local practices. Major Responsibilities: Plans, develops, coordinates and reviews engineering work within a discipline on a project or assignment in a global business unit. Supervises the day-to-day technical work of discipline engineers, specialists, designers and drafters. Conducts annual performance ...

Should have experience on basic and detailed design on Power Plants preferably Combined Cycle Projects with Fuel Cells, BESS and Aeroderivative Gas Turbine Systems. Has a good knowledge of Electrical Physical design, the principles, and practices of related technical areas and of coordinating with other technical disciplines. Candidate should have exposure to Indian, US, Euro and other foreign codes/standards and local practices. Within discipline develops designs for complete and complex engineering systems, structures and plant arrangements under supervision. Plans and executes the presentation of these in detailed scale models. Major Responsibilities: Generates 2-D Computer Aided Design (...

We are seeking a highly skilled and experienced Principal Engineer for our Static Timing Analysis (STA) function. The successful candidate will be part to a team of talented engineers responsible for ensuring the timing performance and integrity of our complex semiconductor designs. This role requires a deep understanding of STA methodologies, leadership skills, and a strategic vision to drive continuous improvement in our timing analysis processes. Key Responsibilities: - Own complete STA signoff for ASIC, providing direction and guidance to PnR team for Timing closure & Synthesis report analysis. - Work with IP & Design team for Timing constraints Development & Review activities. - Develop...