ARF Design Pvt Ltd is actively looking for passionate and skilled professionals to join our growing team in the VLSI domain! Open Positions: 🔹 Analog Layout Engineer 🔹 RTL Design Engineer 🔹 Physical Design Engineer 🔹 Analog Circuit Design Engineer If you have the expertise and enthusiasm to work on cutting-edge semiconductor projects, we want to hear from you! Location: [Add location – Bangalore / Hyderabad Employment Type: Full-time | Work from Office Experience Level: 3+ Years Experienced 5-Day Work Week Interested candidates can apply by sending their resumes to careers@arf-design.com or DM me directly. Let’s build the future of chip design together!
Company: ARF Design Pvt Ltd Location: Bhubaneswar and Ranchi Employment Type: Full-Time | Permanent Working Days: Monday to Saturday Interview Mode: Face-to-Face Job Description:– Analog Layout Engineer We are actively hiring Analog Layout Engineers with 3+ years of industry experience. Ideal candidates must have solid expertise in lower technology nodes, physical layout techniques, and verification processes. ARF provides an excellent platform to work on advanced nodes with fast-track interview and onboarding processes. Key Responsibilities: ● Design and development of analog layout IP blocks and full-chip integration ● Perform and resolve LVS/DRC violations independently ● Collaborate with circuit design teams to optimize layout quality and performance ● Ensure layouts meet design matching and parasitic constraints ● Work with advanced nodes like 7nm, 16nm, and 28nm Required Skills: ● 3+ yrs of relevant Analog Layout experience ● Proficiency in LVS/DRC checks and EDA tools ● Experience with lower technology nodes (3nm,5nm,7nm,10, 16nm / 28nm ETC) ● Good understanding of layout matching, parasitic extraction, and floor planning ● Strong verbal and written communication skills ● Ability to work independently and within cross-functional teams Job Description:– Circuit Design Engineer ARF Design is hiring Analog Mixed Signal Designers to work on the design of building blocks used in high-speed IPs such as DDR/LPDDR/HBM/UCIe/MIPI/PCIe. Key Responsibilities: ● Derive circuit block level specifications from top level specifications ● Perform optimized transistor-level design of analog and custom digital blocks ● Run SPICE simulations to meet detailed specifications ● Guide layout design for best performance, matching, and power delivery ● Characterize design performance across PVT + mismatch corners and reliability checks (aging, EM, IR) ● Generate and deliver behavioral (Verilog), timing (LIB), and physical (LEF) models of circuits ● Conduct design reviews at various phases/maturity of the design Qualifications: ● BE/M-Tech in Electrical & Electronics ● Strong fundamentals in RLC circuits, CMOS devices and digital design concepts (e.g., counters, FSMs) ● Experience with custom design environments (e.g., Cadence Virtuoso, Synopsys Custom Design Family) and SPICE simulators ● Collaborative mindset with a positive attitude Exp: 3+ Please share updated resume [Name_Post_Exp] to divyas@arf-desgn.com
As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and full-chip integration. Your role will involve performing and resolving LVS/DRC violations independently, collaborating with circuit design teams to optimize layout quality and performance, and ensuring layouts meet design matching and parasitic constraints. You will have the opportunity to work with advanced nodes like 7nm, 16nm, and 28nm, leveraging your 3+ years of relevant Analog Layout experience. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate with circuit design teams to optimize layout quality and performance - Ensure layouts meet design matching and parasitic constraints - Work with advanced nodes like 7nm, 16nm, and 28nm Required Skills: - 3+ yrs of relevant Analog Layout experience - Proficiency in LVS/DRC checks and EDA tools - Experience with lower technology nodes (3nm, 5nm, 7nm, 10nm, 16nm / 28nm ETC) - Good understanding of layout matching, parasitic extraction, and floor planning - Strong verbal and written communication skills - Ability to work independently and within cross-functional teams In this role, you will be a Circuit Design Engineer at ARF Design, where you will be working on the design of building blocks used in high-speed IPs such as DDR/LPDDR/HBM/UCIe/MIPI/PCIe. Your responsibilities will include deriving circuit block level specifications from top-level specifications, performing optimized transistor-level design of analog and custom digital blocks, running SPICE simulations to meet detailed specifications, and guiding layout design for best performance, matching, and power delivery. Key Responsibilities: - Derive circuit block level specifications from top-level specifications - Perform optimized transistor-level design of analog and custom digital blocks - Run SPICE simulations to meet detailed specifications - Guide layout design for best performance, matching, and power delivery - Characterize design performance across PVT + mismatch corners and reliability checks (aging, EM, IR) - Generate and deliver behavioral (Verilog), timing (LIB), and physical (LEF) models of circuits - Conduct design reviews at various phases/maturity of the design Qualifications: - BE/M-Tech in Electrical & Electronics - Strong fundamentals in RLC circuits, CMOS devices, and digital design concepts (e.g., counters, FSMs) - Experience with custom design environments (e.g., Cadence Virtuoso, Synopsys Custom Design Family) and SPICE simulators - Collaborative mindset with a positive attitude If you have 3+ years of experience and are interested in these exciting opportunities, please share your updated resume [Name_Post_Exp] to divyas@arf-desgn.com. Join ARF Design for a chance to work on advanced nodes with fast-track interview and onboarding processes.,
JD: Analog Layout Engineer Experience: 3 to 7 years Location: Ranchi, Jharkhand Required Key Skills: Proficient in LVS/DRC checks and EDA tools. Experience in lower technology nodes. Strong understanding of layout analysis, floor planning, and matching techniques. Employment Type: Full-Time | Permanent Interview Mode : Virtual and In person Notice Period: Immediate to 45 Days Immediate Joiners Preferred Open Budget Based on Skills
As an Analog Layout Engineer, you will be responsible for designing and implementing analog layout solutions. With 3 to 7 years of experience, you will be based in Ranchi, Jharkhand. Your key skills should include proficiency in LVS/DRC checks and EDA tools, along with experience in lower technology nodes. A strong understanding of layout analysis, floor planning, and matching techniques is essential for this role. This is a full-time, permanent position with the interview mode being virtual and in-person. The ideal candidate should be able to join immediately or within 45 days. Immediate joiners are preferred, and the budget for this position is open based on the candidate's skills and experience.,
You are looking for Analog Mixed Signal Designers to join our team and work on designing building blocks for high-speed IPs such as DDR, LPDDR, HBM, UCIe, and PCIe. As a member of our team, your responsibilities will include deriving circuit block level specifications from top-level specifications, designing optimized transistor-level analog and custom digital blocks, conducting Spice simulations to meet detailed specifications, guiding layout design for optimal performance, matching, and power delivery, performing performance characterization of designs in various conditions including reliability checks, and generating/delivering behavioral, timing, and physical models of circuits. You will also be involved in conducting design reviews at different phases of the design process. To be successful in this role, you should have a BE/M-Tech degree in Electrical & Electronics, strong fundamentals in RLC circuits, CMOS devices, digital design building blocks, and prior experience with custom design environments and spice simulators. A collaborative and positive attitude is essential for working effectively in our team. Depending on your experience level, you will be designated as a Design Team Member (0-4 years), a Technical Lead/Mentor (4-7 years), or a Team Lead/Manager (7+ years). Some example designs you may work on include Wireline channel transmitters, receivers, equalization circuits, serializers, deserializers, bandgap references, PLLs, DLLs, phase interpolators, comparators, DACs, and ADCs. Joining our team will provide you with opportunities for growth and learning, including close collaboration with experienced mentors and exposure to advanced process technologies such as 12nm, 7nm, 5nm, 3nm, and 2nm. We offer a fast-paced environment for high-performance individuals who are ready to take on challenges and advance their careers. If you are interested in this fantastic opportunity, please reach out to poojakarve@arf-design.com to learn more.,
The job requires an HR Executive with experience in recruitment and administrative tasks, along with excellent communication skills. If you are enthusiastic about creating a positive work atmosphere and efficiently managing HR functions, we encourage you to apply for this position. Your responsibilities will include managing the entire recruitment process, from posting job ads to interviewing candidates and welcoming new employees. It is essential to maintain employee records and ensure compliance with company policies and legal requirements. Strong organizational skills, the ability to multitask, and meticulous attention to detail are crucial for this role. You should be capable of working both independently and collaboratively with the team. To apply for this opportunity, please send your resume to swastika@arf-design.com with the subject "[Your Name] - HR Application".,
Skills: Analog Circuit Design, DACs, PLL, DDR, B.tech, Electronics, VLSI, Semiconductor, ! at ARF Design Are you an / looking for your next challenge ARF Design is hiring passionate individuals to join our dynamic team! As Part Of Our Team, You'll Be Working On The Design Of Cutting-edge Building Blocks Used In High-speed IPs Such As , , , , , . Here's What You Can Expect : Derive circuit block level specifications. Conduct optimized transistor-level design. Perform Spice simulations. Guide layout design for optimal performance. Characterize designs in PVT + mismatch corners. Generate/deliver behavioral, timing, and physical models. Conduct design reviews at different phases. : BE/M-Tech in Electrical & Electronics Strong fundamentals in RLC circuits and CMOS devices Prior experience with custom design environments and spice simulators Collaborative and positive attitude : 4 to 7 years: Technical Lead/Mentor Wireline channel Transmitters (Tx), Receivers (Rx), Equalization circuits, Serializer, deserializer, Bandgap reference, PLL, DLL, Phase Interpolator, Comparators, DACs, and ADCs. , Close collaboration with experienced mentors Opportunity to work on advanced process technologies. Fast-paced growth for high-performance individuals If you're ready to take on this challenge and grow your career, or /to [HIDDEN TEXT] to learn more about this fantastic opportunity!