Physical Design Engineer

As a Physical Design Engineer, you will be responsible for the physical design of ASICs. This includes tasks such as floorplanning, clock tree synthesis, placement, routing, timing closure, and physical verification. Your contributions will be crucial to the successful tape out cycles of multiple chips, ensuring the efficiency of the PD life cycle and ECO life cycle. Your expertise in clock-tree synthesis and power-aware PD flows, such as ADM, P&R, will be essential for the project's success. Additionally, your familiarity with PD-STA, timing constraints, and multi-mode, multi-corner timing closure will play a key role in achieving project milestones. **Qualifications Required:** - 3+ years of experience in ASIC design - Proficiency in complete PD life cycle and ECO life cycle - Knowledge of clock-tree synthesis and power-aware PD flows like ADM, P&R - Familiarity with PD-STA, timing constraints, and multi-mode, multi-corner timing closure If you meet these qualifications and are ready to join our team in Bangalore, Ranchi, or Bhubaneswar immediately, we encourage you to reach out to us. Let's work together to build something great!,