53 Timing Constraints Jobs

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

As an experienced candidate with over 10 years of experience, you will be responsible for leading the development and implementation of comprehensive clocking strategies for high-performance ICs. Your key responsibilities will include: - Defining and managing timing constraints throughout the design flow to ensure accurate and consistent timing analysis. - Performing advanced Static Timing Analysis (STA) using industry-standard tools to identify potential timing violations and bottlenecks. - Developing and maintaining robust clock tree synthesis (CTS) methodologies for optimal clock distribution and skew control. - Driving the creation and execution of a comprehensive clock domain crossing (...

Role Overview: You are required to lead the end-to-end VLSI components and hardware systems, providing customer support and governance of VLSI components and hardware systems, and managing the team effectively. Key Responsibilities: - Design, analyze, develop, modify, and evaluate VLSI components and hardware systems - Determine architecture and logic design verification through software for component and system simulation - Conduct system evaluations, make appropriate recommendations, and review data and project documentation - Identify and recommend system improvements for better technical performance - Inspect VLSI components and hardware systems for compliance with regulations and safety...

As an ASIC Design Engineer at Cadence, you will be responsible for: - Having 12+ years of experience in ASIC design - Being proficient in Verilog coding, RTL design, and complex control path and data path designs - Having knowledge of interface Protocols such as UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display, Ethernet, SATA - Knowing RTL checks like LINT, SDC, CDC, synthesis flow, LEC, and timing constraints - Experience in writing Verilog testbench and running simulations You will be part of a team that is working on impactful technology solutions, pushing boundaries, and solving challenges that others cannot.,

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. Your role will encompass a wide range of tasks including working on circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to develop cutting-edge products. You will collaborate with cross-functional teams to meet performance requirements and develop innovative solutions. **Key Responsibilities:** - Lead a high performing team of engineers in the implementation domain for Display Sub-System - Manage multiple time-critical and complex projects effectively ...

Altera is seeking highly skilled Senior/Lead FPGA Silicon Design Engineer to ensure the excellence of next-generation Ethernet/Transceiver/Crypto for top-tier FPGAs. This role offers opportunity to make a significant impact at a tech-driven company that provides leading programmable solutions, easily deployable in applications ranging from embedded, industrial, & cloud to edge, unlocking limitless possibilities Responsibilities: Develop Micro-architecture and Design implementation for Ethernet/Transceiver/Crypto IPs and subsystems. Work closely with the Architects to come up with an optimal design, RTL code development, involvement in pre-silicon and post-silicon debug, and own all the front...

Description Millions of people experience Synaptics every day. Our technology impacts how people see, hear, touch, and engage with a wide range of IoT applications -- at home, at work, in the car or on the go. We solve complex challenges alongside the most influential companies in the industry, using the most advanced algorithms in areas such as machine learning, biometrics, and video processing, combined with world class software and silicon development. Overview Synaptics is looking for a Sr. Staff Digital Engineer, WLAN MAC to join our dynamic and growing WPD organization. You will be responsible for MAC architecture/design/implementation in the Wi-Fi 6/7 for IoT market. You will provide ...

As an experienced candidate with 6 to 15 years of experience, you will be responsible for the following: - Architecture, Micro-Architecture, Design, and RTL development for storage controller IP's based on UFS, NVMe, SAS, NVMeOF, eMMC, and high-speed peripheral bus standards such as PCIe. - Interfacing with cross-functional teams like Verification, Validation, and FW to ensure seamless collaboration. - Ensuring the quality of design by conducting Lint and CDC checks. - Synthesis, Area, and power optimization to enhance the performance of the storage controllers. - Developing timing constraints (SDC) and ECO scripts to streamline the design process and ensure quality deliverables and reuse. Y...

Job Description: Broadcom is looking for a staff level physical design engineer. In this highly visible role, you will be contributing to ASIC for Storage/ AI products. Qualifications: Education and Experience : Master's degree in Electronics/Computer Engineering with over 10 years of experience in physical design. Physical Design Expertise : Extensive experience in Place & Route using Synopsys FC or Cadence Innovus tools is essential. Proficiency in STA using Primetime and/or Tempus. Demonstrated knowledge of Clock Tree Implementation Techniques for High-Speed Design Implementation. Ability to drive front-end and back-end implementation from RTL to GDSII, including synthesis, formal verific...

As a member of Waymo's Compute Team, your critical and exciting mission is to deliver the compute platform responsible for running the fully autonomous vehicle's software stack. You will have the opportunity to collaborate with a multidisciplinary team to work on one of the world's highest performance automotive compute platforms. Your role will involve participating in the Physical Design of advanced silicon for self-driving cars, contributing to the design and closure of full chip and individual blocks, and collaborating with internal and external teams for optimal performance. Key Responsibilities: - Participate in the Physical Design of advanced silicon for self-driving cars. - Contribut...

As a VLSI Digital Design Engineer at Qualcomm India Private Limited, you will be a part of the Bangalore WLAN PHY (Baseband) team, leading IP development for the latest WiFi standards. The WLAN PHY team is known for its expertise in taking WLAN PHY designs from concept to silicon independently and working on end-to-end Tx/Rx DSP chains, from antenna samples post ADC to raw bits for upper layers. You will work on challenging signal processing functions like filters, matrix transformations, channel estimation, equalization, decoders/encoders, demodulators, FFT, and contribute to developing/enhancing signal processing algorithms. **Key Responsibilities:** - Lead IP development for the latest Wi...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SILICON DESIGN ENGINEER(Timing Constraints/STA Signoff Technical Lead) The Role As a m...

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and Twitter (X). Job Responsibilities: Designkey digital blocks such as accelerators/ datapath IP ...

Candidate will be responsible for building/maintaining highlyconfigurable and reusable IO Subsystems (Note: An IO Subsystem is alogic IP that processes the IO Pads/IO Ring information and requiredlogic to allow multiple on-chip peripherals to share the same IOs in aconfigurable manner) Job Description In your new role you will: Candidate will be responsible for building/maintaining highly configurable and reusable IO Subsystems (Note: An IO Subsystem is a logic IP that processes the IO Pads/IO Ring information and required logic to allow multiple on-chip peripherals to share the same IOs in a configurable manner) Candidate will be responsible for RTL design for integration of IO pads into So...

As a Physical Design Engineer, you will be responsible for the physical design of ASICs. This includes tasks such as floorplanning, clock tree synthesis, placement, routing, timing closure, and physical verification. Your contributions will be crucial to the successful tape out cycles of multiple chips, ensuring the efficiency of the PD life cycle and ECO life cycle. Your expertise in clock-tree synthesis and power-aware PD flows, such as ADM, P&R, will be essential for the project's success. Additionally, your familiarity with PD-STA, timing constraints, and multi-mode, multi-corner timing closure will play a key role in achieving project milestones. **Qualifications Required:** - 3+ years ...

As a Physical Design Implementation Engineer in the semiconductor/ASIC industry, your role will involve various tasks on advanced technology nodes such as 28nm and 20nm. You will be responsible for block level floor planning, PG planning, partitioning, placement, scan-chain reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks encompassing both timing and functional ECOs. Additionally, you will handle SI closure, design rule checks (DRC), Logical vs. Schematic (LVS) checks, and Antenna checks. It is crucial to possess a solid understanding of low power concepts, top-level physical design, partitioning, timing constraints, and IR Drop....

Role Overview: As an FPGA Developer, you will be responsible for designing, implementing, and testing Field-Programmable Gate Array (FPGA) solutions. You will work with Vivado and various coding languages to develop AXI peripherals for Zynq and other Xilinx FPGAs. Your expertise in implementing timing constraints, interfacing external memory, and writing test benches will be crucial for the success of projects. Additionally, your knowledge of Matlab, C, and Python will be utilized for various tasks including configuring Microblaze and writing PC side code for interfacing over RS232. Familiarity with reading schematics and implementing State Machines will also be required. Key Responsibilitie...

As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Your responsibilities will include: - Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling - Hands-on experience with STA tools such as Prime-time and Tempus - Driving timing convergence at Chip-level and Hard-Macro level - In-depth knowledge of cross-talk noise, Signal Integrity, Layout Pa...

Role Overview: You have 12+ years of experience in Digital ASIC/Processor Design with strong fundamentals in core areas such as Microarchitecture, Computer Arithmetic, Circuit Design, and Process Technology. Your communication skills are excellent, enabling you to collaborate effectively with design teams globally. Key Responsibilities: - Lead, train, and mentor a team of junior engineers for a large modem design project in advanced process nodes - Collaborate with RTL, DFT, and PD leads to take a project from Post-RTL to Netlist release, focusing on area, timing, power, and testability - Write timing constraints, conduct synthesis, formal verification, CLP, Primetime, PTPX, and CECO tasks -...

As a Synthesis & STA engineer, you will be responsible for performing RTL Synthesis to optimize the Performance/Power/Area of the designs. Your role will involve DFT insertions such as MBIST and SCAN, setting up Timing Constraints for functional and Test Modes, and Validation. You will be expected to create Power Intent for the designs, verify power intent on RTL, run static Low-Power checks on gate level netlists, and ensure Logic Equivalency Checks between RTL to Gates and Gates to Gates. Collaborating with the Design/DFT/PD teams, you will set up signoff Static Timing Analysis and ECO flows to achieve timing closure. Additionally, you will be involved in Power Analysis, estimating power a...

As a Principal Digital Engineer, WLAN MAC at Synaptics, you will be responsible for defining WiFi MAC architecture, technically leading the team on design methodologies, optimizing designs for power and area targets, guiding the team through digital design, RTL implementation, and various checks for chip productization. You will collaborate with different teams, including Systems/SW team, DV team, and design/product evaluation team, to ensure successful product development. **Key Responsibilities:** - Define WiFi MAC architecture based on the Standard - Lead the team technically on design methodologies - Optimize designs to meet power and area targets - Guide the team through various design ...

Candidate will be responsible for building/maintaining highlyconfigurable and reusable IO Subsystems (Note: An IO Subsystem is alogic IP that processes the IO Pads/IO Ring information and requiredlogic to allow multiple on-chip peripherals to share the same IOs in aconfigurable manner) Job Description In your new role you will: Candidate will be responsible for building/maintaining highly configurable and reusable IO Subsystems (Note: An IO Subsystem is a logic IP that processes the IO Pads/IO Ring information and required logic to allow multiple on-chip peripherals to share the same IOs in a configurable manner) Candidate will be responsible for RTL design for integration of IO pads into So...

Qualcomm India Private Limited is a leading technology innovator dedicated to pushing the boundaries of what is possible. As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. These systems encompass a wide range of components such as yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Your work will contribute to the development of cutting-edge, world-class products that drive digital transformation and enable next-generation experiences. - Front-end implementation of SERDES high-speed Interface PHY designs - RTL development and ...

OUR STORY At ST, we believe in the power of technology to drive innovation and make a positive impact on people, business, and society. We are a global semiconductor company, and our advanced technology & chips forms the hidden part of the world we live in today. When you join ST, you will be part of a global business of more than 115+ nationalities and present in 40 countries, 50,000+, diverse and dedicated creators & makers of technology around the world! Developing technologies takes more than talent: it takes amazing people who understands collaboration and respect. People with passion and desire to disrupt the status quo, push boundaries and drive innovation whilst unlocking your own po...