Physical Design (STA Lead)

As an experienced candidate with over 10 years of experience, you will be responsible for leading the development and implementation of comprehensive clocking strategies for high-performance ICs. Your key responsibilities will include: - Defining and managing timing constraints throughout the design flow to ensure accurate and consistent timing analysis. - Performing advanced Static Timing Analysis (STA) using industry-standard tools to identify potential timing violations and bottlenecks. - Developing and maintaining robust clock tree synthesis (CTS) methodologies for optimal clock distribution and skew control. - Driving the creation and execution of a comprehensive clock domain crossing (CDC) verification plan. - Collaborating with design engineers, layout engineers, and other physical design teams to address timing closure challenges. - Mentoring and coaching junior engineers to foster their growth and expertise in clocking, constraints, and STA. - Staying up-to-date with the latest advancements in clocking methodologies, timing analysis tools, and industry best practices. - Leading the evaluation and implementation of new tools and methodologies for improved timing closure efficiency. - Developing and maintaining comprehensive documentation for clocking, constraints, and STA practices within the team. No additional details of the company are provided in the job description.,