Altera

Job Details Job Description: Position Overview: The IT Global Delivery Center Head will oversee the setup, operations and strategic direction of our delivery center in Bangalore, ensuring alignment with global business objectives and requirements. This leadership role demands a strong background in IT service delivery, a passion for innovation, and a proven track record of managing large-scale global operations. Responsibilities Develop and implement a strategic plan for the IT global delivery center that aligns with company goals and global business strategies. Hire, Lead, mentor, and inspire a diverse team of IT professionals, including project managers, developers, analysts, and support staff. Stay informed on industry trends and emerging technologies to ensure our delivery center remains competitive and innovative. Create and manage project plans, timelines, and status reports for delivery center initiatives. Ensure the scalability, security, and performance of IT services provided by the delivery center. Serve as the primary liaison between global business teams, system integrators, and the delivery center. Collaborate with business leaders, product managers, and other stakeholders to translate business needs into technical solutions. Communicate effectively with non-technical stakeholders to ensure alignment and understanding of delivery center initiatives. Drive continuous improvement initiatives to enhance service delivery and operational efficiency. Qualifications Minimum Qualifications: Bachelor’s/BS with 15+ years of experience or Master’s Degree with 15+ years of experience in Information Technology, Computer Science, or a STEM-related field. 8+ years of experience in managing delivery centers 8+ years of experience in managing vendors and business stakeholders. 8+ years of experience leading and managing a diverse and global IT team. 8+ years of experience implementing large transformation technology solutions that drive business value. Preferred Qualifications Good understanding of semiconductor industry processes and business requirements. Good understanding of cybersecurity frameworks and risk management. Excellent communication, leadership, and strategic planning skills. Mergers and Acquisitions knowledge. Job Type Regular Shift Shift 1 (India) Primary Location: Ecospace 1 Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Show more Show less

Job Details Job Description: Work on validation tools and infrastructure improvements Work on C-based test applications on Linux Work on Yocto based linux image generation Work on developing an automation runner, ex. like Jenkins Work on Python coding for validation tests and in other validation areas. Qualifications M.E/M.Tech in Computer Science Job Type Contract Employee (Fixed Term) Shift Shift 1 (India) Primary Location: Ecospace 1 Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Show more Show less

Job Details Job Description: Join Altera, a leader in programmable logic technology, as we strive to become the #1 FPGA company. We are looking for a skilled Jr. Data Scientist to develop and deploy production-grade ML pipelines and infrastructure across the enterprise. This is a highly technical, hands-on role focused on building scalable, secure, and maintainable machine learning solutions within the Azure ecosystem. As a member of our Data & Analytics team, you will work closely with other data scientists, ML specialists, and engineering teams to operationalize ML models using modern tooling such as Azure Machine Learning, Dataiku, and Kubeflow, etc. You’ll drive MLOps practices, automate workflows, and help build a foundation for responsible and reliable AI delivery. Responsibilities Design, build, and maintain automated ML pipelines from data ingestion through model training, validation, deployment, and monitoring using Azure Machine Learning, Kubeflow, and related tools. Deploy and manage machine learning models in production environments using cloud-native technologies like AKS (Azure Kubernetes Service), Azure Functions, and containerized environments. Partner with data scientists to transform experimental models into robust, production-ready systems, ensuring scalability and performance. Drive best practices for model versioning, CI/CD, testing, monitoring, and drift detection using Azure DevOps, Git, and third-party tools. Work with large-scale datasets from enterprise sources using Azure Synapse Analytics, Azure Data Factory, Azure Data Lake, etc. Build integrations with platforms like Dataiku etc. to support collaborative workflows and low-code user interactions while ensuring underlying infrastructure is robust and auditable. Set up monitoring pipelines to track model performance, ensure availability, manage retraining schedules, and respond to production issues. Write clean, modular code with clear documentation, tests, and reusable components for ML workflows. Qualifications Bachelor’s or Master’s degree in Computer Science, Engineering, Data Science, or a related field. 3+ years of hands-on experience developing and deploying machine learning models in production environments. Strong programming skills in Python, with experience in ML libraries such as scikit-learn, TensorFlow, PyTorch, or XGBoost. Proven experience with the Microsoft Azure ecosystem, especially: Azure Machine Learning (AutoML, ML Designer, SDK) Azure Synapse Analytics and Data Factory Azure Data Lake, Azure Databricks Azure OpenAI and Cognitive Services Experience with MLOps frameworks such as Kubeflow, MLflow, or Azure ML pipelines. Familiarity with CI/CD tools like Azure DevOps, GitHub Actions, or Jenkins for model lifecycle automation. Experience working with APIs, batch and real-time data pipelines, and cloud security practices. Why Join Us? Build and scale real-world ML systems on a modern Azure-based platform. Help shape the AI and ML engineering foundation of a forward-looking organization. Work cross-functionally with experts in data science, software engineering, and operations. Enjoy a collaborative, high-impact environment where innovation is valued and supported. Job Type Regular Shift Shift 1 (India) Primary Location: Ecospace 1 Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Show more Show less

Job Details Job Description: Designs, develops, validates, and/or debugs software abstractions and frameworks for acceleration with FPGAs to support embedded, data center, and communication clients. Project ownership from concept to delivery. This includes identifying risks, dependencies, creating mitigation plan, discussions with customers, design reviews Provide estimates on FPGA resources, computation bandwidth, and memory bandwidth Create module level details from architecture, coding, simulation and perform peer reviews. Apply the methodologies for design, verification or validation Define, create and maintain all project related documentation, especially design documents with detailed analysis reports Provide support to customer during integration phases at test sites and support to production teams Qualifications Qualification Required: Bachelor's or Master's degree in Computer Science, Engineering in Electronics or Electrical or Telecom or VLSI Engineering or equivalent practical experience Requires minimum of 5+ years of experience in FPGA designs all the way from requirements to micro-architecture to implementation to debug and bringup on Hardware Preferred to have system level understanding Proficiency with System Verilog and RTL coding skills, timing closure, or STA, targeting high performance designs Very good understanding of latest protocol specifications for memory, bus protocol specification like AXI, PCIe and Ethernet interfaces, Security IPs (for ex: MACSec) Experience with FPGA tools and timing closure Hardware power-on and debug New product release and rollout support Customer technical support Good communication and presentation skills. Required Technical And Professional Expertise FPGA Design : Verilog/System Verilog RTL Coding FPGA Synthesis & Place&Router/Fitter Tools Functional Simulation Hardware Design : Logic Design & Debugging expertise Version control tools like Git Experience with scripting languages (Python, Perl, TCL, Bash, etc.) Job Type Regular Shift Shift 1 (India) Primary Location: Ecospace 1 Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Job Details Job Description: Join Altera, a leader in programmable logic technology, as we strive to become the #1 FPGA company. We are seeking a strategic and technically proficient Director of Data Science to lead the development, deployment, and governance of enterprise-wide AI and machine learning solutions. This role is central to our Data & Analytics team and will define how we leverage AI/ML across the business, from ideation to production. You will be responsible for architecting robust, scalable, and secure ML pipelines using a modern toolset, with a strong emphasis on Microsoft Azure services. As a senior leader in this space, you will also drive MLOps best practices, mentor technical teams, and ensure AI initiatives align with both business priorities and ethical standards. Responsibilities Define and execute the AI/ML strategy across business domains, collaborating with senior stakeholders to identify high-impact use cases. Design and implement robust AI/ML solutions using tools like Azure Machine Learning, Dataiku, and Kubeflow pipelines,etc., ensuring scalability, reproducibility, and performance. Build and manage full-lifecycle ML pipelines from data ingestion and training to deployment and monitoring using tools like Azure ML, Kubeflow, and Dataiku, etc. Establish MLOps practices including versioning, CI/CD for models, automated testing, and model drift monitoring. Work closely with data engineers, business analysts, product teams, and domain experts to translate complex business problems into ML-driven solutions. Integrate solutions with enterprise tools, leveraging widely-used libraries and platforms (e.g., TensorFlow, PyTorch,etc.) and APIs for NLP, computer vision, and generative AI (e.g., Azure OpenAI, Cognitive Services). Ensure AI solutions are explainable, reproducible, and aligned with enterprise data governance and ethical AI principles. Provide technical guidance to junior ML engineers and data scientists; establish reusable components and share best practices across teams. Stay ahead of industry trends and continuously evaluate emerging tools and technologies that can enhance AI delivery at scale. Qualifications Bachelor’s or Master’s degree in Computer Science, Data Science, AI/ML, Engineering, or a related field. 15+ years of experience in building and deploying machine learning models in enterprise environments. Deep expertise in the Azure AI/ML ecosystem, especially: Azure Machine Learning (AutoML, ML Designer, SDK) Azure Synapse Analytics and Data Factory Azure Data Lake, Azure Databricks Azure OpenAI and Cognitive Services Proficiency in Python and ML frameworks such as TensorFlow, PyTorch, etc. Strong understanding of MLOps, containerization (Docker/Kubernetes), and CI/CD pipelines using Azure DevOps or GitHub Actions. Hands-on experience with Dataiku and/or Kubeflow for collaborative modeling and production workflow orchestration. Demonstrated ability to design ML architectures that meet performance, scalability, and security standards. Experience working with structured, unstructured, and semi-structured data across business or industrial domains. Experience with real-time analytics, streaming data, or IoT use cases. Communication, leadership, and strategic planning skills. Understanding of semiconductor industry processes and business requirements. Why Join Us Drive enterprise-wide AI transformation in a data-forward organization. Work with a modern Azure-centered data stack. Collaborate with cross-disciplinary teams to solve real-world problems with AI. Lead innovation in a supportive environment that values experimentation and impact. Job Type Regular Shift Shift 1 (India) Primary Location: Ecospace 1 Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

As an intern at Altera, an Intel Company, you will be part of the FPGA post-silicon validation group, working on next-generation Altera FPGA products. Your role will involve collaborating with the team to develop industry-standard tools for post-silicon validation and debugging. You will assist in automating behavior analysis of failures and platforms, contribute to innovative solutions for validation and debugging processes, and stay updated on the latest trends in Machine Learning (ML) and Artificial Intelligence (AI). Your responsibilities will include participating in code reviews, documenting technical specifications and project progress, troubleshooting technical issues related to validation and debugging tools, and working closely with cross-functional teams to ensure seamless integration of tools. Additionally, you will have the opportunity to present findings and project updates to stakeholders and team members. To succeed in this role, you should have a Master's degree in Computer Science Engineering, experience as a Full Stack Developer, and preferred exposure or expertise in ML and AI. Strong analytical and problem-solving skills, the ability to work effectively in a team environment, and excellent communication and interpersonal skills are also required. By joining Altera, you will gain hands-on experience with industry-standard tools and technologies, exposure to real-world challenges, mentorship from experienced professionals, and the chance to contribute to significant engineering outcomes. The expected outcomes of your work include the development of automated behavior analysis tools, creation of application developments and debug tools, and enhanced efficiency and accuracy in post-silicon validation processes. This is a Contract Employee (Fixed Term) position with Shift 1 (India) as the primary location at Ecospace 1. Apply now to be part of a dynamic team driving innovation in programmable solutions at Altera, an Intel Company.,

Job Details Job Description: Designs and develops FPGA circuits and IPs including FPGA core fabric logic, interconnect routing, clocking, configuration, configurable memory blocks, and network on chip. Micro-architects and performs circuit and logic design, schematic entry, simulation, reliability verification, and verifies functionality to optimize FPGA circuits for power, performance, area, timing, and yield goals. Develops models and collaterals for FPGA circuits and IPs to integrate into FPGA hardware and software deliverables including circuit integration specifications, behavioral models, electrical rule checkers, design intent, and timing and power models. Collaboration with teams in different time zones to deliver best in class product Qualifications Bachelor’s degree in electrical/Electronic Engineering or Computer Engineering is required . More than 5 years of experience in CMOS circuit design is preferred. Capable of reviewing the design within a broader team. Understand physics behind latest CMOS design process and layout dependent impact on performance , power and area. Job Type Regular Shift Shift 1 (India) Primary Location: Virtual - IND Additional Locations: Penang 16 Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Job Details Job Description: Position Overview: The IT Global Delivery Center Head will oversee the setup, operations and strategic direction of our delivery center in Bangalore, ensuring alignment with global business objectives and requirements. This leadership role demands a strong background in IT service delivery, a passion for innovation, and a proven track record of managing large-scale global operations. Responsibilities Develop and implement a strategic plan for the IT global delivery center that aligns with company goals and global business strategies. Hire, Lead, mentor, and inspire a diverse team of IT professionals, including project managers, developers, analysts, and support staff. Stay informed on industry trends and emerging technologies to ensure our delivery center remains competitive and innovative. Create and manage project plans, timelines, and status reports for delivery center initiatives. Ensure the scalability, security, and performance of IT services provided by the delivery center. Serve as the primary liaison between global business teams, system integrators, and the delivery center. Collaborate with business leaders, product managers, and other stakeholders to translate business needs into technical solutions. Communicate effectively with non-technical stakeholders to ensure alignment and understanding of delivery center initiatives. Drive continuous improvement initiatives to enhance service delivery and operational efficiency. Qualifications Minimum Qualifications: Bachelor’s/BS with 15+ years of experience or Master’s Degree with 15+ years of experience in Information Technology, Computer Science, or a STEM-related field. 8+ years of experience in managing delivery centers 8+ years of experience in managing vendors and business stakeholders. 8+ years of experience leading and managing a diverse and global IT team. 8+ years of experience implementing large transformation technology solutions that drive business value. Preferred Qualifications Good understanding of semiconductor industry processes and business requirements. Good understanding of cybersecurity frameworks and risk management. Excellent communication, leadership, and strategic planning skills. Mergers and Acquisitions knowledge. Job Type Regular Shift Shift 1 (India) Primary Location: Ecospace 1 Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

As a skilled Workday Contractor, you will be responsible for supporting ongoing system enhancements, integrations, and workforce management needs at Altera. Your role will involve driving process improvements, maintaining data accuracy, and optimizing platform functionality across HR and Contingent Workforce systems. You will serve as a subject matter expert in Workday HCM, covering Core HR, Recruiting, Onboarding, Reporting, and Business Processes. Your key responsibilities will include supporting configuration updates, enhancements, and troubleshooting in Workday and VNDLY. Additionally, you will collaborate with various departments such as HR, Talent Acquisition, Procurement, and IT to streamline workflows and enhance contingent workforce tracking. Maintaining data integrity through audits, validations, and reporting will be crucial, along with developing and maintaining custom reports and dashboards in Workday. You will also assist with vendor integration, workforce analytics, and workforce lifecycle management via VNDLY. Providing training and support to HR and business stakeholders on Workday and VNDLY functionalities will also be part of your responsibilities. In terms of qualifications, you should have at least 3+ years of hands-on experience with Workday HCM and 1+ year of experience with VNDLY or a comparable Contingent Workforce Management platform. Proven ability to configure and troubleshoot Workday modules, especially Core HCM, Recruiting, and Reporting, is required. Experience supporting contingent labor processes and vendor engagement through VNDLY, along with strong analytical, problem-solving, and organizational skills, will be essential. Excellent verbal and written communication abilities, as well as the ability to work independently in a fast-paced environment, are also necessary. Preferred qualifications include experience supporting a semiconductor or technology company, familiarity with Workday integrations and testing cycles, and a background in HR operations, procurement, or talent acquisition. This is a Contract Employee (Fixed Term) position with Shift 1 (India) as the primary location being Bengaluru, Karnataka, India.,

Job Details Job Description: Altera is looking for a talented and driven Silicon Design Engineering Manager to lead and inspire a multidisciplinary silicon design team. In this critical role, you will manage design engineers across multiple functional domainsincluding logic design, verification, circuit design, and physical implementationfor cutting-edge IP, subsystems, SoCs, and discrete chips. Youll be at the forefront of Alteras product innovation, driving high-quality silicon solutions that meet power, performance, area, and cost objectives. Key Responsibilities Lead and manage a team of silicon design engineers across multiple disciplines and development phases. Drive end-to-end development of IP blocks, subsystems, and full-chip SoC designs, ensuring on-time delivery with high quality. Oversee design reviews, ensuring power, performance, area (PPA), and cost targets are met. Collaborate with architecture, IP, and SoC development teams to ensure cohesive design and execution. Monitor verification results, conduct design debug, analyze data, and drive resolution of design issues. Implement and maintain rigorous silicon quality and continuous improvement standards. Optimize and evolve silicon development methodologies, tools, and processes. Set clear team goals, manage priorities, provide coaching, and foster a culture of accountability and high performance. Role model Altera and Intel values while creating an inclusive, productive, and innovative work environment. Minimum Requirements Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. 10+ years of experience in silicon design, including at least 3 years in a management or technical leadership role. Proven track record managing full lifecycle silicon design projects from architecture through tape-out. Strong technical background in logic design, verification, and physical design. Deep understanding of PPA trade-offs and experience driving metrics-based decision making. Experience working across functional teams and global development environments. Preferred Qualifications Experience in SoC or FPGA-based design projects. Familiarity with industry-standard EDA tools and design methodologies. Demonstrated leadership in team building, performance management, and talent development. Strong communication and organizational skills. Qualifications Job Type: Regular Shift Shift 1 (India) Primary Location: Bengaluru, Karnataka, India Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Show more Show less

The job involves designing and developing FPGA circuits and IPs, which includes core fabric logic, routing, clocking, memory blocks, and network on chip. You will be responsible for micro-architecting and performing circuit and logic design, schematic entry, simulation, reliability verification, and ensuring functionality optimization for power, performance, area, timing, and yield goals. Additionally, you will develop models and collaterals for FPGA circuits and IPs to integrate into hardware and software deliverables. Collaboration with teams in different time zones is essential to deliver high-quality products. To qualify for this role, you must have a Bachelor's degree in Electrical/Electronic Engineering or Computer Engineering. More than 5 years of experience in CMOS circuit design is preferred. You should be capable of reviewing designs within a team and have a good understanding of the physics behind the latest CMOS design processes, as well as layout-dependent impacts on performance, power, and area. This is a regular job with Shift 1 (India) as the primary location, with additional locations in Virtual - IND and Penang 16. Join us in this dynamic role where you will play a key part in designing cutting-edge FPGA circuits and IPs to deliver best-in-class products.,

The IT Global Delivery Center Head will oversee the setup, operations, and strategic direction of our delivery center in Bangalore, ensuring alignment with global business objectives and requirements. This leadership role demands a strong background in IT service delivery, a passion for innovation, and a proven track record of managing large-scale global operations. Responsibilities: Develop and implement a strategic plan for the IT global delivery center that aligns with company goals and global business strategies. Hire, lead, mentor, and inspire a diverse team of IT professionals, including project managers, developers, analysts, and support staff. Stay informed on industry trends and emerging technologies to ensure our delivery center remains competitive and innovative. Create and manage project plans, timelines, and status reports for delivery center initiatives. Ensure the scalability, security, and performance of IT services provided by the delivery center. Serve as the primary liaison between global business teams, system integrators, and the delivery center. Collaborate with business leaders, product managers, and other stakeholders to translate business needs into technical solutions. Communicate effectively with non-technical stakeholders to ensure alignment and understanding of delivery center initiatives. Drive continuous improvement initiatives to enhance service delivery and operational efficiency. Qualifications: Minimum Qualifications: Bachelors/BS with 15+ years of experience or Masters Degree with 15+ years of experience in Information Technology, Computer Science, or a STEM-related field. 8+ years of experience in managing delivery centers 8+ years of experience in managing vendors and business stakeholders. 8+ years of experience leading and managing a diverse and global IT team. 8+ years of experience implementing large transformation technology solutions that drive business value. Preferred Qualifications: Good understanding of semiconductor industry processes and business requirements. Good understanding of cybersecurity frameworks and risk management. Excellent communication, leadership, and strategic planning skills. Mergers and Acquisitions knowledge. Job Type: Regular Shift: Shift 1 (India) Primary Location: Ecospace 1 Additional Locations: Not specified Posting Statement: Not specified,

The Oracle Fusion ERP Logistics & Manufacturing Architect role involves designing and overseeing the implementation of the company's Supply Chain systems, primarily focusing on Oracle ERP Fusion SCM. To excel in this position, you must possess a deep understanding of Supply Chain Systems like Semiconductor Manufacturing, Logistics, Transportation, and Inventory Management. As a strategic thinker with a robust functional and technical background, your responsibility is to align technology solutions with the overall business objectives. Your key responsibilities will include understanding and documenting current business procedures, implementing Oracle Fusion SCM modules, providing user support, analyzing business processes for improvements, translating business needs into system configurations, and collaborating with the technical team to develop necessary customizations. You will also be involved in system testing, end-user training, project management, and ensuring successful project completion. To qualify for this role, you should hold a Bachelor's or Master's Degree in Information Technology, Computer Science, Business Administration, or possess equivalent experience. Additionally, you should have 8-10 years of experience in the Supply Chain process, with specific expertise in Oracle Fusion ERP SCM. Strong analytical and problem-solving skills, excellent communication and presentation abilities, proficiency in Oracle Fusion ERP modules, and a deep understanding of industry processes are essential qualifications. Preferred qualifications include experience in managing large-scale systems implementations, knowledge of project management methodologies like Agile or Scrum, expertise in change management and business process re-engineering, and the ability to thrive in a fast-paced environment while managing multiple priorities. This position may require occasional travel. If you are a detail-oriented professional with a passion for Supply Chain systems and a proven track record of implementing Oracle ERP Cloud solutions that drive business value, we invite you to apply for this challenging and rewarding opportunity at our company.,

Job Details Job Description: Salesforce Application Developer will be responsible for designing, developing, and supporting scalable solutions across Sales Cloud & Experience Cloud (Partner Communities) . This role will focus on building and enhancing sales automation processes, and customer/partner portal experiences. The developer will collaborate with cross-functional teams to deliver user-centric solutions through custom development, configuration, and system integration. Ideal candidates will have strong technical expertise in Apex, Lightning Web Components, AMP script, and Salesforce platform capabilities. The ideal candidate brings an AI-first mindset , leveraging Salesforce AI and Agentic AI tools to enable intelligent partner engagement, predictive partner performance insights, dynamic content delivery within partner portals, and automation of onboarding and case management workflows. Experience with Einstein AI, AI-powered knowledge recommendations, and generative AI for content creation within the Experience Cloud is preferred. Key Responsibilities Design and develop custom Salesforce solutions across Sales Cloud, and Experience Cloud to support sales processes, to enable seamless partner engagement, onboarding, support case handling, and self-service capabilities. Build and enhance Partner Community portals, ensuring secure access control, responsive design, guided workflows, intuitive navigation, and dynamic content delivery. Build and customize Lightning Web Components (LWC), Apex classes, triggers, Flows, and REST APIs to meet complex business requirements. Develop and configure Sales Cloud features such as opportunity management, lead routing, approval processes, sales automation, and dashboards. Implement AI/Agentic capabilities in Experience Cloud portals to provide personalized experiences, automate repetitive workflows, surface predictive partner insights, and recommend next best actions Collaborate with business analysts, architects, and UX designers to translate user stories and wireframes into technical solutions. Integrate Salesforce with third-party systems (e.g., ERP, PIMS, marketing tools, analytics) using APIs or middleware platforms (e.g. Boomi). Ensure adherence to Salesforce development best practices, code reviews, security standards, and change management processes. Support system testing, performance tuning, and deployment activities in development and production environments. Provide ongoing support, troubleshooting, and enhancement for existing applications and user-reported issues. Qualifications Bachelor&aposs degree in computer science, Information Systems, or a related field; relevant work experience considered in lieu of degree. 6+ years of hands-on Salesforce development experience, with demonstrated expertise in Sales Cloud and Experience Cloud. Proficient in Apex, Lightning Web Components (LWC), SOQL/SOSL, Visualforce, and Flow Builder. Experience developing and customizing Experience Cloud (Communities) portals including user access, navigation, branding, and content. Familiarity with Salesforce API integration and authentication methods (REST/SOAP, Named Credentials, OAuth). Salesforce certifications preferred (e.g., Platform Developer I/II, Sales Cloud Consultant, Experience Cloud Consultant). Knowledge of Agile development methodologies and version control tools (e.g., Git, Copado, Gearset). Strong analytical, problem-solving, and communication skills. Ability to work effectively in a fast-paced, dynamic environment. Proven track record of implementing innovative technology solutions that drive business value. Job Type Regular Shift Shift 1 (India) Primary Location: Bengaluru, Karnataka, India Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Show more Show less

Job Details Job Description: Part of the global PCIe/CXL Center of Excellent (CoE) team, developing the latest & state of the art PCIe/CXL solution for next generation FPGA in the latest process technology node. Develops logic/RTL design and simulation for IP/SoC design & integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design. Participates in the definition of PCIe/CXL architecture and microarchitecture features of the block being designed. Works with IP providers to integrate and validate IPs at the SoC level. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence. Drives quality assurance compliance for smooth IP/SoC handoff. Qualifications Bachelors degree in electrical/computer engineering or related field and 7+ years of experience Or a masters degree in electrical/computer engineering or related field and 6+ years of experience. Experience in micro-architecture (clocking, reset, power, etc) definition & debug. Good knowledge of PCIe/CXL or high-speed serial interface protocol, such as USB or Ethernet. 5+ years of RTL coding and/or IP integration experience into SoC design. Experience in design related tools such as LINT, CDC, PT-STA, Fishtail, Power UPF etc & design concept such as data flow, algorithm state machine, finite state machines, and timing charts. Knowledge on FPGA background would be a plus. Highly motivated individual, team player with good communication skill. Job Type Regular Shift Shift 1 (Malaysia) Primary Location: Penang 15 Additional Locations: Ecospace 1 Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Show more Show less

Performs functional logic verification of an FPGA to ensure design will meet specification requirements Develops FPGA verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications Executes verification plans and defines and runs system simulation models to verify the FPGA design, analyze power and timing, and uncover bugs Replicates, root causes, and debugs issues in the pre-silicon environment Finds and implements corrective measures to resolve failing tests Collaborates with FPGA architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features May also collaborate with systems and software engineers to support integration testing of the FPGA Documents test plans and drives technical reviews of plans and proofs with design and architecture teams Maintains and improves existing functional verification infrastructure and methodology Documents, reviews, and executes the verification strategy plan on different methodologies/techniques (e g , gate-level-simulation strategy, power patterns/aware simulations) used to enable feature coverage as per the microarchitecture specifications Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Run IO PHY tests with AMS (Digital/Analog Mixed Signal Simulation). Collaborates and communicates with Architects, micro architects, full chip architects, RTL developers, post-silicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Qualifications Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with 8+ years of technical experience. Related technical experience should be in/with: Pre Silicon Validation/Verification. JESD 79-5 DDR5, JESD209-5 LPDDR5, JESD 209-4 LPDDR4, DDR PHY Interface (DFI 5.1) Tessent SSN scan OVM/UVM, System Verilog, constrained random verification methodologies

Job Details: Job Description: As a RTL Design Hardware Engineer within the Software Performance and Integration group, you are expected to work on the RTL underpinning Altera's System-on-Chip integration tool, Platform Designer, FPGA Debug Environment Tools such as SignalTap and System Console. The goal of this team is to implement powerful embedded hardware systems using a straightforward flow from design creation through debugging and performance optimization. The team is responsible for development of RTL for various soft IPs, including an on-chip Memory Mapped Interconnect ( AXI/APB/AHB/Avalon) , streaming protocols IPs ( AXI / Avalon ), debug IP such as signaltap, ISSP, ISMCE, bridge and adapter IPs and supporting a full stack of tools which assemble these IPs in interesting and dynamic ways. As a Hardware Engineer in this position, you will need to be excellent at digital design with expertise in VHDL/Verilog/System Verilog with responsibilities as listed (but not limited to) below: Lead a team of dedicated RTL design Engineers to build soft IPs for Altera FPGAs Coming up with newer versions of on-chip transfer protocols aimed for high speed for our latest FPGA s using hyperflex architectures Developing new Interconnect topologies to maximize data transfer throughput over long distances Extending support for industry standard Memory Mapped and Streaming protocols Developing robust IP and networks which customers use in mission critical debug environments Work with RTL Design Verification team to review and supervise the verification of the IPs developed The RTL design engineer will have a direct influence on our customers and the adoption of our products, with tasks including the following: Work closely with developers across software, IP and embedded engineering to ensure we develop design flows that meet our customers' needs Guide IP release content, and serve as a liaison with the support, field, marketing, and product planning organizations Research, define, and validate key customer use cases Create reference RTL designs and regressions tests Use Altera FPGA design tools like our customers to identify usability and productivity problems or missing features Qualifications: Qualifications : BS/MS/PhD degree in Electrical/Computer/Software Engineering or equivalent and 10+ years of relevant industry experience Strong understanding and knowledge of digital design/Timing Closure concepts/Fundamentals of Verification/Hardware Debug Strong experience in Verilog and System Verilog Understanding of Computer Architecture/ARM Based Bus Protocols Understanding of other communication protocols will be plus Knowledge of Quartus or Vivado tool flow is a plus Tcl, Perl, and/or Python scripting skills Dedication to customer experience and usability Strong written and oral communication skills Ability to influence across organization boundaries Job Type: Regular Shift: Shift 1 (India) Primary Location: Bengaluru, Karnataka, India Additional Locations:

Job Details: Job Description: Team Leadership: Lead or mentor a team of engineers working on FPGA IP verification Define team priorities, set goals, and monitor performance through KPIs and regular performance reviews. Foster an environment of learning, collaboration, and technical excellence to drive verification efficiencies. Technical Management: Oversee the development and delivery of verification of IPs owned by the team and ensure alignment with QPDS/ releases. Drive innovation in verification methodologies to improve quality & efficiency. Collaborate with FPGA design, software, and validation teams to help integrate IP into the Quartus ecosystem. Ensure robust quality for the IP owned. Provide technical guidance on verification methodology. Functional Expertise: Hands-on technical verification lead who will own the verification on IPs for FPGA. Performs functional logic verification of an FPGA to ensure the design will meet specification requirements. Develops FPGA verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs simulation models to verify the FPGA design and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with FPGA architects, RTL developers, and software teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Documents, reviews, and executes the verification strategy plan on different methodologies/techniques used to enable feature coverage as per the microarchitecture specifications. Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies. Complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure). Experience: 10+ years of experience in verification in IP/ FPGA/ SoC/ ASIC. Proven expertise in RTL design and verification for FPGA architectures. Hands-on experience with OVM/UVM, System Verilog, and constrained random verification methodologies. Strong background in simulation tools such as ModelSim, Questa, VCS, or similar EDA simulators. Experience with Ethernet/ PCIe/ PIPE & FPGA architecture is an added advantage. Experience in design verification with developing, maintaining, and executing complex IPs and/or SOCs. Leadership & Soft Skills: Proven ability to lead and develop technical teams, drive collaboration, and deliver results. Strong problem-solving and analytical skills with a proactive mindset. Excellent communication and stakeholder management skills, capable of engaging both technical and non-technical audiences. Qualifications: Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or a related field. Job Type: Regular Shift: Shift 1 (India) Primary Location: Bengaluru, Karnataka, India Additional Locations:

Altera is looking for a talented and driven Silicon Design Engineering Manager to lead and inspire a multidisciplinary silicon design team. In this critical role, you will manage design engineers across multiple functional domains including logic design, verification, circuit design, and physical implementation for cutting-edge IP, subsystems, SoCs, and discrete chips. You ll be at the forefront of Altera s product innovation, driving high-quality silicon solutions that meet power, performance, area, and cost objectives. Key Responsibilities: Lead and manage a team of silicon design engineers across multiple disciplines and development phases. Drive end-to-end development of IP blocks, subsystems, and full-chip SoC designs, ensuring on-time delivery with high quality. Oversee design reviews, ensuring power, performance, area (PPA), and cost targets are met. Collaborate with architecture, IP, and SoC development teams to ensure cohesive design and execution. Monitor verification results, conduct design debug, analyze data, and drive resolution of design issues. Implement and maintain rigorous silicon quality and continuous improvement standards. Optimize and evolve silicon development methodologies, tools, and processes. Set clear team goals, manage priorities, provide coaching, and foster a culture of accountability and high performance. Role model Altera and Intel values while creating an inclusive, productive, and innovative work environment. Minimum Requirements: Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or a related field. 10+ years of experience in silicon design, including at least 3 years in a management or technical leadership role. Proven track record managing full lifecycle silicon design projects from architecture through tape-out. Strong technical background in logic design, verification, and physical design. Deep understanding of PPA trade-offs and experience driving metrics-based decision making. Experience working across functional teams and global development environments. Preferred Qualifications: Experience in SoC or FPGA-based design projects. Familiarity with industry-standard EDA tools and design methodologies. Demonstrated leadership in team building, performance management, and talent development. Strong communication and organizational skills.

Lead/manage a team of design verification engineers responsible for IP and SoC design verification. Deploys and manages leading silicon design verification processes, procedures, verification tools, and technologies based on latest best industry practices. Works with design, microarchitecture, and post-silicon validation teams to identify design bugs and improve overall microarchitecture. Collaborates with program leaders on the verification delivery and regression metrics against milestone requirements. Understands security milestone expectations and works with SoC security validation teams to incorporate security-related testing through validation, hackathon reviews, and new validation techniques to improve security coverage. Executes security and security development lifecycle tasks per job role and schedule milestones. Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results. Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment. Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with Architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from post-silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products Qualifications: Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with 15+ years of technical experience. Related technical experience should be in/with: Pre Silicon Validation/Verification. OVM/UVM, System Verilog, constrained random verification methodologies. Preferred Qualification Design Verification with developing, maintaining, and executing complex IPs and/or SOCs. The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure). Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies. Scripting experience with TCL/PERL/Python etc., Formal verification experience Experience in either Ethernet / PCIe / MACSEC / IPSEC protocols & FPGA architecture or FPGA prototyping. Experience in either SME/team Manage or Technical Lead