Key Responsibilities Own and execute hierarchical scan insertion and ATPG flows for SoCs/MCUs Integrate and verify MBIST at RTL level across various memory instances Enable LBIST integration, RTL and gate-level coverage analysis, and GLS (Gate-Level Simulation) Implement and verify IEEE1149.1 (JTAG) and IJTAG standards for boundary scan and internal test Conduct post-silicon debug of DFT patterns and drive root-cause analysis Collaborate daily with RTL design, physical design, and verification teams to meet quality and schedule goals Support testability reviews and sign-off processes across design milestones Mentor and provide technical leadership to junior engineers in the DFT domain
Responsibilities: Lead RTL synthesis and constraints generation/validation for MCU SoCs to meet performance, power, and area targets Develop and implement innovative methodologies and tools to improve design quality and engineering productivity Act as the key interface between frontend and backend design teams, resolving hand-off and timing-related issues Conduct detailed design reviews and provide feedback to peers and junior engineers Collaborate with cross-functional teams to resolve design collateral issues and enhance overall PPA (Power, Performance, Area) Support low power implementation flows and techniques Perform formality checks to ensure RTL vs. netlist equivalence
Key Responsibilities: Innovate and integrate creativity into the curriculum to align students with industry standards and manage course deployment across universities Collaborate cross-functionally to ensure timely execution and process setup Deliver technical training sessions (virtual or in-person) on embedded systems and software development to professors and students Mentor and advise faculty and students on embedded system concepts, debugging best practices, and PCB design fundamentals Analyze, review, and debug embedded software code supporting student projects Collaborate with product and application engineering teams to stay updated on Renesas hardware/software platforms Provide technical feedback to development teams based on interactions with trainees and customers Support technical enablement activities including documentation and knowledge base development
Key Responsibilities: Drive the full lifecycle of automotive MCU development projects from planning to mass production , ensuring on-schedule delivery Collaborate across cross-functional teams including customers, software, marketing, engineering, finance, sales, and suppliers/vendors Apply best-in-class program management practices including: Bottom-up planning Dependency mapping Critical path analysis Risk mitigation strategies Use industry-standard tools such as MS Project for project planning and tracking Regularly monitor project progress, report status, and escalate issues when necessary Provide clear and concise project updates to senior management Coordinate and conduct project gate reviews Maintain accountability for project timelines and milestones, ensuring timely resolution of all open issues Support the Program Manager and project teams in all organizational tasks throughout the development cycle
Key Responsibilities: Lead post-silicon validation of complex SoCs and MCUs at the system level. Define and execute validation plans, test strategies, and feature coverage matrices based on design and architecture specifications. Collaborate with architecture, design, verification, firmware, and product teams to align validation scope and methodologies. Set up and bring up evaluation boards, FPGA/emulation platforms, and validation systems . Validate key system features including boot, power management, interfaces, interrupts , and more under stress and corner cases. Develop and implement custom firmware, automation scripts, test content , and diagnostic tools . Drive root-cause analysis and silicon debug , working closely with design and DFT teams. Analyze test data, logs, and validation metrics; maintain bug tracking and drive issue closure. Lead and mentor a team of validation engineers, manage schedules and deliverables for tape-out or customer milestones. Generate validation reports, risk assessments, and coverage summaries for production or tape-out readiness.
Responsibilities: Work as part of the Design Enablement team, closely collaborating with SoC cross-functional teams Define and develop PDN and PV flows and methodologies for low geometry nodes (3nm, 5nm, 16nm) Manage requirements and define tools and flows needed for SoC-level implementation Collaborate with EDA vendors to evaluate and benchmark latest PDN & PV tools and methodologies Lead deployment and adoption of new tools, flows, and methodologies across the organization Act as a change agent in introducing innovative flow improvements and process standardization
Responsibilities: Research and develop AI/machine learning models for engineering and robotics applications Train, fine-tune, and perform in-context learning to build state-of-the-art AI/ML models Identify, prepare, and maintain datasets for model development Develop and select appropriate model architectures Deliver models along with comprehensive usage documentation and examples Develop AI models targeting robotics using virtual modeling frameworks like IsaacSim and MuJoCo
Key Responsibilities: Manage and mentor an internal Software Enablement Team Lead Zephyr and Xen Functional Safety (FuSa) development within OSS communities Drive software development, integration, and deployment strategies for automotive-grade MCUs Foster technical growth and development of young engineers in the team Ensure effective collaboration between internal teams and open-source contributors
Key Responsibilities: Develop SystemC/TLM2.0 models for IP blocks, CPUs, SoCs, and complete systems. Define transaction-level models for processors, cache controllers, interconnects, peripherals, NPUs, and ISPs. Port operating systems to virtual prototypes and assist in device driver development. Verify models at both IP and SoC level using self-checking test suites in C and ARM assembly. Develop system-level flows and methodologies using virtual platforms. Collaborate with firmware and software teams to ensure efficient utilization of virtual prototypes. Validate virtual platforms using embedded toolchains and debugging tools.
Key Responsibilities: Perform physical verification at the SoC, core, and block levels, including DRC, LVS, ERC, ESD, DFM, and tapeout tasks. Address complex physical design challenges related to sign-off and ensure timely resolution. Maintain deep understanding of physical verification workflows and methodologies across RTL to GDS2. Collaborate with Place-and-Route (PNR) teams to support verification sign-offs at various stages. Troubleshoot and resolve LVS issues, particularly for complex analog-mixed signal IP integrations. Support verification of full-chip components including I/O rings, corner cells, seal rings, RDL routing, and bumps. Contribute to the development of sign-off methodologies and provide technical guidance to broader teams. Apply knowledge of ERC, PERC, and ESD rule checks to improve design quality. Engage in floor planning tasks as needed (preferred but not mandatory). Ensure compliance with low-power design practices involving isolation cells, level shifters, power domains, and substrate isolation.
Key Responsibilities Work with system and micro-architects to define high-level, implementable specifications Develop RTL and run front-end flows such as lint, CDC, low-power checks, Conformal, and DFT checks Collaborate with verification teams on test plan development and debugging Run synthesis, manage timing constraints, and deliver synthesized netlists to physical design teams Write and manage UPF files; perform power-aware equivalence and low-power checks Coordinate with DFT, physical design, and emulation teams to meet project goals Support post-silicon validation teams in bring-up and debug
Key Responsibilities Define system and design architecture for middleware frameworks and device drivers for automotive applications Develop middleware and low-level drivers for ADAS/AD, IVI, and Gateway domains Define software requirements and create demonstration software to support customer promotion Conduct market research to identify and evaluate emerging technologies and trends Participate in discussions and technical engagements with global customers Drive the full software development lifecycle including design, development, verification, and validation Manage embedded system challenges like multi-core/multi-device communication, job scheduling, memory management (SMMU/IOMMU), and FFI (Freedom From Interference) Collaborate in cross-platform development across QNX, Linux, Android, FreeRTOS
Key Responsibilities: Develop Android BSP drivers for R-Car SoCs on both real and virtual environments based on product and market specifications Perform Android OS upgrades annually to track latest Android base releases Integrate BSP components into the centralized DevOps infrastructure for consistent SDK delivery Collaborate with hardware, middleware, and upper software layers to validate SoC performance, with a focus on GPU, DSP, audio, display, and camera Optimize power, performance, and resource utilization for automotive use cases Deliver customer support, including technical collateral such as reference solutions and application notes
Key Responsibilities: Software Development Design and implement robust drivers and application software for R-Car SoC using C/C++ Engage in the full software development lifecycle including requirements analysis, architecture design, coding, unit/system verification, and validation Follow industry best practices for maintainable, high-quality code with active participation in design reviews and code walkthroughs System Integration Collaborate with system engineering and middleware teams to integrate and optimize software on R-Car hardware Develop testing procedures ensuring smooth hardware-software communication Performance Optimization Analyze and enhance software performance for efficient resource use Perform performance verification and implement improvements to meet real-time processing needs Debugging and Testing Conduct thorough debugging and troubleshooting Develop and execute unit and system-level tests to ensure software reliability Team Collaboration & Communication Work effectively within an international team, coordinating with multiple stakeholders Maintain clear and comprehensive documentation of designs, tests, and resolutions
Key Responsibilities: Drive the architecture definition for SoC/MCU platforms based on product requirements. Translate high-level product concepts into detailed architectural and technical specifications. Collaborate with product and software architects to co-develop system-level architectures. Lead microarchitecture development of complex IP blocks and SoC subsystems. Participate in IP selection and evaluate make/buy trade-offs. Interface with design, DFT, physical design, emulation, and validation teams to align on architecture goals. Review and contribute to test plan creation with the verification team. Provide architectural support for post-silicon debug and validation efforts. Benchmark and optimize IP/SoC performance based on application needs.
Key Responsibilities: Develop and maintain performance models for SoC designs using Synopsys Platform Architect or Emulation Platform. Collaborate with architecture, design, software, and verification teams to define performance requirements and ensure alignment with overall system goals. Analyze and optimize system performance, including DDR memory, CPU, GPU, interconnects, and high-speed interfaces such as PCIe and UCIe. Identify performance bottlenecks and propose solutions to improve system efficiency. Conduct performance simulations and provide detailed analysis and reports. Mentor and guide junior engineers in performance modeling and analysis techniques and best practices. Stay updated with the latest advancements in SoC performance modeling and industry solutions.
Cross-Functional Collaboration Collaborate with various teams across the organization to maintain, enhance, and harmonize master data systems and processes. Data Quality & Integrity Ensure master data quality by performing root cause analysis, implementing corrective actions, and regularly reviewing key parameters such as yield, lead time, buffer stocks, and vendor costs. Automation & Process Improvement Drive automation and harmonization of data maintenance processes to improve efficiency and consistency. Project & Change Management Lead and support master data and reporting-related initiatives, including functional specification creation, design reviews, testing phases, and user training. Training & Knowledge Sharing Train Master Data team members and other departments on tools, processes, and best practices; organize and conduct training sessions. Stakeholder Engagement Partner with internal and external business functions to ensure global master data is maintained at the highest quality levels. Continuous Improvement & Documentation Document lessons learned, develop contingency plans, and support continuous improvement efforts aligned with organizational standards like OneRenesas.
Responsibilities Develop and implement Go-To-Market strategies for MCUs/MPUs in collaboration with Sales and Distribution teams Drive product promotion activities to increase pipeline opportunities and grow market share Support business development by identifying new customer opportunities and enabling design wins Engage with key customers to understand application needs and promote suitable Renesas solutions Manage cross-functional teams, including global counterparts and third-party partners Conduct training and enablement for distribution and channel partners to enhance product awareness and application knowledge Create and deliver compelling presentations to internal teams, customers, and partners Represent the company at industry events and customer meetings to strengthen brand presence Take ownership of regional business development goals and initiatives Influence internal stakeholders to align product offerings with market demands
Responsibilities Collaborate with the SoC Architecture team to define SoC/MCU architecture and technical specifications based on product requirements Work closely with cross-functional teams including silicon design, program management, manufacturing, software, FuSa, and cybersecurity to ensure first-time-right executions Define and deliver implementation specifications that meet key performance indicators (KPIs) and product requirements Ensure specification compliance through verification, validation, characterization, and testing Review architecture and implementation outcomes to ensure overall product compliance Work on advanced automotive high-performance SoCs , vehicle computers, SDVs, and MCUs Support IP selection and make/buy decisions Collaborate with R&D to refine architecture based on implementation feedback Engage with domains like SERDES, interconnects, NPUs, GPUs, imaging, debug, clocking, and reset architectures
Key Responsibilities Lead STA and PNR efforts for large, multi-interface, or mixed-signal subsystems Develop and refine STA and PNR methodologies tailored to complex subsystem challenges Drive automation and validation of timing and physical design data across subsystem boundaries Mentor and guide junior engineers, fostering technical growth and knowledge sharing Collaborate cross-functionally to resolve design, timing, and physical implementation challenges Present technical solutions and lead discussions with internal teams and customers on subsystem-level trade-offs and integration