Senior Staff Engineer- DFT

12 - 15 years

4 - 6 Lacs

Posted:22 hours ago| Platform: Foundit logo

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Work Mode

On-site

Job Type

Full Time

Job Description

Key Responsibilities

  • Own and execute

    hierarchical scan insertion

    and

    ATPG

    flows for SoCs/MCUs
  • Integrate and verify

    MBIST

    at RTL level across various memory instances
  • Enable

    LBIST

    integration, RTL and gate-level coverage analysis, and

    GLS (Gate-Level Simulation)

  • Implement and verify

    IEEE1149.1 (JTAG)

    and

    IJTAG

    standards for boundary scan and internal test
  • Conduct

    post-silicon debug

    of DFT patterns and drive root-cause analysis
  • Collaborate daily with RTL design, physical design, and verification teams to meet quality and schedule goals
  • Support

    testability reviews

    and sign-off processes across design milestones
  • Mentor and provide technical leadership to junior engineers in the DFT domain

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