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Sr Staff Engineer- RTL Design

Sr Staff Engineer- RTL Design

12 - 17 years

|

4 - 7 Lacs

hyderabad telangana india

Posted:15 hours ago| Platform: Foundit logo

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Skills Required

asic development flow constraints generation soc design sta timing closure

Work Mode

On-site

Job Type

Full Time

Job Description

Responsibilities:

Lead RTL synthesis and constraints generation/validation for MCU SoCs to meet performance, power, and area targets
Develop and implement innovative methodologies and tools to improve design quality and engineering productivity
Act as the key interface between frontend and backend design teams, resolving hand-off and timing-related issues
Conduct detailed design reviews and provide feedback to peers and junior engineers
Collaborate with cross-functional teams to resolve design collateral issues and enhance overall PPA (Power, Performance, Area)
Support low power implementation flows and techniques
Perform formality checks to ensure RTL vs. netlist equivalence

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