1691 Physical Design Jobs - Page 12

Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from de...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Hi, Greetings!! Hiring for Permanent role of Leadsoc technologies Pvt Ltd. Pl ease find the below JD. PD: Experience in Block/SOC level PD Implementation flow. Netlist to GDSII / PD / Implementation flow / PnR / APR Low power design experience Floorplanning, Power planning, Placement, CTS, Routing, Extraction, DFM Congestion and timing analysis, Coming with better QoR Sign-off flow :: STA, DRC/LVS/Antenna/ERC, Power analysis, IR/EM analysis, LEC, ECO (Timing and Functional) Have in-depth knowledge of entire physical design process from RTL to GDS2 generation which includes floorplan, Placement, CTS, Routing and Sign Off ( STA, PV, IR/EM) Experience in ECO implementation Hands on experience i...

Hiring Senior VLSI Engineer (10+ yrs) with strong experience in Low-Power Implementation, EMIR Analysis (Static/Dynamic), and SoC Physical Design using Redhawk/Voltus, ICC2/Innovus. Required Candidate profile Experienced SoC PD engineer skilled in EMIR, low-power design, PnR, STA, DRC/LVS, and sign-off. Strong in TCL/Perl scripting, tool automation, and FinFET node implementation.

You'll be part of the product validation team for Synopsys's PrimeTime tool. This team works closely with R&D and product engineering to solve complex technical challenges in areas of static timing analysis to accurately validate and deploy these technologies on their high-performance designs. Job Description: Execute the product validation of Synopsys's PrimeTime tool by understanding requirements specifications and functional specifications, customer use cases. Perform in-depth customer incoming root cause analysis to understand the product weak areas and hot spots and execute proactive testing to reduce customer incoming thereby improving product quality. Collaborate with cross-functional...

Job Description Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product dev...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cas...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cas...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing, and physical verification. The role also involves collaborating with cross-functional teams, mentoring junior engineers, and ensuring design meets performance, power, and area specifications. Qualifications Strong expertise in flo...

Job Description We are seeking a highly skilled High-speed SERDES IO PHY Layout designer with 5 - 9 years of experience. Apart from Serdes PHY Layout, the ideal candidate should have a strong background in analog/IO design principles, hands-on experience with layout tools, Automated PnR and a passion for solving challenging technical problems. Key Responsibilities: Develop and optimize Serdes PHY, analog and mixed-signal IC layouts, ensuring high performance and manufacturability. Collaborate with design engineers to understand design requirements and translate them into precise layouts. Strong experience in debugging DRC, ERC, LVS, EMIR and PERC issues independently. Work experience of bloc...

You will work on physical design implementation of Optical Network ASICs and will be learning latest technology nodes and developing flow , doing implementation to achieve best in class ASICs , which are optimized for power, performance and area metrics How You Will Contribute And What You Will Learn Perform physical implementation steps including floor planning, place and route, power/clock distribution, physical verification and timing closure at block level as well as full chip Work with logic designers & Hardware team to drive feasibility studies and explore design trade-off for physical design closure Perform technical evaluations of IP vendors, process nodes and provide recommendations...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill collaborate closely with cross-functional teams to ensure the successful delivery of highquality designs Responsibilities: Responsible for leading a team of STA engineers and close high frequency, lower tech node complex designs. Understand Design Architecture and timing requirements Develop timing constraints SDC and validate Work with ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance ...

As a Physical Design Engineer at ARF Design, you will be responsible for designing and implementing the physical design of integrated circuits. You will collaborate with cross-functional teams to ensure successful design completion. Additionally, you will be performing physical design verification and optimization. Qualifications required for this role: - Minimum of 3 years of experience in physical design engineering - Proficiency in tools such as Synopsys, Cadence, and Mentor Graphics - Strong understanding of timing closure and physical verification methodologies If you are interested in applying for this position, please send your updated resume to divyas@arf-design.com with the subject ...

Role Overview: You will be responsible for executing internal projects or small tasks of customer projects in the field of VLSI Frontend, Backend, or Analog design with minimal supervision from the Lead. As an individual contributor, you will work on tasks such as RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, Signoff, etc. Your primary goal will be to complete the assigned tasks successfully on time with minimal support from senior engineers while ensuring quality delivery as approved by the senior engineer or project lead. Key Responsibilities: - Work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog L...

Responsibilities: Collaborate with cross-functional teams on project delivery. Optimize resource utilization through efficient floor planning. Ensure timing closure using STA, Synthesis & TA techniques.

Responsible for high-performance microprocessor blocks RTL to GDSII implementation Perform block-level synthesis, floor-planning, placement, and routing. Close the design to meet timing, power budget, and area. Implement ECO's to address functional bugs and timing violations. Team player, with good problem solving and communication skills. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8-12 years of industry experience in physical design methodology. Good knowledge and hands-on experience in physical design methodology, which includes logic synthesis, placement, clock tree synthesis, and routing. Should be knowledgeable ...

Design and implement synthesis flows using Synopsys Design Compiler. Collaborate with cross-functional teams to alignmethodologywith design requirements. Drive innovation in SoC design methodologies, tools, and flows. Provide technical leadership and support to resolve RTL, DFT, and synthesis-related issues. Interface with EDA vendors to evaluate and integrate new tool features. Ensuremethodologyscalability and robustness across multiple projects. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or VLSI Design. 5–8 years of hands-on experience with...

We are seeking a highly skilled Lead Engineer Physical Design to join our Silicon Engineering team in Hyderabad. In this role, you will drive the design, implementation, and optimization of advanced SoCs using state-of-the-art physical design methodologies. You will work on challenging synthesis, floorplanning, place-and-route, timing closure, and sign-off flows while mentoring a team of engineers and collaborating with cross-functional groups. This is an excellent opportunity to contribute to world-class silicon solutions and grow as a technical leader. Responsibilities Lead and execute the end-to-end physical design flow for complex SoCs and IP blocks (RTL handoff to GDSII). Define and dri...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience OR Master's degree in Computer Science, Electrical/Electronics Engineeri...

General Summary: Skills/experience : 2 to 6 years of experience in Microprocessor Architecture , Power analysis & optimization , Implementing SoC power managemen t schemes, Good knowledge of Linux Kernel, Debugging Tools, Power and performance analysis, Android Power Framework , Working experience in systems software design and development. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field. Responsibilities : Identification, analysis and triage of system level obstacles to optimize SoC Power. Guide multi-function groups through the execution cycle in achieving the set power targets. Evaluate power features and work with a wide s...

Collaborate with architecture, timing, and logic design teams making a crucial impact on delivering cutting edge & Low power SOCs. Perform I/O, bump & RDL (redistribution layer) planning, hard IP integration, partitioning, pin and feedthrough planning, repeater insertion, power grid generation. Perform special interface, and interconnect planning, bus routing, sequential pipeline planning and top-level design for testability (DFT). Be responsible for driving efficiency and quality improvements to the overall FC methodology including floorplan optimization for better utilization/QoR/runtime and timing and physical aware feedthrough/pin placement. Be responsible for coordinating collateral han...