Senior Staff Engineer Design

• Contribute to the implementation of highly complex automotive SoC designs in a multi-site organization covering all aspects of Physical Design.
• Work independently in different phases of the RTL2GDS flow: With focus on (one or many) Synthesis, Constraints and equivalence check, Generation of Floorplans, Placement, Clock Trees, Routing and Power Distribution Network for efficient Timing Closure with Signal Integrity and Physical Sign off including Power Integrity
• Work with industry standard tools for physical design and signoff with good understanding of scripting languages (shell, perl, tcl) and Make flow.
• Focus on PPA, define the Partition shapes, pins and feedthrough along with IP integration guidelines are followed (reviewed along with IP owners) to suit the requirements.
• Analyze and solve problems of high complexity using your global expert network
• Drive the PnR closure of multimillion gate designs in lower technology nodes, perform SoC level IR/EM analysis, debugging and fixing.
• Running SoC level Physical verification, debugging and fixing including Chip finishing, metal fill, Sealring and Tapeout checks
• Be a member of an expert network and drive innovation, methodology for the RTL to GDS2 development cycle of next generation automotive SoCs.
  

Your Profile

• A degree in Electrical Engineering, Microelectronics or a similar field.
• At least 8 yrs of exp in Physical Design of highly complex SoCs.
• Understanding of RTL coding, IP handling (including internal/external) along with integration issues is big plus.
• Programming skills and knowledge in scripting languages like Tcl, Perl or Python.
• Experience in working as a member of SoC design teams with high cost and quality awareness.
• Fluent English language skills with German being an added plus.
• Understanding of industry standard tools for physical design and signoff
• Be a quick learner and become productive from the beginning
• Be a team player while taking and acting on responsibilities.
  

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