Serdes/PCIe IP Application Engineer Synopsys

10.0 - 14.0 years

0 Lacs

noida, uttar pradesh

On-site

As a High Speed Serdes PHY Application Engineer, your role will involve the entire SOC design flow, including architecture, high speed Interface IP(IIP) integration, synthesis, design for test(DFT), low power design(UPF), CDC/RDC check, static timing analysis(STA), silicon test plan, silicon bring-up, and mass production silicon debug. In addition, you will: - Work closely with customers to understand new requests or customization features from customers PRD/MRD - Provide integration training to customers and conduct reviews on their major SoC milestones - Provide feedback to Synopsys R&D for customization features or continuous IIP product improvements - Participate in IIP design reviews to...

Posted 1 month ago

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Senior Staff Engineer Design Infineon Technologies

8.0 - 10.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Job Description In your new role you will: Contribute to the implementation of highly complex automotive SoC designs in a multi-site organization covering all aspects of Physical Design. Work independently in different phases of the RTL2GDS flow: With focus on (one or many) Synthesis, Constraints and equivalence check, Generation of Floorplans, Placement, Clock Trees, Routing and Power Distribution Network for efficient Timing Closure with Signal Integrity and Physical Sign off including Power Integrity Work with industry standard tools for physical design and signoff with good understanding of scripting languages (shell, perl, tcl) and Make flow. Focus on PPA, define the Partition shapes, p...

Posted 2 months ago

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Serdes/PCIe IP Application Engineer (post-sale) Synopsys

10.0 - 14.0 years

0 Lacs

noida, uttar pradesh

On-site

We are seeking a skilled High Speed Serdes PHY Application Engineer to become a part of our team. Your responsibilities will encompass the entire SOC design flow, including architecture, integration of high speed Interface IP (IIP), synthesis, design for test (DFT), low power design (UPF), CDC/RDC checks, static timing analysis (STA), silicon test plan development, silicon bring-up, and mass production silicon debug. In addition, you will: - Collaborate closely with customers to comprehend new requests or customization features from customers" PRD/MRD. - Deliver integration training to customers and review their major SoC milestones. - Provide feedback to Synopsys R&D for customization featu...

Posted 3 months ago

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