Serdes/PCIe IP Application Engineer (post-sale)

We are seeking a skilled High Speed Serdes PHY Application Engineer to become a part of our team. Your responsibilities will encompass the entire SOC design flow, including architecture, integration of high speed Interface IP (IIP), synthesis, design for test (DFT), low power design (UPF), CDC/RDC checks, static timing analysis (STA), silicon test plan development, silicon bring-up, and mass production silicon debug. In addition, you will: - Collaborate closely with customers to comprehend new requests or customization features from customers" PRD/MRD. - Deliver integration training to customers and review their major SoC milestones. - Provide feedback to Synopsys R&D for customization features or continuous IIP product enhancements. - Engage in IIP design reviews to synchronize development with future customer requirements. - Showcase creativity and innovation by developing tools to simplify daily tasks or enhance efficiency and by creating application notes for gate-level simulation, silicon debug, and physical implementation. Key qualifications for this role include: - A Bachelor's and/or Master's degree in Electrical and/or Electronic Engineering, Computer Engineering, or Computer Science. - Minimum of 10 years of experience in IP and/or ASIC Design/Verification/Applications. - Proficiency in RTL coding in Verilog, simulation, synthesis, static timing check, equivalence check, etc. - Domain expertise in PCI Express, CXL, and Ethernet protocols. - Results-driven with the ability to manage multiple tasks concurrently. - Strong verbal and written communication skills in English for customer interactions. - High level of self-motivation, personal responsibility, inference, reasoning, problem-solving skills, and attention to detail. Preferred experience includes: - Knowledge in synthesis, CDC, RDC, Lint, DFT, and STA. - Experience in ASIC/SoC tape-out from concept to full production. - Proficiency in scripting languages (Tcl, Perl, Python, Excel VBA, etc.). - Skills in silicon debug, FPGA/hardware troubleshooting, package and PCB design, and SI/PI knowledge would be advantageous.,