16 Pci Express Jobs

As an OpenBMC Developer / Lead, you will be responsible for leading the design, development, and implementation of software for board management controllers and orchestration software. Your primary focus will be on utilizing BMC to monitor and maintain a fleet of devices in tomorrow's data center environment. You should possess the ability to work independently on various modules, analyze trade-offs in complex systems, and provide recommendations for solutions. Your key responsibilities will include module planning, identifying project risks, developing deployment strategies, and creating test-automation suites. Collaboration with customers, users, project managers, and other engineers will be essential for the successful execution of projects. To excel in this role, you should have solid programming skills in C and C++, along with an in-depth understanding of Linux kernel, device driver, IPC, and U-boot. Familiarity with Linux application development and knowledge of real-time OS like ThreadX will be advantageous. Additionally, you are expected to have expertise in BMC technologies such as IPMI, SDR, SEL, FRU records, Redfish, and management protocols. Experience with board bringup, ARM architecture, BMC-related hardware, and common buses like I2C, IPMB, PMBUS, SPI, LPC, UART, and JTAG will be beneficial. Familiarity with OpenBMC, standards/technologies like SCSI, SES, RAID, SAS, SATA, SSD, PCI Express, network protocols, and PSoC or MCU firmware development will be considered a plus. The ideal candidate for this role holds a Bachelor's degree in a relevant field or an equivalent combination of education and experience. If you are eager to take on this challenging opportunity, please share your CV at pranay.jha@vvdntech.in.,

The ideal candidate for this position should have 3 to 8 years of experience and be located in Bangalore. With 8-10 job openings available, the educational requirement is BE/B.Tech./MS/M.Tech. in Electronics or Electronics & Communication. Key Core Competencies include: - Experience in working on SoC level testbench and verification environment - Proficiency in testbench architecture, coding, and understanding of design issues in RTL - Ability to generate testbenches, create test vectors, conduct simulations, and perform gate-level simulations - Hands-on experience with System Verilog and Assertion-based verification methodology - Minimum 3 years of experience in High-Level Verification (HVL) using tools like System Verilog, Vera, Specman, E, VMM, OVM, UVM - Capability to work independently, provide guidance to others, and serve as the point of contact for resolving technical queries within the team - Strong commitment and passion for technical work Preferred Simulation Tools: - NCSIM - VCS - ModelSim - Questa Additional Advantage will be given to candidates with: - Knowledge of RTL coding styles - Familiarity with low power verification (UPF/CPF) - Experience with System C - Expertise in protocols like AMBA AHB/AXI, MIPI, PCI Express, SATA, USB To apply for this position, please email your resume to careers@truechip.net with the position/location mentioned in the subject line.,

As a Verification Engineer at NVIDIA, you will be responsible for verifying the design and implementation of the next generation of PCI Express controllers for GPUs and SOCs. This role offers you the chance to make a real impact in a dynamic, technology-focused company that influences product lines spanning from consumer graphics to self-driving cars and artificial intelligence. Working alongside a global team of exceptional individuals, your mission will be to push the boundaries of what is achievable today and shape the future of computing. At NVIDIA, we are passionate about parallel and visual computing, driven by our shared goal of revolutionizing the use of graphics to solve complex computer science challenges. The evolution of NVIDIA's GPU from a tool for simulating human imagination to a powerhouse for running deep learning algorithms showcases its transformation into the AI computing company. In this role, you will be verifying ASIC design, architecture, golden models, and micro-architecture of PCIE controllers at IP/sub-system levels using advanced verification methodologies like UVM. Your responsibilities will include building reusable bus functional models, monitors, checkers, and scoreboards following a coverage-driven verification approach. Understanding the design specification and implementation, defining verification scope, developing test plans, tests, and verification infrastructure will be key aspects of your role. Collaboration with architects, designers, and pre and post silicon verification teams will be essential to successfully fulfill your responsibilities. To qualify for this position, you should hold a B.Tech./ M.Tech degree or equivalent experience with at least 2 years of relevant experience. Proficiency in verification at Unit/Sub-system/SOC level, expertise in Verilog and SystemVerilog, and comprehensive verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA) are required. Experience in developing functional coverage-based constrained random verification environments, familiarity with DV methodologies like UVM/VMM, and exposure to industry-standard verification tools for simulation and debugging are necessary. To excel in this role, having excellent knowledge of PCIE protocol (Gen3 and above), a solid understanding of system-level architecture for PCIE/CXL-based designs, and experience with scripting languages like Perl, Python, or similar is advantageous. Strong debugging and analytical skills, good interpersonal abilities, and a passion for working collaboratively as part of a team will make you stand out. Join NVIDIA in shaping the future of computing and contribute to groundbreaking technological advancements.,

We are seeking a skilled High Speed Serdes PHY Application Engineer to become a part of our team. Your responsibilities will encompass the entire SOC design flow, including architecture, integration of high speed Interface IP (IIP), synthesis, design for test (DFT), low power design (UPF), CDC/RDC checks, static timing analysis (STA), silicon test plan development, silicon bring-up, and mass production silicon debug. In addition, you will: - Collaborate closely with customers to comprehend new requests or customization features from customers" PRD/MRD. - Deliver integration training to customers and review their major SoC milestones. - Provide feedback to Synopsys R&D for customization features or continuous IIP product enhancements. - Engage in IIP design reviews to synchronize development with future customer requirements. - Showcase creativity and innovation by developing tools to simplify daily tasks or enhance efficiency and by creating application notes for gate-level simulation, silicon debug, and physical implementation. Key qualifications for this role include: - A Bachelor's and/or Master's degree in Electrical and/or Electronic Engineering, Computer Engineering, or Computer Science. - Minimum of 10 years of experience in IP and/or ASIC Design/Verification/Applications. - Proficiency in RTL coding in Verilog, simulation, synthesis, static timing check, equivalence check, etc. - Domain expertise in PCI Express, CXL, and Ethernet protocols. - Results-driven with the ability to manage multiple tasks concurrently. - Strong verbal and written communication skills in English for customer interactions. - High level of self-motivation, personal responsibility, inference, reasoning, problem-solving skills, and attention to detail. Preferred experience includes: - Knowledge in synthesis, CDC, RDC, Lint, DFT, and STA. - Experience in ASIC/SoC tape-out from concept to full production. - Proficiency in scripting languages (Tcl, Perl, Python, Excel VBA, etc.). - Skills in silicon debug, FPGA/hardware troubleshooting, package and PCB design, and SI/PI knowledge would be advantageous.,

Wipro Limited is a leading technology services and consulting company dedicated to developing innovative solutions that cater to the most intricate digital transformation needs of clients. With a vast portfolio of capabilities in consulting, design, engineering, and operations, Wipro assists clients in achieving their most ambitious goals and establishing future-ready, sustainable businesses. The company, with over 230,000 employees and business partners operating in 65 countries, is committed to aiding customers, colleagues, and communities in thriving amidst a constantly changing world. For more information, visit www.wipro.com. As a Lead Design Verification Engineer with at least 7 years of hands-on DV experience in SystemVerilog/UVM, you will be responsible for owning and driving the verification of a block/subsystem or a SOC. An ideal candidate should have a proven track record of leading a team of engineers and possess extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM. Proficiency in Tesplan and Testbench development, execution of test plans using high-quality constrained random UVM tests to achieve coverage goals on time, and adeptness in debugging and exposure to all aspects of verification flow including Gatesims are essential. The candidate must have extensive experience in the verification of technologies such as PCI Express or UCIe, CXL or NVMe, AXI, ACE or CHI, Ethernet, RoCE or RDMA, DDR or LPDDR or HBM, ARM or RISC-V CPU based subsystem or SOC level verification using C/Assembly languages, and Power Aware Simulations using UPF. Experience in using EDA tools like VCS, Verdi, Cadence Xcelium, Simvision, Jasper, and revision control systems such as Git, Perforce, Clearcase is required. Experience in SVA and formal verification is desirable, and knowledge of script development using Python, Perl, or TCL is an added advantage. The position is available in various locations including Bangalore, Hyderabad, Kochi, Pune, Ahmedabad, and Pune. The ideal candidate must have a minimum of 7 years of YoE. Key Responsibilities: - Define product requirements and implement VLSI and hardware devices - Continuously upgrade and update design tools and frameworks - Analyze and select the right components and hardware elements for product engineering - Conduct cost-benefit analysis to choose the best design - Develop architectural designs for new and existing products - Implement derived solutions and troubleshoot critical problems - Evangelize architecture to project and customer teams to achieve the final solution - Monitor product solution and make continuous improvements - Understand market-driven business needs and technology trends to define architecture requirements and strategy - Develop Proof of Concepts (POCs) to demonstrate product feasibility - Provide solutioning for RFPs from clients and ensure overall product design assurance - Collaborate with sales, development, and consulting teams to reconcile solutions to architecture - Provide technical leadership in designing custom solutions using modern technology - Validate solutions from technology, cost structure, and customer differentiation perspectives - Identify and resolve problem areas in architectural design and solutions - Monitor industry and application trends and provide strategic input during product deployment - Support delivery team in product deployment and issue resolution - Develop product validation and performance testing plan in alignment with business requirements - Maintain product roadmap and provide inputs for product upgrades based on market needs - Build competencies and branding through necessary trainings, certifications, and Thought leadership content development - Mentor developers, designers, and junior architects for career enhancement - Contribute to the architecture practice by conducting selection interviews Performance Parameters: - Product design, engineering, and implementation: Measure based on CSAT, quality of design/architecture, FTR, delivery as per cost, quality, and timeline, POC review and standards - Capability development: Measure based on % of trainings and certifications completed, mentorship of technical teams, and development of Thought leadership content Wipro is dedicated to reinventing your world by building a modern, end-to-end digital transformation partner with ambitious goals. The company is looking for individuals who are inspired by reinvention and are committed to constant evolution in their careers and skills. Join Wipro to realize your ambitions and be part of a purpose-driven business that empowers you to design your own reinvention. Applications from people with disabilities are explicitly welcome.,

Roles & Responsibilities: Must have very good System Verilog/UVM knowledge with prior work experience on live projects. Must have expertise in PCI Express and/or Ethernet bus protocols This is a desirable skill. Change to Experience in PCI Express and/or Ethernet bus protocols desirable. Also move it to the end. Expertise in AMBA bus protocols and ARM CPU Must have experience in Unix, Configuration Management, Bug tracking and verification dashboarding tools Experience in developing functional verification environments including the components like monitors, checkers, scoreboards and assertions Experience in verification methodologies using random stimulus along with functional coverage Scripting Language (PERL/Python/Shell/Makefile) Must have good debugging and problem-solving skills Good communication skills and ability & desire to work as a team player Must be highly motivated and independent contributor with good aptitude and attitude Educational Qualification: BE/ME or BTech /MTech

You have a great opportunity as a Project Management Specialist at Truechip, a leading provider of Design and Verification solutions in the VLSI industry. As a Project Management Specialist, you will be responsible for overseeing all aspects of multiple projects, ensuring they meet their goals on time and with high quality. Your role will involve organizing people, tasks, and resources to successfully conclude projects. Leading multiple project management team members and directly managing one or more projects will be part of your responsibilities. Truechip is looking for a leader with a Go-Getter attitude who can transform project teams and serve as a role model for team members to follow. Direct interaction with multiple customers and reporting directly to the CEO is also expected in this multifaceted role. You must have at least 10 years of experience, including managing a team of 50+ members. A Bachelor's degree in Engineering is required, while a Master's degree like an MBA is preferred. Possessing PMP/Prince 2 certification will be a plus. Key responsibilities include leading project planning and implementation, defining project scope and goals, scheduling timelines, coordinating project teams and customers, resource planning, risk assessment, project administration, budget management, and reporting to senior management. Maintaining strong customer relationships, ensuring high-quality deliverables, and tracking project performance are essential aspects of the role. To excel in this position, you must demonstrate high integrity, effective communication skills, and a proactive attitude. Experience in project management, creating delivery schedules, and engaging with international customers is crucial. Additionally, you should have strong organizational skills, the ability to manage multiple projects simultaneously, and a commitment to meeting customer timelines with high-quality results. Experience in semiconductor/SOC/IP/VIP design and verification, testbench architecture, verification planning, simulation tools, and handling ODCs for customers will be advantageous. International and domestic travel for short durations may also be required for this role. Truechip offers a dynamic work environment with a global presence across North America, Europe, and Asia. With over 11 years of experience in the VLSI industry, Truechip is committed to providing innovative solutions to its customers. For more information about Truechip, visit www.truechip.net.,

Experience as an embedded software developer where you are comfortable with firmware and debugging experience who understands the low-level, device driver layer. Strong in debugging skills, especially in the core kernel, Kernel crash (oops), system software & device driver domain with experience on GDB, JTAG/T32. He/She will be responsible for the development of host software components for Embedded operating systems. Duties will include implementing kernel mode device drivers, other low-level operating system components, and some application-level development for embedded Linux. This job includes the development of new device drivers for future products as well as support of existing device drivers for deployed products. The applicant should be familiar with working in a development environment using revision control, issue tracking, and automated testing. Design and develop device drivers, middleware, and board support packages (BSP) in various embedded OS environments Experience in Linux kernel and Heavy Device Driver Experience Expert in embedded C programming debug skills, especially in the core kernel software stability & device driver domain with experience on GDB, JTAG/T32 Experience with Linux kernel & embedded systems (Memory Mgmt, Threads/Processes, IPCs & Synchronization, Interrupts, Boot sequence, etc) Exposure to Make, GNU/GCC, and toolchains Experience in related display drivers like HDMI, Display Port, HDCP, Ethernet, PCI Express, USB, etc Experience in chip ARM, RISC-V Driver customization per customer needs Assist the Applications team with customer support as needed Produce documentation that may be used inside and outside the company. Skills : - debugging, core kernel, Kernel crash (oops), system software , GDB, JTAG/T32, revision control, issue tracking, and automated testing, Linux kernel, Heavy Device Driver, embedded C programming , Make, GNU/GCC, and toolchains, HDMI, Display Port, HDCP, Ethernet, PCI Express, USB, chip ARM, RISC-V, debugging, core kernel, Kernel crash (oops), system software , GDB, JTAG/T32, revision control, issue tracking, and automated testing, Linux kernel, Heavy Device Driver, embedded C programming , Make, GNU/GCC, and toolchains, HDMI, Display Port, HDCP, Ethernet, PCI Express, USB, chip ARM, RISC-V Mandatory Key Skills embedded c,embedded software development,embedded linux,customer support,arm, firmware, device drivers,jtag,usb,HDMI*,Display Port*,HDCP*,Ethernet*,PCI Express* Keywords embedded software development,embedded linux,customer support,Ethernet,embedded c*Mandatory Key Skills embedded software development,embedded linux,customer support,Ethernet,embedded c*

For Server, Storage system level FW development, BIOS FW design, development and Debug. The Lead BIOS Development Engineer is a self-motivated engineer who designs, develops and verifies software solutions. For moderate-complexity products or projects, this includes defining BIOS requirements and a BIOS architecture, deriving the BIOS functionality, and supporting BIOS verification strategies. The job holder is expected to deliver high-quality BIOS solutionsand collaborate with customers/users, the development team, and various stakeholders within the company to ensure the efficient, timely delivery of all work packages. He or she has profound knowledge of BIOS development process practices and is able to select and scale these according to project needs. ESSENTIAL DUTIES AND RESPONSIBILITIES (Key firmware Engineering Capabilities) 1. Work with theFW manager and/or PM to provide information that will aid in the initial estimation process (RFI/RFI). 2. Stay abreast of the latest technology and techniques to provide designs that are competitive and cost-effective. 3. Write clear and concise documentation related to the work performed. Might elaborate more thoroughly when required. 4. Work with thePrincipal Software Developer, Project Manager, cross-functional teams, and key project stakeholders to collect requirements, identify solutions & tasks, provide estimates, and meet production deadlines. 5. Develop new software or modify/enhance existing software within expected specification, time, quality, and completion metrics. 6. Define software concepts and architectures based on requirements analysis. 7. Develop and run effective software verification tests to ensure product stability and performance. 8. Identify, document, prioritize, and resolve software issues on a software unit & system level 9. Lead the process to identify and mitigate technical project risks. 10. Comply with project plans and industry standards 11. Lead the process of detailed technical planning 12. Acts as atechnical leader for the software development team 13. In general, performs project-level tasks independently. 14. Mentor junior or mid-level software developers 15. Initiates and supports software process & quality improvement activities. 16. Proactively take initiative and demonstrate prominent level of accountability 17. Work with cross-functional teams to complete projects in time 18. Follow department processes and procedures 19. Comply with company security and safety policies 20. May perform other duties and responsibilities as assigned TECHNICAL KNOWLEDGE & SKILLS Proficient in most of the following: Strong working knowledge of AMI or Insyde UEFI BIOS code structure, ability to build, compile, and modify the BIOS source Good knowledge of x86 BIOS & OS interaction with Windows or Linux etc. Good knowledge of ACPI, SMI, SCI, APM, AMD Power Now, ASF, Debuggers, AFI, Boot block, SMART, Hyper Transport, Intel LFBP, Intel Speed-step, MPS tables, Net-boot, PCI Express config & routing, PXE, S1-S4 sleep, Serial Flash, SMBUS & SMBIOS, USB2.0, User ROM, WFM etc. Working knowledge of BMC includes IPMI 1.5 & 2.0, event logs, SDR, SEL, FRU records, serial over LAN, IPMB, Side-band LAN, KCS, etc. Working knowledge of the following OS, Windows Adv Server, XP, SUSE 32 and 64, Red hat, etc. Working knowledge of Windows & Linux configuration, installation procedure, network configuration, driver configuration, etc. Hands-on design knowledge of thelatest peripheral chipsets for Gigabit Ethernet, Ultra-SCSI 320, USB2.0, 1394, Ethernet, IDE, SATA & PCI cards (modem, SCSI, TV, etc.) AGP cards, etc. High-performance RISC X86 CPUs and architecture Inc. Intel P4, Xeon, Opteron & Athlon64 Working with external partners and experts on Jabil internally to create solutions for Jabil server products, root cause analysis, and deliver proper solutions. Creating/Reviewing BIOS functional requirements and feature design documentation Can lead team and feature development. Good knowledge of theproduct progress phase, andfirmware release process. Extra SKILLS is plus. - Comprehensive knowledge of Agile practices or scrum. - Good understanding of product development and manufacturing processes including test validation. - Basic technical background to recognize, assess and communicate cross-functional issues and risks. LANGUAGE SKILLS Ability to read, analyze, and interpret general business periodicals, professional journals, technical procedures, or governmental regulations. Ability to write reports, business correspondence, and procedure manuals. Ability to effectively present information and respond to questions from groups of managers, clients, customers, and the general public in English. Must be capable of scoring 7 on the IELTS scale (or equivalent result in other assessment tools) for English language skills. COMMUNICATION SKILLS - Influence others and share best practices. - Effectively communicate with good understanding of English - Understand and meet customer needs and expectations. - Work as part of a global team. - Could smoothly to co-work with cross function team - Ability to define problems, collect data, establish facts, and draw valid conclusions. EDUCATION AND EXPERIENCE REQIREMENTS Bachelor's degree in BIOS Engineering from an accredited college or university. Masters degree is preferred. 8 years experience in an engineering role engaged in the Design, Validation, and Manufacturing of products. Or an equivalent combination of education, training, or experience covering the above. BIOS feature development experience is a plus. Automation test script development experience is a plus. Has experience as ateam lead or feature development is a plus. Ability to travel globally 20%

JOB SUMMARY (Main Responsibilities) For Server, Storage system level FW development, BIOS FW design, development and Debug. The Lead BIOS Development Engineer is a self-motivated engineer who designs, develops and verifies software solutions. For moderate-complexity products or projects, this includes defining BIOS requirements and a BIOS architecture, deriving the BIOS functionality, and supporting BIOS verification strategies. The job holder is expected to deliver high-quality BIOS solutionsand collaborate with customers/users, the development team, and various stakeholders within the company to ensure the efficient, timely delivery of all work packages. He or she has profound knowledge of BIOS development process practices and is able to select and scale these according to project needs. ESSENTIAL DUTIES AND RESPONSIBILITIES (Key firmware Engineering Capabilities) 1. Work with theFW manager and/or PM to provide information that will aid in the initial estimation process (RFI/RFI). 2. Stay abreast of the latest technology and techniques to provide designs that are competitive and cost-effective. 3. Write clear and concise documentation related to the work performed. Might elaborate more thoroughly when required. 4. Work with thePrincipal Software Developer, Project Manager, cross-functional teams, and key project stakeholders to collect requirements, identify solutions & tasks, provide estimates, and meet production deadlines. 5. Develop new software or modify/enhance existing software within expected specification, time, quality, and completion metrics. 6. Define software concepts and architectures based on requirements analysis. 7. Develop and run effective software verification tests to ensure product stability and performance. 8. Identify, document, prioritize, and resolve software issues on a software unit & system level 9. Lead the process to identify and mitigate technical project risks. 10. Comply with project plans and industry standards 11. Lead the process of detailed technical planning 12. Acts as atechnical leader for the software development team 13. In general, performs project-level tasks independently. 14. Mentor junior or mid-level software developers 15. Initiates and supports software process & quality improvement activities. 16. Proactively take initiative and demonstrate prominent level of accountability 17. Work with cross-functional teams to complete projects in time 18. Follow department processes and procedures 19. Comply with company security and safety policies 20. May perform other duties and responsibilities as assigned TECHNICAL KNOWLEDGE & SKILLS Proficient in most of the following: Strong working knowledge of AMI or Insyde UEFI BIOS code structure, ability to build, compile, and modify the BIOS source Good knowledge of x86 BIOS & OS interaction with Windows or Linux etc. Good knowledge of ACPI, SMI, SCI, APM, AMD Power Now, ASF, Debuggers, AFI, Boot block, SMART, Hyper Transport, Intel LFBP, Intel Speed-step, MPS tables, Net-boot, PCI Express config & routing, PXE, S1-S4 sleep, Serial Flash, SMBUS & SMBIOS, USB2.0, User ROM, WFM etc. Working knowledge of BMC includes IPMI 1.5 & 2.0, event logs, SDR, SEL, FRU records, serial over LAN, IPMB, Side-band LAN, KCS, etc. Working knowledge of the following OS, Windows Adv Server, XP, SUSE 32 and 64, Red hat, etc. Working knowledge of Windows & Linux configuration, installation procedure, network configuration, driver configuration, etc. Hands-on design knowledge of thelatest peripheral chipsets for Gigabit Ethernet, Ultra-SCSI 320, USB2.0, 1394, Ethernet, IDE, SATA & PCI cards (modem, SCSI, TV, etc.) AGP cards, etc. High-performance RISC X86 CPUs and architecture Inc. Intel P4, Xeon, Opteron & Athlon64 Working with external partners and experts on Jabil internally to create solutions for Jabil server products, root cause analysis, and deliver proper solutions. Creating/Reviewing BIOS functional requirements and feature design documentation Can lead team and feature development. Good knowledge of theproduct progress phase, andfirmware release process. Extra SKILLS is plus. - Comprehensive knowledge of Agile practices or scrum. - Good understanding of product development and manufacturing processes including test validation. - Basic technical background to recognize, assess and communicate cross-functional issues and risks. LANGUAGE SKILLS Ability to read, analyze, and interpret general business periodicals, professional journals, technical procedures, or governmental regulations. Ability to write reports, business correspondence, and procedure manuals. Ability to effectively present information and respond to questions from groups of managers, clients, customers, and the general public in English. Must be capable of scoring greater than 7 on the IELTS scale (or equivalent result in other assessment tools) for English language skills. COMMUNICATION SKILLS - Influence others and share best practices. - Effectively communicate with good understanding of English - Understand and meet customer needs and expectations. - Work as part of a global team. - Could smoothly to co-work with cross function team - Ability to define problems, collect data, establish facts, and draw valid conclusions. EDUCATION AND EXPERIENCE REQIREMENTS Bachelor's degree in BIOS Engineering from an accredited college or university. Masters degree is preferred. Greater Than 8 years experience in an engineering role engaged in the Design, Validation, and Manufacturing of products. Or an equivalent combination of education, training, or experience covering the above. BIOS feature development experience is a plus. Automation test script development experience is a plus. Has experience as ateam lead or feature development is a plus. Ability to travel globally 20%

As FPGA Architect, you will play a pivotal role in leading the design and development efforts across a range of projects in a dynamic and collaborative environment. Your primary responsibility will involve defining and creating complex FPGA designs for our Test products. Working closely with a diverse team including R&D Project Managers, Product Architects, Solution Teams, FPGA developers, Software Qualification, and Software Engineers, you will contribute to the innovation of new product offerings and enhancements to existing products. A vital aspect of this role will be your ability to work effectively with design teams based in the US and Europe, showcasing your strong teamwork skills and collaborative mindset. To excel in this role, you should possess the following qualifications: - A Bachelor's or Master's degree in Electrical/Electronic Engineering - Minimum of 10 years of experience in FPGA development with expertise in Altera and Xilinx technologies - Proficiency in RTL languages such as VHDL or Verilog - Familiarity with Xilinx FPGA Tools Design Flow including Vivado, Chipscope, and Quartus - Experience in using EDA Functional Simulation tools like Synopsys, Mentor, or Cadence - Proven ability to adapt quickly to new technologies, protocols, and product segments - Hands-on experience in developing self-checking Simulation environments, test benches, automation scripts, and test case creation - Collaborative work with system architects to define system architecture and FPGA integration with other components on PCA boards - Strong background in timing closure for intricate designs - Exceptional written communication skills for creating various technical documents such as Product Definitions, Detailed FPGA Designs, and Hardware & Software Interface documents - Self-motivated, well-organized, and proactive individual - Excellent team player with a high level of responsiveness and accountability - Strong verbal communication skills Preferred qualifications include: - Familiarity with Keysight instruments like Oscilloscope, Analyzer, AWG & BERT - Experience working with protocols such as PCI Express, USB, MIPI, Ethernet, and DDR - Exposure to international and multi-vendor collaboration environments - Full-time job type with flexible schedule This role offers the opportunity to work in person at the specified location, providing a conducive environment for professional growth and innovation.,

3. Lead Design Verification Engineer : 7+ years of hands-on DV experience in SystemVerilog/UVM. Must be able to own and drive the verification of a block / subsystem or a SOC. Should have a track record of leading a team of engineers. Extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM. Experience in Tesplan and Testbench development, Execution of test plan using high quality constrained random UVM tests to hit coverage goals on time. Should be good with debugging and exposed to all aspects of verification flow including Gatesims Must have extensive experience in verification of one or more of the following: PCI Express or UCIe, CXL or NVMe AXI, ACE or CHI Ethernet, RoCE or RDMA DDR or LPDDR or HBM ARM or RISC-V CPU based subsystem or SOC level verification using C/Assembly languages Power Aware Simulations using UPF Experience in using one or more of EDA tools such as VCS, Verdi, Cadence Xcelium, Simvision, Jasper. Experience in using one or more of revision control systems such asGit, Perforce, Clearcase. Experience in SVA and formal verification is desirable (not a must) Script development using Python, Perl or TCL is desirable (not a must) Location - Bangalore, Hyderabad, Kochi, Pune, Ahmedabad, Pune Experience - 7+ YoE Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from design, selection of materials, low level system software development and verification. Needs by displaying complete understanding of product vision and business requirements Develop architectural designs for the new and existing products Part Implementation of derived solution Debug and Solve critical problems during implementation Evangelize Architecture to the Project and Customer teams to achieve the final solution. Constant analysis and monitoring of the product solution Continuously improve and simplify the design, optimize cost and performance Understand market- driven business needs and objectives; technology trends and requirements to define architecture requirements and strategy Create a product-wide architectural design that ensures systems are scalable, reliable, and compatible with different deployment options Develop theme-based Proof of Concepts (POCs) in order to demonstrate the feasibility of the product idea and realise it as a viable one Analyse, propose and implement the core technology strategy for product development Conduct impact analyses of changes and new requirements on the product development effort Provide solutioning of RFPs received from clients and ensure overall product design assurance as per business needs Collaborate with sales, development, consulting teams to reconcile solutions to architecture Analyse technology environment, enterprise specifics, client requirements to set a product solution design framework/ architecture Provide technical leadership to the design, development and implementation of custom solutions through thoughtful use of modern technology Define and understand current state product features and identify improvements, options & tradeoffs to define target state solutions Clearly articulate, document and sell architectural targets, recommendations and reusable patterns and accordingly propose investment roadmaps Validate the solution/ prototype from technology, cost structure and customer differentiation point of view Identify problem areas and perform root cause analysis of architectural design and solutions and provide relevant solutions to the problem Tracks industry and application trends and relates these to planning current and future IT needs Provides technical and strategic input during the product deployment and deployment Support Delivery team during the product deployment process and resolve complex issues Collaborate with delivery team to develop a product validation and performance testing plan as per the business requirements and specifications. Identifies implementation risks and potential impacts. Maintain product roadmap and provide timely inputs for product upgrades as per the market needs Competency Building and Branding Ensure completion of necessary trainings and certifications Develop Proof of Concepts (POCs), case studies, demos etc. for new growth areas based on market and customer research Develop and present a point of view of Wipro on product design and architect by writing white papers, blogs etc. Attain market referencsability and recognition through highest analyst rankings, client testimonials and partner credits Be the voice of Wipros Thought Leadership by speaking in forums (internal and external) Mentor developers, designers and Junior architects for their further career development and enhancement Contribute to the architecture practice by conducting selection interviews etc Deliver No.Performance ParameterMeasure1.Product design, engineering and implementationCSAT, quality of design/ architecture, FTR, delivery as per cost, quality and timeline, POC review and standards2.Capability development% trainings and certifications completed, mentor technical teams, Thought leadership content developed (white papers, Wipro PoVs) Applications from people with disabilities are explicitly welcome.

Long Description 1. ASIC RTL Engineer : RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One scripting languages like Make flow, Perl ,shell, python - Any One LocationBangalore / Hyderabad / Kochi Experience - 7+ - Lead/Architect 2. Emulation Lead JD - Emulation Lead (Zebu/ HAPS /Veloce/Palladium and Module Build (End to End) Location - Bangalore / Hyderabad Experience - 7+ - Lead/Architect 3. Lead Design Verification Engineer : 7+ years of hands-on DV experience in SystemVerilog/UVM. Must be able to own and drive the verification of a block / subsystem or a SOC. Should have a track record of leading a team of engineers. Extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM. Experience in Tesplan and Testbench development, Execution of test plan using high quality constrained random UVM tests to hit coverage goals on time. Should be good with debugging and exposed to all aspects of verification flow including Gatesims Must have extensive experience in verification of one or more of the following: PCI Express or UCIe, CXL or NVMe AXI, ACE or CHI Ethernet, RoCE or RDMA DDR or LPDDR or HBM ARM or RISC-V CPU based subsystem or SOC level verification using C/Assembly languages Power Aware Simulations using UPF Experience in using one or more of EDA tools such as VCS, Verdi, Cadence Xcelium, Simvision, Jasper. Experience in using one or more of revision control systems such asGit, Perforce, Clearcase. Experience in SVA and formal verification is desirable (not a must) Script development using Python, Perl or TCL is desirable (not a must) Location - Bangalore, Hyderabad, Kochi, Pune, Ahmedabad, Pune Experience - 7+ YoE Long Description 4. Analog Circuit Design : Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs, Oscillators, General Purpose IOs, Temperature sensor, SERDES, PHYs, Die to Die interconnect, High-speed IOs, etc. Experience - 7+ Yrs + Lead/Architect Location - Bangalore 5. DFT - ATPG, MBIST Location - Bangalore, Kochi, Pune, Hyderabad Experience - 7 years + DFT Lead Mandatory Skills: VLSI HVL Verification. Experience5-8 Years.

Role : Design Verification Engineer Location: Hitech city ,Hyderabad Qualification: Bachelor's Degree Experience : 2-6 years of professional experience. Work Mode : Work from office, 5 days a week. Job Description Strong Familiarity with System Verilog and OVM/UVM Verification Methodology. Knowledge of system-level architecture including buses like AXI/AHB/APB/ACE5 Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi, Model Sim . Proficiency in developing the TB environment Good Knowledge on writing coverage and assertions Good knowledge in scripting(Perl/Tcl/Python) and automation of verification flows/process Knowledge on the PCIE is required. Knowledge of mipi, video Ips like ISP/Encoder/Decoder would be useful. Functional Skills Ability to work with cross-functional teams

Long Description 1. ASIC RTL Engineer : RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One scripting languages like Make flow, Perl ,shell, python - Any One LocationBangalore / Hyderabad / Kochi Experience - 7+ - Lead/Architect 2. Emulation Lead JD - Emulation Lead (Zebu/ HAPS /Veloce/Palladium and Module Build (End to End) Location - Bangalore / Hyderabad Experience - 7+ - Lead/Architect 3. Lead Design Verification Engineer : 7+ years of hands-on DV experience in SystemVerilog/UVM. Must be able to own and drive the verification of a block / subsystem or a SOC. Should have a track record of leading a team of engineers. Extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM. Experience in Tesplan and Testbench development, Execution of test plan using high quality constrained random UVM tests to hit coverage goals on time. Should be good with debugging and exposed to all aspects of verification flow including Gatesims Must have extensive experience in verification of one or more of the following: PCI Express or UCIe, CXL or NVMe AXI, ACE or CHI Ethernet, RoCE or RDMA DDR or LPDDR or HBM ARM or RISC-V CPU based subsystem or SOC level verification using C/Assembly languages Power Aware Simulations using UPF Experience in using one or more of EDA tools such as VCS, Verdi, Cadence Xcelium, Simvision, Jasper. Experience in using one or more of revision control systems such asGit, Perforce, Clearcase. Experience in SVA and formal verification is desirable (not a must) Script development using Python, Perl or TCL is desirable (not a must) Location - Bangalore, Hyderabad, Kochi, Pune, Ahmedabad, Pune Experience - 7+ YoE Long Description 4. Analog Circuit Design : Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs, Oscillators, General Purpose IOs, Temperature sensor, SERDES, PHYs, Die to Die interconnect, High-speed IOs, etc. Experience - 7+ Yrs + Lead/Architect Location - Bangalore 5. DFT - ATPG, MBIST Location - Bangalore, Kochi, Pune, Hyderabad Experience - 7 years + DFT Lead Mandatory Skills: VLSI HVL Verification. Experience5-8 Years.

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Required technical and professional expertise 5 + years of experience in Functional Verification of Processors or ASICs. Minimum 3+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Multi-processor cache coherency, Memory subsystem, IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Preferred technical and professional experience Verify the different functions/components in a PCI Express Controller & high speed SERDES (PHY). Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug Formal verification experience