52 Cxl Jobs

Expertise in ASIC RTL Design Expertise in ASIC IP Design Expertise in CDC and Lint tools Expertise in design and simulation tools Expertise in Video processing algorithms / interfaces Expertise in CXL / PCIe Protocol, 5G, Datacenter

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SOC Architect - PCIe/CXL/UAL/DMA THE ROLE: AMD-Xilinx is looking for a SMTS SoC Architect to join the team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications, including Embedded Computing, AI/ML, Data Center, Communications, Automotive, and Aerospace, in close collaboration with customers, partners, product planning, SoC and IP architects, and design & verification teams. THE PERSON: As a SMTS SoC Architect you will help drive new architecture initiatives that leverage the state-of-the-art PCIe, CXL, and Confidential Compute technologies and standards. You will exercise your deep technical expertise and excellent communication skills to collaborate with design and product planning with an eye towards delivering innovative and highly competitive adaptive accelerators and embedded computing solutions. KEY RESPONSIBILITIES: Responsible for driving the SoC architecture, with a particular focus on I/O subsystems connected over PCIe, UAL or CXL. Define I/O subsystem and PCIe DMA architectures, including their interactions with internal embedded processor-subsystems, Network on Chip, Memory controllers, and FPGA fabric. Create flexible and modular I/O subsystem architectures that can be deployed in either chiplet, monolithic or 3D form factors. Work with customers, and cross-functional teams to scope SoC requirements, analyze PPA tradeoffs, and then define architectural requirements that meet the PPA and schedule targets. Define I/O subsystem and DMA hardware, software, and firmware interactions with embedded processing subsystems and external CPUs. Author architecture specifications in clear and concise language. Guide and assist pre-silicon design/verification and post-silicon validation during the execution phase. PREFERRED EXPERIENCE: Strong technical background architecting SoC and I/O subsystems involving PCIe, PCIe-DMA engines, or CXL. Deep technical knowledge of the PCIe or CXL protocol specifications, and how mandatory and optional protocol features are leveraged in PCIe or CXL devices. Domain expertise in embedded computing, aerospace & defense, data-center, networking, or automotive industries. Knowledge of I/O Subsystem and DMA interactions with internal embedded processor-subsystems (x86, RISC-V or ARM) and external host CPUs. Knowledge of bridging and ordering rule enforcement between on-chip protocols such as AXI, and off-chip protocols such as PCIe desired. Knowledge of ARM Processors and AXI Interconnects desired. Knowledge of FPGA and AI/ML Accelerators desired. Knowledge of boot, security, debug, telemetry and RAS desired. ACADEMIC CREDENTIALS: BS/MS/PhD in electrical or computer engineering or related field. LOCATION: Hyderabad, India #LI-MK1 Benefits offered are described: . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence's employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence - One Team culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day. JOB Responsilibilities: BE/BTECH/ME/MTECH The responsibility primarily entails leading pre and post Silicon Subsystem Prototyping, Validation and Hardware Design for Cadence High Speed SERDES Test chips. What we do : . Pre Silicon emulation and Verification of System in NCSIM/Palladium/other Simulators. . Hardware and Subsystem Board Design for all the Projects. (HW/SW infrastructure designed within team) . Prototyping and Firmware Development for our High Speed Serdes like PCIe, CXL , UCIe, USB ,ethernet. . Lead the Bring up, Debug, Compliance efforts and System level Characterization all the way to report release. . Engage in interop and Customer Debug. What you'll gain : . Chance to work on cutting edge SERDES IP's from Cadence. Refer to Cadence Website for more details on our SERDES IP's. . Tremendous learning curve on SERDES PHY, Controllers, Protocol and System integration. . Hardware and Subsystem design expertise. . Experience in deploying and debugging your Solutions in different customer environments. What we are looking for : Minimum Qualifications: . 10-15 years (with Btech) or 10 years (with Mtech) experience in Post-Silicon PHY, Systems Interop and Compliance testing. . 2-3 years of management experience leading/mentoring a small team of engineers . Physical Layer and Protocol layer experience on AT LEAST ONE High speed SERDES on PCIe/CXL/UCIe/Ethernet. . Debug skills and Experience in using lab equipment such as Oscilloscopes, Bit Error Rate Testers, Protocol Exercisers, Analyzers. Preferred Qualifications: . Experience leading System testing efforts for SERDES solutions. . Experience in PCIe/UCIe LTSSM states is a plus. . 1-2 years of experience in FPGA Design and Schematic design. . 1-2 years of IP/SoC Physical Layer Electrical Validation experience is a plus. . Familiarity with Verilog RTL coding for FPGA, python,C/C++ . Good communication skills Seasoned Systems Validation engineer who can lead SERDES projects (PCIe/CXL/UCIe) and mentor Juniors We're doing work that matters. Help us solve what others can't.

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Required education Bachelor's Degree Required technical and professional expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails

As a Portable Stimulus (PSS) Verification Lead at Vayavya Labs, you will play a crucial role in understanding customer requirements on system-level verification scenarios and developing test scenarios in PSS language and C or SystemVerilog/UVM. Your responsibilities will include executing test scenarios in pre-silicon and post-silicon environments, as well as debugging the test scenarios. Key Responsibilities: - Understand customer requirements on system-level verification scenarios - Develop test scenarios in PSS language and in C or SystemVerilog/UVM - Execute test scenarios in pre-silicon (simulation, emulation) and post-silicon environments - Debug test scenarios Qualifications Required: - Hands-on experience in C programming for embedded systems - Expertise in pre-silicon validation of system-level scenarios - Experience with verification of controllers for protocols like PCIe, Ethernet, MIPI CSI/DSI - Familiarity with verification on emulator environments Vayavya Labs has been actively contributing to the development and adoption of the PSS standard, making it a leader in the industry. By joining our team, you will have the opportunity to work on Portable Stimulus technologies and develop scenarios for various SoC sub-systems. Additionally, you will receive training on PSS as part of the ramp-up phase. You will also be involved in project planning, effort estimation, technical leadership, and mentoring other team members on PSS. It is essential to have strong analytical and problem-solving skills, excellent communication skills, and a self-managed approach to work. This position offers a great learning opportunity for engineers with experience in system-level verification scenarios and a keen interest in SoC verification technologies. Vayavya Labs is at the forefront of the industry, driving discussions and advancements in Portable Stimulus technologies. If you are eager to take on new challenges and work with cutting-edge verification methodologies, this role is perfect for you.,

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Central Engineering (CE) develops Marvell most advanced High-Speed SerDes (HSS) IPs covering multiple applications, Switch, Automotive, Storage, Optics, etc. Acting as the engine to the company, Central Engineering provides the source of power to every business unit in Marvell system. Central Engineering AMS(CE AMS) is responsible of developing Marvell SerDes IPs and supporting all Marvell business units for fast and smooth SoC production. What You Can Expect IP verification activities - should have participated in successful completion of projects across all phases from Specification to Silicon Develop and execute verification plans using random techniques and coverage analysis. Create and maintain testbenches and test cases. Perform functional and performance verification. Debug and resolve design and verification issues. Collaborate with design and architecture teams to ensure verification coverage. Mentor junior engineers and lead verification projects. What We're Looking For Strong digital logic understanding and fundamentals of digital design. Excellent skills in complex IP verification using SV/UVM with proficiency in debug techniques Experience with simulation tools (e.g., VCS) and knowledge of scripting languages (Python, Perl, TCL). Familiar with verification test planning and coverage driven verification closure, Verification strategies for directed and randomized testing and assertions Hands on verification experience on SERDES/DDR/Ethernet/PCIe/CXL protocols Strong knowledge / experience in building the verification environment from specification and should have spec to hardware bring-up experience. Experience in leading projects to determine methods and procedures on new assignments and coordinate activities of other team members to ensure successful project completion. Strong analytical and problem-solving and analytical skills . Ability to manage multiple tasks in a fast-paced environment . Excellent communication, interpersonal, and teamwork skills . Capable of interfacing effectively at all levels within and outside the organization . Proactive in participating in problem-solving and quality improvement initiatives. Bachelor's degree in Computer Science, Electrical Engineering or related fields and 8-12 years of related professional experience Master's degree in Electrical Engineering with 8-10 years experience Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

We are seeking experienced Senior/Lead ASIC Verification Engineers to join our Noida-VIP team. With 5 to 15 years of experience in Verification, you will be involved in utilizing industry-standard protocols and methodologies. Your proficiency in System Verilog and Verilog, along with a solid understanding of Object Oriented Programming, will be essential for this role. As a Senior/Lead ASIC Verification Engineer, you will have the opportunity to lead the development of reusable Verification environments for a minimum of 2 projects using VMM, OVM, or UVM methodologies. Your expertise in protocols such as UCIe, PCIe, CXL, Unipro, USB, MIPI, HDMI, Ethernet, DDR, LPDDR, and HBM memory protocol will be valuable. Your responsibilities will include contributing to the development of the VIP, reviewing and signing off on VIP development updates, and collaborating with Architects and methodology experts to address issues and enhance output from an architecture/methodology perspective. If you are a proactive and reliable professional with a passion for Verification, we encourage you to share your updated CV with us at taufiq@synopsys.com or refer individuals who would be interested in this opportunity. At Synopsys, we value and promote Inclusion and Diversity, and we welcome applicants from diverse backgrounds without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability.,

• Expertise in ASIC RTL Design • Expertise in ASIC IP Design • Expertise in CDC and Lint tools • Expertise in design and simulation tools • Expertise in Video processing algorithms / interfaces • Expertise in CXL / PCIe Protocol, 5G, Datacenter

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer, with a large portion of the recent work experience on RTL design and development. Exp- 8- 14 Yrs RTL Design using Verilog is a must. System Verilog experience and experience with UVM based environment usage / debugging is required. PCIe experience is a must. CXL/PXC experience desired. We're doing work that matters. Help us solve what others can't.

Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our we affectionately refer to it as the and it's won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you. Visit our page to see what exciting opportunities and company await! Job Description: Technical Staff Engineer-Applications (Software/Firmware) Support SAS/SATA Protocol and RAID controller embedded firmware, OS drivers, and management software Support PCIe, security, and encryption technologies Work closely with Tier 1 OEMs and their ODMs to define requirements, assisting in design wins, manage deliverables and support initial system bring-up to full production Work independently, and in a team environment Root cause & document customer issues in a timely manner independently or by leading a cross-functional team Develop and review customer level documentation including user guides, release notes, technical product training, and application notes Understand customer requirements and drive them through the project management process Provide training as needed to end customers and to MCHP FAEs. Travel within North America and internationally, as needed, to work at customer sites to debug firmware and software. Requirements/Qualifications: Bachelor's degree in Electrical Engineering or Computer Science with 12.5+ years of relevant industry experience. Extensive understanding of SAS/SATA, SCSI, PCIe, RAID, CXL, NVMe, and other storage related technologies Strong technical leadership and teamwork Strong verbal and written communication skills with customer facing experience and presentation skills Strong software/firmware development and debug skills Experience with debugging Linux/Windows Operating System drivers and applications Highly structured programming skills in C, C++, and TCL/TK or other scripting language Experience with bench top equipment such as protocol analyzers/exercisers, logic analyzers, and other storage or networking related test equipment Independent but also works effectively with cross-functional teams and across multiple geographical locations Must demonstrate initiative and be self-motivated Creative with attention to detail Ability to multi-task and still meet deadlines Provide customer and field engineer support as needed

You will join Cadence, a prominent player in the electronic design field, with a legacy of over 30 years in computational software expertise. The company's Intelligent System Design strategy is at the core of developing software, hardware, and IP to transform design ideas into tangible products. Cadence serves some of the world's most innovative enterprises, creating remarkable electronic solutions for diverse market applications like consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial, and healthcare sectors. As a Principal Software Engineer, you will be based in Noida and play a pivotal role in developing CXL and PCIe switches to enhance our offerings in these domains. Proficiency in C++ and HDL is essential, along with a solid understanding of the PCIe and/or CXL protocol. While not mandatory, familiarity with Java will be advantageous. To qualify for this position, you should hold a B. Tech / BE / M.Tech / ME degree with 6 to 10 years of relevant experience. Besides technical expertise, strong written, verbal, and presentation skills are crucial. You must be adept at cultivating productive relationships with customers and colleagues, exploring innovative solutions, collaborating effectively across different teams and locations, and striving for excellence with integrity. At Cadence, you will have the chance to engage with cutting-edge technology in an environment that nurtures creativity, innovation, and impactful contributions. The company's employee-centric policies prioritize the well-being and career growth of its workforce, fostering a culture of collaboration and continuous learning. You will collaborate with a diverse team of dedicated individuals committed to exceeding customer expectations and making a positive difference every day. Join us in our mission to tackle challenges that others cannot, and together, let's create a future that matters.,

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE POSITION: HW Product Application Engineer will work closely with customers to enable them in using AMD embedded CPUs by providing platform or HW related support. Those includes delivering necessary trainings, answering any inquires, creating collaterals, reviewing design files, and debugging issues, working with internal teams. THE PERSON: The candidate must be highly motivated, innovative, and be able to work in a fast-paced environment. The candidate must be able to quickly analyze different customer scenarios to come up with the best approach to tackle tough problems. The successful candidate will have strong analytical skills and debug methodology, strong communication skills, be self-motivated, and have a desire to help customers solve problems. KEY RESPONSIBILITIES: Directly work with customers to enable successful deployment of AMD Embedded CPUs platforms Provide customers technical training on AMD based platforms. Perform platform reviews (block-level, schematic, and layout review) of customer designs. Engage directly on key technical topics, issues, architecture discussions, and performance optimizations Own and drive closure to issues reported by customer on HW and platform domain which includes Attend regular customer calls and answer HW, platform and silicon related questions. Perform first level triage and debug for customer reported issue. Participate in joint debug at customer site as needed. Develop and present customer communications for silicon and platform issues. Co-develop technical collateral, such as application note, user guide, sample, and reference design materials Engage directly on key technical topics, issues, architecture discussions, and performance optimizations with customers and internal teams Collaborate seamlessly across domains including platform and silicon engineering, product management, and field application engineering PREFERRED EXPERIENCE: 9+ years / Proven track record of success working directly with customers to develop systems from concept to production. Strong knowledge in x86 processors, DDR5/6, CXL, PCIe, SATA, USB, multiprocessor systems, power management and system management. Experience in the following area is highly preferred. Hands-on lab works HW related issue debug on embedded platform motherboard design,schematics capture/review and layour review. High-speed IO board design and/or signal integrity validation. Experience in the following area is plus. Power delivery design. CPU performance turning Team player with passion and a keen sense of urgency and strong drive Team player with passion and a keen sense of urgency and strong drive ACADEMIC CREDENTIALS: ? Bachelors or Masters degree in electrical or electronics engineering #LI-SK4 Benefits offered are described: . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.

You will be joining 7Rays Semiconductors, a company that specializes in providing end-to-end VLSI design solutions to help clients achieve execution excellence. The team of experts at 7Rays Semiconductors focuses on architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using cutting-edge technologies and methodologies. Building effective partnerships with clients, the company delivers high-quality solutions tailored to meet specific needs, showcasing a commitment to excellence and innovation in semiconductor design. Located in Bangalore, KA, this opportunity requires a minimum of 5 years of experience in the Emulation domain. As an Emulation Engineer/Validation Engineer, your responsibilities will include building emulation models from RTL for IP/SS or SOC, bringing up emulation models, developing content, and collaborating with RTL designers and Verification engineers to resolve emulation build issues. You will also work closely with customers to address emulation challenges and partner with vendors to resolve emulation build issues. Ideal candidates should hold a B.Tech/M.Tech in Electronics/VLSI or equivalent and be familiar with SV/UVM methodology. Candidates should have hands-on experience with Emulators such as Palladium, Veloce, Zebu, etc., and demonstrate proficiency in porting ASIC RTL on the Emulators and generating Emulation builds. Additionally, expertise in domains/functions including AXI, APB, AHB, SPI, I2C, UART, PCIe, USB, Ethernet, CXL, Ucie, C2C, D2D, DDR4/5/6, LPDDR3/4/5/6, and NoC/Interconnect verification is required. Desired activities that candidates should be involved in are HW-SW co-verification, Boot, Reset, Clock verification, Low Power Verification, Regression management and debug, as well as the development of Scoreboard, Checkers, and tracker. Proficiency in scripting languages like PERL and PYTHON is also beneficial for this role.,

We are seeking a skilled High Speed Serdes PHY Application Engineer to become a part of our team. Your responsibilities will encompass the entire SOC design flow, including architecture, integration of high speed Interface IP (IIP), synthesis, design for test (DFT), low power design (UPF), CDC/RDC checks, static timing analysis (STA), silicon test plan development, silicon bring-up, and mass production silicon debug. In addition, you will: - Collaborate closely with customers to comprehend new requests or customization features from customers" PRD/MRD. - Deliver integration training to customers and review their major SoC milestones. - Provide feedback to Synopsys R&D for customization features or continuous IIP product enhancements. - Engage in IIP design reviews to synchronize development with future customer requirements. - Showcase creativity and innovation by developing tools to simplify daily tasks or enhance efficiency and by creating application notes for gate-level simulation, silicon debug, and physical implementation. Key qualifications for this role include: - A Bachelor's and/or Master's degree in Electrical and/or Electronic Engineering, Computer Engineering, or Computer Science. - Minimum of 10 years of experience in IP and/or ASIC Design/Verification/Applications. - Proficiency in RTL coding in Verilog, simulation, synthesis, static timing check, equivalence check, etc. - Domain expertise in PCI Express, CXL, and Ethernet protocols. - Results-driven with the ability to manage multiple tasks concurrently. - Strong verbal and written communication skills in English for customer interactions. - High level of self-motivation, personal responsibility, inference, reasoning, problem-solving skills, and attention to detail. Preferred experience includes: - Knowledge in synthesis, CDC, RDC, Lint, DFT, and STA. - Experience in ASIC/SoC tape-out from concept to full production. - Proficiency in scripting languages (Tcl, Perl, Python, Excel VBA, etc.). - Skills in silicon debug, FPGA/hardware troubleshooting, package and PCB design, and SI/PI knowledge would be advantageous.,

Wipro Limited is a leading technology services and consulting company dedicated to developing innovative solutions that cater to the most intricate digital transformation needs of clients. With a vast portfolio of capabilities in consulting, design, engineering, and operations, Wipro assists clients in achieving their most ambitious goals and establishing future-ready, sustainable businesses. The company, with over 230,000 employees and business partners operating in 65 countries, is committed to aiding customers, colleagues, and communities in thriving amidst a constantly changing world. For more information, visit www.wipro.com. As a Lead Design Verification Engineer with at least 7 years of hands-on DV experience in SystemVerilog/UVM, you will be responsible for owning and driving the verification of a block/subsystem or a SOC. An ideal candidate should have a proven track record of leading a team of engineers and possess extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM. Proficiency in Tesplan and Testbench development, execution of test plans using high-quality constrained random UVM tests to achieve coverage goals on time, and adeptness in debugging and exposure to all aspects of verification flow including Gatesims are essential. The candidate must have extensive experience in the verification of technologies such as PCI Express or UCIe, CXL or NVMe, AXI, ACE or CHI, Ethernet, RoCE or RDMA, DDR or LPDDR or HBM, ARM or RISC-V CPU based subsystem or SOC level verification using C/Assembly languages, and Power Aware Simulations using UPF. Experience in using EDA tools like VCS, Verdi, Cadence Xcelium, Simvision, Jasper, and revision control systems such as Git, Perforce, Clearcase is required. Experience in SVA and formal verification is desirable, and knowledge of script development using Python, Perl, or TCL is an added advantage. The position is available in various locations including Bangalore, Hyderabad, Kochi, Pune, Ahmedabad, and Pune. The ideal candidate must have a minimum of 7 years of YoE. Key Responsibilities: - Define product requirements and implement VLSI and hardware devices - Continuously upgrade and update design tools and frameworks - Analyze and select the right components and hardware elements for product engineering - Conduct cost-benefit analysis to choose the best design - Develop architectural designs for new and existing products - Implement derived solutions and troubleshoot critical problems - Evangelize architecture to project and customer teams to achieve the final solution - Monitor product solution and make continuous improvements - Understand market-driven business needs and technology trends to define architecture requirements and strategy - Develop Proof of Concepts (POCs) to demonstrate product feasibility - Provide solutioning for RFPs from clients and ensure overall product design assurance - Collaborate with sales, development, and consulting teams to reconcile solutions to architecture - Provide technical leadership in designing custom solutions using modern technology - Validate solutions from technology, cost structure, and customer differentiation perspectives - Identify and resolve problem areas in architectural design and solutions - Monitor industry and application trends and provide strategic input during product deployment - Support delivery team in product deployment and issue resolution - Develop product validation and performance testing plan in alignment with business requirements - Maintain product roadmap and provide inputs for product upgrades based on market needs - Build competencies and branding through necessary trainings, certifications, and Thought leadership content development - Mentor developers, designers, and junior architects for career enhancement - Contribute to the architecture practice by conducting selection interviews Performance Parameters: - Product design, engineering, and implementation: Measure based on CSAT, quality of design/architecture, FTR, delivery as per cost, quality, and timeline, POC review and standards - Capability development: Measure based on % of trainings and certifications completed, mentorship of technical teams, and development of Thought leadership content Wipro is dedicated to reinventing your world by building a modern, end-to-end digital transformation partner with ambitious goals. The company is looking for individuals who are inspired by reinvention and are committed to constant evolution in their careers and skills. Join Wipro to realize your ambitions and be part of a purpose-driven business that empowers you to design your own reinvention. Applications from people with disabilities are explicitly welcome.,

Lead Design Verification Engineer Bangalore We are looking for an experienced Lead Design Verification Engineer (412 yrs) to join our semiconductor team. Youll lead SoC/ASIC/IP verification using SystemVerilog, UVM, SVA, and drive test planning, coverage, regressions, and debug. ???? Must-have: Strong expertise in protocols (PCIe, DDR, USB, AMBA, MIPI, CXL), EDA tools (VCS, Xcelium, Questa), scripting (Python/Perl/Tcl), and low-power/CDC/formal verification. ???? Bonus: Experience with emulation/GLS, lint, DFT awareness, and leadership/mentoring. ???? Location: Bangalore, India ? Experience: 412 years ???? Apply now or share your profile at [HIDDEN TEXT] Show more Show less

We are looking for experienced Senior/Lead ASIC Verification Engineers for our Noida-VIP team. Does this sound like a good role for you Experience : 5yrs to 15 years (multiple roles) Location: Noida Associated with Verification especially using industry-standard protocols & methodology Languages: Hands-on experience with System Verilog & Verilog . Should have a good understanding of Object Oriented Programming. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies . Protocol experience: Should have experience on any of the UCIe/PCIe/CXL/Unipro/USB/MIPI/HDMI/Ethernet/DDR/LPDDR/HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective Please share your updated CV to [HIDDEN TEXT] or refer who would like to explore this opportunity. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability. Show more Show less

You are a team player with excellent problem-solving abilities, strong analytical skills, and a keen attention to detail Your background in verification IP development and your programming prowess in languages like Perl, Python, and Shell scripting set you apart as a valuable asset to our team, What Youll Be Doing: Responsible for functional verification involving coherent and non-coherent IP designs, Collaborating with market leaders in High Performance Computing, Data Centre, Mobile/Client, Automotive, and IoT segments to define and develop products that meet complex verification requirements, Architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs, Developing verification plans and driving functional coverage-driven verification closure of real designs, Debugging and resolving issues in verification environments to ensure robust and reliable verification processes, The Impact You Will Have: Enhancing the reliability and performance of high-performance computing and data center systems through rigorous verification processes, Contributing to the advancement of mobile and client devices by ensuring the integrity and functionality of their verification protocols, Driving innovation in the automotive sector by developing robust verification solutions for automotive systems, Supporting the growth of IoT applications by providing reliable and efficient verification for IoT devices, Collaborating with industry leaders to shape the future of system verification and contribute to technological advancements, Ensuring the successful implementation and integration of verification IPs, thereby enhancing the overall quality of our products, What Youll Need: E/B Hands-on experience in architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs, In-depth understanding of cache coherency protocols such as Protocol experience: Should have experience in any of the protocols, UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Experience in creating verification plans and achieving functional coverage-driven verification closure of real designs, Proficiency in writing scripts using Perl, Python, and Shell scripting, Who You Are: Excellent problem-solving, debugging, and analytical skills, Strong programming skills and familiarity with object-oriented programming concepts, Creative and innovative mindset, Excellent verbal and written communication skills, A collaborative team player with a passion for functional verification

At 7Rays Semiconductors, we specialize in providing comprehensive VLSI design solutions to assist our clients in achieving excellence in execution. Our team of experts is highly skilled in various areas including architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation. We utilize the latest technologies and methodologies to deliver top-notch solutions tailored to meet our clients" specific needs. As a Design Verification Engineer specialized in protocols such as PCIe, CXL, and UCIE, you will be responsible for: - Demonstrating expertise in interconnect protocols such as PCIe, CXL, and UCIE. - Having a solid understanding of AXI/ACE/CHI protocols, with a particular emphasis on AXI. - Knowledge of DMA usage and its applications. - Strong proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM). - Experience in utilizing standard Verification IP (VIP) in Testbenches, preferably Synopsys tools. - Familiarity with AI/ML network concepts is considered beneficial. - Additional proficiency in perl/tcl scripting would be advantageous. The ideal candidate for this role should possess a Bachelor's Degree in Electrical, Electronics, or Computer Engineering, along with 5-12 years of relevant experience. If you are passionate about semiconductor design, eager to work in a collaborative environment, and committed to delivering high-quality solutions, we would love to hear from you.,

Job Overview As a member of the Software Engineering Group, you will have the opportunity to build upon your existing background, knowledge and expertise and contribute to Open-Source projects, e.g., EDK II, Linux Kernel, Trusted Firmware and SCP firmware, providing reference implementations and optimizations to key software system components. This contribution helps drive the development of world-class System Software, for architected hardware and software platforms catering Server Segment, and that becomes reference designs for futuristic ARM based servers. We seek individuals with exposure and knowledge of every level of the System software stack ranging from BareMetal firmware, bootloaders, Kernel, and Distros. If you are similarly enthusiastic about innovative technologies, then we are keen to hear from you! Responsibilities Contribution to the design and development of Reference systems and Platform software for Arm application processors and MCUs. Supporting key partners, upstreaming and maintaining open-source software components Be part of an extended development team and you can expect to be working face to face with some of the greatest household names in our industry. Helping to develop, optimize and deliver the software needed to support Arm&aposs ground-breaking IP, as well as helping Arm grow its role in new embedded and enterprise market segments. Prepare test specification, test plans based on design documents of software and hardware modules. Develop unit test module/scripts for validating the software/hardware functionalities. Required Skills and Experience 8+ Years work experience + University degree (or equivalent), ideally in a numerate subject, although other graduates with appropriate experience would be considered. Good understanding of ARM-A or ARM-M architectures. Good understanding of Arm System IP such as SMMU, GIC, Openbmc, PLDM, IPMI, Redfish and DBUS. Experience in firmware or Linux kernel development, command over concepts such as, bootloaders, device drivers. Familiarity with industry standards such as ACPI and UEFI. Experience in developing complex software stack written preferably in C. Expertise in debugging and optimizing complex software systems. Familiarity with technologies such as RAS, hypervisors, CXL, power management and security. Knowledge of any SCM preferably Git Nice To Have Skills and Experience Experience with working with open-source community. We value understanding of open-source project development cycles and contribution processes. Familiarity with open-source projects such as TF-A and EDK II. Familiarity with open-source test tools. An awareness about the value of CI and automated test system. Experience with customer interactions, diagnose, and resolve reported issues. Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [HIDDEN TEXT] . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arms approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the teams needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and dont discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Show more Show less

The DCAI and Silicon Eng Team is responsible for delivering leadership Xeon products to cloud and datacenter customers by developing industry-leading x86 core and differentiated IPs. These IPs enhance product performance and competitiveness in both Xeon and AI platforms. The IP design group within DCAI focuses on designing Coherent Fabric IP, Memory controller, NOC, PCIE, and other fundamental building blocks for Xeon server SOCs. We are currently looking for an experienced Senior Micro Architect to design, develop, and implement advanced Digital IO Controllers such as PCIe/CXL/UCIe systems for next-generation data center and AI chips. This role requires a unique blend of architectural expertise and hands-on RTL coding skills to bring cutting-edge designs to life. The ideal candidate will possess a deep understanding of high-speed IOs like PCIe/CXL/UCIe architecture, interconnect protocols, and coherence mechanisms, along with a proven ability to implement these designs at the RTL level. Key Responsibilities: - Architect scalable memory coherency protocols and interconnect topologies to achieve high performance and low latency for data center and AI SoCs. - Design and implement critical components of the memory fabric microarchitecture, including coherency controllers and interconnect blocks. - Develop RTL code for core components of the memory fabric, ensuring optimal performance, area, and power trade-offs. - Collaborate closely with verification teams to create test plans and debug issues during pre-silicon validation. - Work with cross-functional teams (physical design, software, and firmware) to ensure seamless integration of memory fabric systems. - Analyze system performance, conduct workload modeling, and optimize the architecture for target use cases. - Mentor junior engineers, contribute to technical reviews, and design documentation. - Stay updated with emerging technologies and trends in PCIe/CXL/UCIe protocols, as well as AI/ML hardware. - Demonstrate strong problem-solving and debugging skills. - Exhibit excellent communication and collaboration abilities. - Ability to manage and prioritize multiple tasks effectively. Qualifications: - Bachelor's degree with 15+ years of experience or Master's degree in Electronics and Computer Engineering with relevant experience of at least 10+ years. This is an Experienced Hire job type located in India, Bangalore, within the Design Engineering Group (DEG) at Intel. DEG is committed to developing best-in-class SOCs, Cores, and IPs that power Intel's products. The team focuses on delivering leadership products through the pursuit of Moore's Law and groundbreaking innovations. This role is eligible for a hybrid work model allowing employees to split their time between working on-site at the assigned Intel site and off-site. Please note that job posting details, such as work model, location, or time type, are subject to change.,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced and visionary ASIC Verification Engineer, Architect who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in verification methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of serial protocols such as PCIe/CXL, UCIe etc. You can define and execute Testbench architecture for protocols such as PCIe/CXL. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects. What Youll Be Doing: Defining and developing ASIC RTL verification at both chip and block levels. Creating and executing verification plans for complex digital designs, particularly focusing on PCIe/CXL protocols. Collaborating with cross-functional teams to ensure seamless integration and functionality of designs. Utilizing advanced verification methodologies and tools to achieve high-quality results. Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement. Communicating with internal and external stakeholders to align on project goals and deliverables. The Impact You Will Have: Enhancing the reliability and performance of Synopsys digital verification processes. Improving time-to-market for robust Synopsys Interface IP controller through efficient verification methodologies. Mentoring and nurturing a highly skilled verification team, elevating overall project quality. Influencing strategic decisions that shape the future of Synopsys capabilities. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements. What Youll Need: Extensive experience in ASIC RTL verification. In-depth knowledge of PCIe, CXL , UCIe and similar IO protocols. Proficiency in advanced digital design verification tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 15+ years in relevant domain. Who You Are: A mentor who fosters talent and encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Show more Show less

You will be joining Eximietas as a Senior Design Verification Engineer/Lead in Bengaluru with 5-15 years of experience. Your primary responsibility will be to lead the SoC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. This includes developing and implementing comprehensive verification strategies for high-speed and low-speed peripherals such as I2C, SPI, UART, GPIO, QSPI, as well as high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR, HBM. You will be conducting Gate-level simulations and power-aware verification using tools like Xprop and UPF. Collaboration with cross-functional teams, including architects, designers, and pre/post-silicon verification teams, will be crucial to ensure alignment and seamless integration of verification efforts. Your role will involve analyzing and implementing System Verilog assertions and functional coverage to ensure thorough verification of design functionality. Mentorship and technical guidance to junior verification engineers will be part of your responsibilities to elevate team performance. Leading and managing a dynamic team of verification engineers, fostering a collaborative and innovative work environment will be essential. You will also ensure that all verification signoff criteria are met, with clear and comprehensive documentation. Your dedication, work ethic, and commitment to meeting project goals and deadlines will be vital. Upholding quality standards and implementing best test practices to contribute to continuous improvements in verification methodologies will also be expected. You will work with verification tools from Synopsys and Cadence, including VCS and Xsim, and integrate third-party VIPs (Verification IP) to enhance verification coverage. To qualify for this role, you should have 5+ years of hands-on experience in SoC Design Verification and expertise in verification of high-speed SoCs and various protocols. Proficiency in System Verilog for verification, gate-level simulations, and power-aware verification using Xprop and UPF are necessary. Strong hands-on experience with VCS and Xsim from Synopsys and Cadence, mentorship experience, and demonstrated ability to work with cross-functional teams are also required. A strong understanding of verification methodologies and the ability to contribute to their continuous improvement are essential.,

As a HW Product Application Engineer at AMD, you will play a crucial role in enabling customers to utilize AMD embedded CPUs effectively. Your responsibilities will include providing technical support, delivering trainings, reviewing design files, debugging issues, and collaborating with internal teams to ensure successful deployment of AMD technology. You will need to analyze customer scenarios, communicate effectively, and possess strong analytical skills to address tough problems. Key Responsibilities: - Work closely with customers to facilitate the deployment of AMD Embedded CPUs platforms - Conduct technical trainings for customers on AMD-based platforms - Review customer designs at block-level, schematic, and layout levels - Engage in technical discussions, address issues, and optimize performance - Lead in issue resolution on HW and platform aspects reported by customers - Participate in customer calls, triage, and debug customer-reported issues - Develop customer communications and technical collateral materials - Collaborate across teams including platform and silicon engineering, product management, and field application engineering Preferred Experience: - 9+ years of experience in working with customers from system concept to production - Strong knowledge in x86 processors, DDR5/6, CXL, PCIe, SATA, USB, multiprocessor systems, power management, and system management - Hands-on experience in lab works, HW issue debugging, motherboard design, and high-speed IO board design - Additional experience in power delivery design and CPU performance tuning is a plus - Demonstrated teamwork, passion, urgency, and drive ACADEMIC CREDENTIALS: - Bachelors or Masters degree in electrical or electronics engineering Join us at AMD and be part of a culture that values innovation, excellence, collaboration, and diversity. Together, we advance technology to transform lives and empower the world.,

As an Embedded Software Developer, you will be responsible for developing high and low-level design, drivers, and firmware for different hardware blocks. Your role will involve adopting operating systems and embedded software for various processor architectures, and developing software based on pre-silicon development vehicles. You will be tasked with software bring-up using pre-silicon vehicles and silicon-based platforms, as well as upstreaming open-source code. Additionally, you will develop software component-level tests and enable them in the CI/CD system. Debugging issues using standard HW/SW-based debuggers and diagnostic equipment like Trace 32, JTAG, and Lacroy-PCIe Analyzer will also be part of your responsibilities. To excel in this role, you should possess excellent knowledge of Linux internals and different drivers. A strong understanding of different standards protocols such as NVMe, NVMeOF, iSCSI, RAID, PCIe, RDMA-NIC, Ethernet, and CXL is essential. Familiarity with hardware architectures related to the mentioned standards is advantageous. You should have a deep understanding of the Software Development Life Cycle (SDLC) and possess expert-level development and debug capabilities in Firmware BSP and device drivers. Problem-solving skills in system boot, UEFI, and OS functionality are crucial. Your technical proficiency should extend to coding standards and integrating with existing solutions using languages like C, C++, and Python. Strong low-level debugging skills are necessary to identify issues at the firmware, hardware, and OS internals level. A good understanding of CPU architectures, particularly IA, ARM, and RISC V, is preferred. Knowledge of the Pre Silicon Development environment will be an added advantage. Ideally, you should hold a BTech/MTech degree in Computers, Electronics, or Electrical Engineering. A minimum of 5 to 8 years of experience in embedded software development across various architectures is required to succeed in this role.,