442 Signal Integrity Jobs

Good understanding of signal integrity and power integrity principles Signal integrity extraction/3D models generation experience Cadence, HFSS and Siemens Advanced Solvers Expertise in circuit simulation with different tools such as Hspice, ADS, Cadence TopXp System level SI simulation using simulation tools Tools Used : Cadence PowerSI/ Agilent ADS/ Siemens Advanced Solver/Allegro SIP/Ansys SI wave, HFSS Expertise in circuit simulation with different tools such as Hspice and ADS. Experience Requirements 5-7 years of experience in SI/PI area Experience in board/package design SI/PI analysis Proven ability to use modern tools for S-parameter extraction of board/package Additional skills Programming language perl, tcl Ability to work in multi team environment

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning (for hierarchical designs) , placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks and be able to fix the violations . S hould have worked on 4 5nm , 28nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design eng inee rs. Interface with front-end ASIC teams to resolve issues. Excellent communication skills. Strong Back ground of ASIC Physical Design: Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure. Extensive experience and detailed knowledge in Cadence or Synopsys or Magma physical Design Tools. Expertise in scripting languages such as PERL, TCL. Strong Physical Verification skill set. Static Timing Analysis in Primetime or Primetime-SI. Good written and oral communication skills. Ability to clearly document plans. Ability to interface with different teams and prioritize work based on project needs.

Role Description: This is a full-time on-site role for a Senior Lead Physical Design Engineer based in Hyderabad. The Senior Physical Design Engineer will be responsible for tasks related to physical design, physical verification, logic design, circuit design, and RTL design in the development of silicon products. Qualifications: He/She should be able to do block level PNR including PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. Minimum of 7-15 years of experience in physical design. He/She should have worked on 7nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design engineers. Lead a team of Physical design engineers and be responsible for their blocks closure Interface with front-end ASIC teams to resolve issues. Low Power Design - Voltage Islands, Power Gating, Substrate-bias techniques. Expertise in Timing closure on high speed interfaces is a plus Excellent communication skills. Strong Back ground of ASIC Physical Design: Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure. Extensive experience and detailed knowledge in Cadence or Synopsys. Expertise in scripting languages such as PERL, TCL. Strong Physical Verification skill set. Static Timing Analysis in Primetime or Primetime-SI. Good written and oral communication skills. Ability to clearly document plans. Ability to interface with different teams and prioritize work based on project needs.

1. Candidate shall have experience in handling multiple end to end product project around RF design, analysis, testing, calibration, regulatory compliances and release of products for commercial deployments 2. Relevant experience of 3+ years in RF Design. Responsibilities 1. Lead the design, simulation, and verification of complex analog and mixed-signal circuits, Signal integrity, power integrity, impedance Analysis. 2. Perform advanced simulations and analyses to ensure exceptional circuit performance and compliance with specifications. 3. Create comprehensive documentation of design methodologies, specifications, and outcomes. 4. Multi radio front end and radio optimisation. 5. Extensive knowledge on RF matching, filter design and antenna matching. 6. Conversant with lab equipment like Spectrum Analyzer, Network analyser, RF Signal generators , IQXEL, MT8852 etc. 7. Experience on EMI/EMC, Antenna design, Signal Integrity and Thermal Analysis will be a key skill. 8. Design and develop Regulatory certified BLE, ZigBee, Wi-Fi modules. 9. Work closely with cross functional teams to derive the design specification for Modules. 10. Prototype Board bring-up, Validation and Characterization. 11. Handover design to manufacturing and help to derive the production test plan. 12. Documentation of design, test plan and test results. 13. Supporting Customer support team in debugging critical customer issues. 14. Radio side design and debugging. 15. RF performance evaluation, calibration and optimisation. 16. Link budget and harmonics analysis. 17. Tuning and optimisation of RF front end. 18. Deep understanding on radio chip, physical layer customisations and its impacts on the radio performance. 19. Understanding of various physical layer standards. 20. Willingness to contribute in global standards committee of next generation wireless systems. 21. Ownership of product level EMI/EMC compliances for global requirements as well. 22. Schematic, Layout and BOM selection. Mandatory Key Skills rf design,emi emc,emc,emi,thermal analysis,signal integrity,antenna design,generators,manufacturing,production,data validation,simulation,bom,equipment,prototype,c++,embedded systems,rf*,radio*,filter design*,antenna*,physical layer*

Role Overview: As a skilled and experienced Senior Electrical & RF Engineer at Plan A Technologies, you will be responsible for the design, development, integration, and maintenance of electrical and RF systems used in RFID-enabled casino table products. Your role is crucial in developing reliable, high-performance electronic systems by applying advanced engineering principles and ensuring compliance with safety and regulatory standards. You will lead complex projects, mentor junior engineers, and collaborate with cross-functional teams to ensure optimal performance, scalability, and manufacturability of hardware components. Key Responsibilities: - Lead, mentor, and develop a high-performing team. - Establish performance metrics and goals aligned with company objectives, and provide constructive performance evaluations. - Provide coaching and professional development to enhance team capabilities. - Foster a customer-centric culture, promoting continuous improvement and best practices. - Oversee the daily workflow, assign tasks, and monitor productivity and accuracy. - Recruit, interview, hire, and train new team members. - Design and develop electrical and RF circuitry for RFID casino table systems ensuring high performance, reliability, and compliance with regulatory standards. - Utilize computer-assisted engineering and design tools for schematics, PCB layouts, and simulations. - Conduct RF testing and validation to ensure signal integrity, EMC, and optimal antenna performance. - Direct the prototyping, manufacturing, installation, testing, and support of hardware systems and components. - Analyze design specifications, identify engineering problems, and develop practical solutions. - Oversee troubleshooting efforts related to electrical and RF systems during integration, testing, and field deployment. - Review completed installations and field systems to ensure conformance with design, safety standards, and quality expectations. - Create and maintain detailed engineering documentation including test reports, design notes, and compliance certifications. - Contribute to project budgets and timelines by estimating labor, materials, and equipment costs. - Stay updated on emerging technologies in RF engineering, electronics, and manufacturing processes. - Collaborate with mechanical, software, and manufacturing teams for successful product integration. Qualifications Required: - Bachelor's degree in electrical engineering, Electronics Engineering, or related field required; Masters degree preferred. - Minimum of 6 years of experience in electrical and/or RF engineering with hands-on design and validation experience. - Proven experience in complex engineering projects from concept to production. - Strong communication skills in English, both verbal and written. - Organized and analytical working style with the ability to plan your own work. - Initiative and drive to excel in your role. About The Company: Plan A Technologies is an American software development and technology advisory firm that provides top-tier engineering talent globally. The team focuses on custom product development projects, staff augmentation, major integrations and upgrades, among others. The work environment is supportive and collaborative, with opportunities for career growth and development. Location: Gurugram (India). On site. Benefits: - Generous vacation schedule. - Brand new laptop. - Supportive team environment with great colleagues. If you meet the qualifications and are looking for a challenging yet rewarding opportunity, we encourage you to apply and join our team at Plan A Technologies.,

Role Overview: You will be responsible for developing unique and complex bench characterization test methodologies for various Analog IPs like ADC, DAC, PLL, USB, VREG, OSC, DDR, LOW POWER, and IO PADs. This role will involve determining and verifying the functional and electrical performance of devices across different manufacturing processes, voltages, and temperature combinations. Key Responsibilities: - Strong understanding of electrical circuit analysis, design, and test fundamentals - Automation of Analog Characterization Setups using Labview and Test Stand - Strong debugging and problem-solving skills - Bring up of Silicon & Analog Validation Platforms like Analog Board for new ASIC/SoC design - Highly motivated to take up bench characterization challenges on stand-alone /automated bench setup - Knowledge of C is a must - Develop and write automated code to control all test equipment during the collection and processing of characterization data - Perform Design Evaluation and Bench Characterization for Analog IPs on devices in development - Provide requirements, review schematics, and PCB layout to develop circuit boards maintaining Signal Integrity Qualifications Required: - Bachelor of Engineering/Technology or Master of Engineering/Technology in Electronics/Telecommunication - Expertise in using test & measurement equipment for Analog Validation - Expertise in PVT characterization of Analog IPs such as ADC, DAC, PLL, USB, VREG, OSC, DDR, LOW POWER, and IO PADs - Good debugging exposure and root cause analysis for new analog designs - Knowledge of multilayer board design, testing, integration, and Signal Integrity issues - Understanding of differential signaling and transmission line theory - Experience with LabVIEW and Test Stand automation software - Experience in a lab environment Company Details: The company focuses on developing and testing Analog IPs for various industries including Automotive, Industrial, and Consumer Electronics. You will work in a dynamic environment that values strong leadership, planning skills, and timely delivery of results.,

Required skills: Job Description: Experience into STA and timing closure/signoff experience with PD domain skill-set/knowledge. Candidate should be able to understand the timing constraints, analyze design details, analyze timing reports from prepcts to postcts stages, in-depth concepts of 14nm technode STA analysis, DCD knowledge. Candidate is preferably expert in PT and Tempus tools. Education Requirements B. Tech / M. Tech (ECE) Shift General Work Week Monday to Friday Joining time Immediate to 90 Days

We aspire to be world-leader in innovative telecom and security solutions by offering cutting-edge, high-performance telecom and security solutions to business customers. Why work at Matrix Matrix fully integrates software and hardware across its products. Engineers here collaborate more effectively to create solutions that solve real problems and make an impact. We are responsible for every nut, bolt, and line of code in our products! As an engineer, your involvement will be critical in the entire lifecycle of a product - right from ideation-development-production-deployment. Get to feel the sense of accomplishment that comes with creating something that solves a real and pressing problem and is used by scores of customers. About The Role Role Hardware Design Engineer/ Sr. Engineer - (PCB/ CAD) Function Hardware Design - (PCB/ CAD) Work Location Vadodara, Gujarat Who are you You are an energetic and passionate PCB/CAD Design Engineer with a strong background in PCB layout design. You have experience working on high-speed and complex boards, and you excel at using CAD tools to create precise and efficient designs. Your expertise and enthusiasm drive you to tackle challenging projects and deliver high-quality results. Experience 2+ Years Qualification B.E/ B.tech/ M.E/ M.tech (EC, Electronics & Communication) OR MSc (EC/Electronics) Technical Skills Required : Good understanding of Datasheets, Library creation for Complex Logical and Footprints. IPC Standards for Footprint Creation and Layout process Exposure to all relevant IPC standards & MIL Standard design practices PCB Designing flow from Library creation to Gerber release to FAB. High speed Constraints setting and routing. Should have worked on High Speed signal routing . Hands-on experience in Designing High-speed, Multilayer PCB designs DFM checks,DFx (DFA, DFM & DFT) checks Should have hands-on expertise on standard High Speed Digital, Analog & Mixed signal Design ,I2C,SPI, USB2.0/3.0, Ethernet, PoE, BLE, Wi-fi, GSM, TFT LCD, DDR2/DDR3/DDR4, SD Card, NAND, MIPI ,Optical interface etc. DRC and Post-processing (Gerber Settings, FAB & Assembly files generation) Quality checks for Footprints, PCB Layout file,FAB & Assembly files Interaction with Design, Mechanical, SI, PI, Thermal, FAB, Assembly house for Clarification and Reviews Good communication skills and should be able to handle projects independently EDA Tools: Mentor Expedition. Valor Gerber tools for reviews How Your Day Might Look Like Check datasheets to update and create accurate PCB component libraries. Design and adjust PCB layouts following industry standards. Handle the entire PCB design process, from creating libraries to preparing files for manufacturing. Set up and test high-speed signals to ensure everything works properly. Work on complex, multilayer PCB designs, focusing on signal integrity and layout. Perform Design for Manufacturing (DFM) checks to make sure designs are ready for production. Check design rules and finalize files for fabrication and assembly. Review and verify designs with design, mechanical, signal integrity, power integrity, thermal, and assembly teams. Manage your projects, making sure everything stays on track from start to finish. What we offer Opportunity to work for an Indian Tech Company creating incredible products for the world, right from India Be part of a challenging, encouraging, and rewarding environment to do the best work of your life Competitive salary and other benefits Generous leave schedule of 21 days in addition to 9 public holidays, including holiday adjustments to convert weekends into long weekends 5-day workweek with 8 flexi-days months, allowing you to take care of responsibilities at home and work Company-paid Medical Insurance for the whole family (Employee+Spouse+Kids+Parents). Company paid Accident Insurance for the Employee On-premise meals, subsidized by the company If you are an Innovative Tech-savvy individual, Look no further. Click on Apply and we will reach out to you soon!

About The Role No of Position1 EMC/EMI Experience:- 2 to 6 Years Location:-Bengaluru. JD As anEMI /EMC Simulation Engineer, he/she will be part ofEMI /EMC Simulation Engineering team responsible for Magnetostatics applications (3D Model cleanup, meshing of Battery and related bus bars, run magnetic field analysis simulations, analyze results, recommend counter measures, and generate reports) ESSENTIAL FUNCTIONS Understanding 3D geometry Manipulating 3D geometry (cleaning up and meshing) Setting up analysis by applying appropriate boundary conditions (electric current in this case) and material properties (magnetic permeability, constant and varying) Check for consistency of results Analyze different what-if scenarios by executing different use cases and generating reports Recommendations to ensure engineering decisions Interacting with cross functional teams and clients About The Role - Grade Specific Focus on Mechanical and Physical Engineering. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

Job Requirements Job Title: Senior Engineer - Physical Design (PD) Job Type: Full-Time We are seeking a highly skilled and experienced Physical Design Lead in VLSI with a minimum of 3-7 years of experience to join our team. As the Lead Engineer in Physical Design, you will be responsible for overseeing the physical design process, ensuring the successful implementation of complex VLSI designs. esponsibilities: Lead the physical design (PD) team through complete ASIC/SoC implementation flow. Handle floorplanning, partitioning, placement, CTS (Clock Tree Synthesis), routing, and sign-off activities. Drive timing closure, power optimization, area optimization, and DRC/LVS clean designs. Collaborate with RTL, DFT, verification, and package teams to achieve project goals. Manage block-level and chip-level physical design, including hierarchical and flat methodologies. Perform static timing analysis (STA), power analysis, and signal integrity checks. Ensure physical verification, IR drop, and EM analysis closure. Guide junior engineers, review their work, and provide technical mentorship. Drive tool flow automation and efficiency improvements in PD. Interface with customers/stakeholders for updates, reviews, and sign-off. Required Skills: Strong hands-on expertise in physical design tools (Cadence Innovus / Synopsys ICC2 / Mentor). Solid understanding of ASIC design flow and foundry process nodes (7nm/5nm/14nm or relevant). Deep knowledge of STA, power analysis, IR/EM, and physical verification methodologies. Good experience in ECO (Engineering Change Order) flows. Familiarity with scripting languages (TCL, Perl, Python) for automation. Proven experience handling full chip/block-level PD independently. Strong problem-solving and debugging skills. Good communication and leadership abilities to lead a PD team. Education: B. E. /B. Tech or M. E. /M. Tech in Electronics, Electrical, or VLSI Design. Work Experience Required Skills: Strong hands-on expertise in physical design tools (Cadence Innovus / Synopsys ICC2 / Mentor). Solid understanding of ASIC design flow and foundry process nodes (7nm/5nm/14nm or relevant). Deep knowledge of STA, power analysis, IR/EM, and physical verification methodologies. Good experience in ECO (Engineering Change Order) flows. Familiarity with scripting languages (TCL, Perl, Python) for automation. Proven experience handling full chip/block-level PD independently. Strong problem-solving and debugging skills. Good communication and leadership abilities to lead a PD team.

Roles & Responsibilities : - Passionate to work in complex HW ecosystems - Design different circuity elements involving power supply, high speed commcn. with an eye on EMC compliance and Safety compliance - Ability to solve complex problems - Self-motivated and Self-driven

Job Requirements Job Title: Lead Engineer - Physical Design (PD) Job Type: Full-Time We are seeking a highly skilled and experienced Physical Design Lead in VLSI with a minimum of 9 years of experience to join our team. As the Lead Engineer in Physical Design, you will be responsible for overseeing the physical design process, ensuring the successful implementation of complex VLSI designs. esponsibilities: Lead the physical design (PD) team through complete ASIC/SoC implementation flow. Handle floorplanning, partitioning, placement, CTS (Clock Tree Synthesis), routing, and sign-off activities.Drive timing closure, power optimization, area optimization, and DRC/LVS clean designs.Collaborate with RTL, DFT, verification, and package teams to achieve project goals. Manage block-level and chip-level physical design, including hierarchical and flat methodologies. Perform static timing analysis (STA), power analysis, and signal integrity checks.Ensure physical verification, IR drop, and EM analysis closure. Guide junior engineers, review their work, and provide technical mentorship.Drive tool flow automation and efficiency improvements in PD. Interface with customers/stakeholders for updates, reviews, and sign-off. Required Skills: Strong hands-on expertise in physical design tools (Cadence Innovus / Synopsys ICC2 / Mentor). Solid understanding of ASIC design flow and foundry process nodes (7nm/5nm/14nm or relevant). Deep knowledge of STA, power analysis, IR/EM, and physical verification methodologies.Good experience in ECO (Engineering Change Order) flows. Familiarity with scripting languages (TCL, Perl, Python) for automation. Proven experience handling full chip/block-level PD independently.Strong problem-solving and debugging skills. Good communication and leadership abilities to lead a PD team. Education: B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Design. Work Experience Required Skills: Strong hands-on expertise in physical design tools (Cadence Innovus / Synopsys ICC2 / Mentor). Solid understanding of ASIC design flow and foundry process nodes (7nm/5nm/14nm or relevant). Deep knowledge of STA, power analysis, IR/EM, and physical verification methodologies.Good experience in ECO (Engineering Change Order) flows. Familiarity with scripting languages (TCL, Perl, Python) for automation. Proven experience handling full chip/block-level PD independently.Strong problem-solving and debugging skills. Good communication and leadership abilities to lead a PD team.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Board Design . Experience: 3-5 Years .

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: Analog Layout . Experience: 3-5 Years .

Be an integral part of the safety culture at Epiroc, approaching all aspects of work with a safety-first attitude. As a Validation and Verification Engineer, you will play a crucial role in ensuring compliance with industry standards such as IEC, CISPR, MIL-STD, and FCC by performing EMI/EMC testing and validation. Utilize equipment like spectrum analyzers, oscilloscopes, and EMI receivers to measure EMI levels and identify sources of interference, providing solutions to mitigate EMI. Prepare detailed test reports documenting results and recommend design changes to reduce interference. Lead EMI/EMC testing procedures, including setting up test environments, test equipment, and ensuring compliance with global standards. Additionally, demonstrate very good knowledge in LV and HV systems (AC and DC) and keep stakeholders informed about project statuses regularly. Collaborate with suppliers and vendors to source appropriate materials and components. Troubleshoot electrical issues during product development and production, ensuring products meet regulatory standards like CE, UL, and FCC for different markets. Stay updated with the latest EMC regulations and standards to ensure compliance with global requirements. Troubleshoot EMI-related issues in product prototypes and production systems, working with cross-functional teams to address and resolve EMI/EMC problems. Interact with the production team and suppliers to resolve assembly and manufacturing issues effectively. Manage multiple projects at a single location by receiving and studying jobs, planning, estimating, tracking progress, and communicating effectively with project stakeholders. As part of the mission to design and develop electrification products for mining machineries, lead electrical verification and validation from concept generation to prototype testing and production implementation. Your expertise will advance EMI/EMC testing for various components and subsystems, contributing to Epiroc's goal of accelerating the transition to zero-emission technology. Requirements: - Minimum 7 years of experience in validation and verification of electrical components. - BE/BTech in Electrical Engineering or M. Tech in Power Systems preferred. Knowledge and Skills: - Strong understanding of electromagnetic theory, signal integrity, and noise control techniques. - Ability to interpret and apply EMC regulations and standards. - Excellent problem-solving, analytical, communication, and teamwork skills. Personality Traits: - Enthusiastic, positive-minded, and able to work well in a global team environment. - Good interpersonal, communication, and analytical skills. - Self-starter, goal-oriented, with attention to detail and a strong sense of responsibility. - Excellent problem-solving skills. Join Epiroc, a global productivity partner for mining and construction customers, dedicated to accelerating the transformation toward a sustainable society. With innovative technology and safe equipment, Epiroc supports customers in around 150 countries with world-class service, automation, digitalization, and electrification solutions. Learn more at www.epiroc.com.,

As a Hardware Design Engineer, you will be responsible for working in a team environment to capture hardware requirements and create hardware designs. Your role will involve leading circuit design, schematic net-list design, and layout design based on various technical aspects such as electrical guidance, signal integrity, power integrity, ID and mechanical integrity, EMC and safety standards, manufacturing industry specifications, and end-user usability requirements. Additionally, you will be tasked with creating and managing PCB documentation, including fabrication and assembly drawings, as well as Gerber files. You will also be required to prepare Bills of Materials (BOM) and fabrication documentation while following revision control procedures. Your expertise will be essential in assisting with the fabrication, bring-up, and testing of the PCB. To qualify for this role, you should hold a Bachelor's degree in Electrical or Electronics Engineering. In addition, you must have experience working with Altium, Cadence, or KiCad PCB & Integrity Software Products. Proficiency in designing 8+ layer PCBs will be a significant advantage for this position.,

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Responsibilities: STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools for methodology development. Good Technical writing and Communication skills, should be willing to work in cross-collaborative environment Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus Familiar with process technology enablement: Circuit simulations using Hspice/FineSim, Monte Carlo. Education : B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI. Preferred Qualification/Skills 5 - 10 years of experience in STA/Timing Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling Hands-on experience with STA tools - Prime-time, Tempus Have experience in driving timing convergence at Chip-level and Hard-Macro level In-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus) Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation. Proficient is scripting languages TCL, Perl, Awk Basic knowledge of device physic

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 7-14 yrs experience in Physical Design and timing signoff for high speed cores. Should have good exposure to high frequency design convergence for physical design with PPA targets and PDN methodology. Masters/Bachelors Degree in Electrical/Electronics science engineering with at least 7+ years of experience in IC design. Experience in leading block level or chip level Physical Design, STA and PDN activities. Work independently in the areas of RTL to GDSII implementation. Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Knowledge of low power flow (power gating, multi-Vt flow, power supply management etc.) Circuit level comprehension of time critical paths in the design Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.) Tcl/Perl scripting Willing to handle technical deliveries with a small team of engineers. Strong problem-solving skills.

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Overview: Experienced STA/Timing Engineer with 3-10 Years of hands-on experience on timing sign off/convergence for complex SOCs. Ability to start immediately on timing analysis/sign-off with PD/Methodology teams across multiple sites and different technology nodes. Job Description : STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools for methodology development. Good Technical writing and Communication skills. Willing to work in cross-collaborative environment. Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus Familiar with process technology enablement: Circuit simulations using Hspice/FineSim, Monte Carlo. Education : B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI. Preferred Qualification/Skills Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling. Hands-on experience with STA tools - Prime-time, Tempus Have experience working on timing convergence at Chip-level and Hard-Macro level. In-depth knowledge crosstalk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows, methods, and tools (ICC2, Innovus) Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation. Proficient is scripting languages TCL, Perl, Python Basic knowledge of device physics

General Summary: Posting Title: Analog/Mixed Signal PLL Analog Designers Bangalore (BDC), India Job Function Qualcomm Mixed-Signal IP team is actively seeking for analog circuit designers (3-10yrs) to join our growing team in Bangalore, India (BDC). You will be directly involved in delivering analog and mixed-signal integrated circuits for high-speed PLL/DLL/LDO IP for SoC and the integration into Qualcomm's Mobile, Auto, IoT & Compute SoC products in leading-nodes - finfets & beyond. Design goals include low-power & low voltage analog designs to address Qualcomm's low-power wireless products. Responsibilities Hands-on experience - Analog circuit design Architecture, design, and development of analog / mixed signal hard macros for the PLL IP Design team Experience in designing multiple analog building blocks Bias, References, Op-amp, LDOs, VCO/DCO etc & High-Speed custom digital like dividers, distribution etc. Perform custom circuit design in the latest FinFET CMOS processes technologies and deliver hard macros and support customer integration and testing. Able to setup, run & analyses circuit simulations(spice) & create behaviour models. Work closely with Layout, Digital designer, PD & HSIO Bench/ATE Team Participate in internal customer requirements discussions to create design specifications. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Skills & Experience A minimum of 2-years of transistor level analog mixed-signal design experience, preferably in PLL design, high-speed wireline SerDes, DDR or other high-speed applications Experience in using SPICE simulators, adexl & virtuoso. Familiar with custom analog layout parasitic LLEs optimization, post layout extraction, Verification & design review closure Understanding of signal integrity in high-speed wireline design is preferred. Scripting to automate circuit design and verification work. Able to work with teams across the globeand possess good communication and presentationskills. Preferred Mixed signal designexperience Keywords Analog circuit Design, PLL, VCO, DCO, Clock distribution

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Additional Job Description 7-14 yrs experience in Physical Design and timing signoff for high speed cores. Should have good exposure to high frequency design convergence for physical design with PPA targets and PDN methodology. Masters/Bachelors Degree in Electrical/Electronics science engineering with at least 7+ years of experience in IC design. Experience in leading block level or chip level Physical Design, STA and PDN activities. Work independently in the areas of RTL to GDSII implementation. Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Knowledge of low power flow (power gating, multi-Vt flow, power supply management etc.) Circuit level comprehension of time critical paths in the design Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.) Tcl/Perl scripting Willing to handle technical deliveries with a small team of engineers. Strong problem-solving skills.

Qualcomm India Private Limited is at the forefront of technology innovation, breaking boundaries to enable next-generation experiences and driving digital transformation for a smarter, connected future. As a Hardware Engineer at Qualcomm, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other cutting-edge technologies to launch world-class products. Collaboration with cross-functional teams is key to developing solutions that meet performance requirements. To be considered for this role, you should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field with at least 2 years of Hardware Engineering experience. Alternatively, a Master's degree with 1+ year of relevant experience or a PhD in a related field is also accepted. As an experienced STA/Timing Engineer with 3-10 years of hands-on experience, you will focus on timing sign-off and convergence for complex SOCs. Immediate involvement in timing analysis and sign-off with PD/Methodology teams across different sites and technology nodes is expected. Key responsibilities include: - STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs. - Timing analysis, validation, and debug across multiple PVT conditions using tools like PT/Tempus. - Running Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. - Evaluating timing methodologies/tools on different designs and technology nodes. - Developing automation scripts within STA/PD tools for methodology enhancement. - Proficiency in TCL/Perl/Python for design automation and familiarity with digital flow design implementation. - Knowledge of process technology enablement, including circuit simulations and Monte Carlo. Preferred qualifications and skills include: - Expertise in STA timing analysis, AOCV/POCV concepts, CTS, and managing timing constraints. - Hands-on experience with STA tools like Prime-time and Tempus at Chip-level and Hard-Macro level. - Understanding of crosstalk noise, Signal Integrity, Layout Parasitic Extraction, and ASIC back-end design flows. - Proficiency in scripting languages such as TCL, Perl, and Python. - Basic knowledge of device physics. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities. For more information or accommodation requests, please contact disability-accommodations@qualcomm.com. Staffing and recruiting agencies are advised not to submit unsolicited profiles, applications, or resumes through Qualcomm's Careers Site. If you are ready to be part of a dynamic team pushing technological boundaries, apply now to join Qualcomm as a Hardware Engineer.,

You are an experienced PCB Design Engineer with 2-6 years of experience in designing schematic and PCB layout for automotive products. You will be collaborating with electrical engineers to create schematics and build part libraries following IPC standards. Your role involves designing high-quality PCB layouts, communicating with HW and mechanical engineering departments, and conducting design reviews to ensure best practices are implemented. Your responsibilities also include generating Gerber files, assembly drawings, and documentation for manufacturing, working with vendors for PCB fabrication and assembly, and optimizing designs for performance and cost. You will be performing electrical testing and troubleshooting, staying updated on industry trends, and conducting design feasibility studies to identify trade-offs on packaging, cost, manufacturing, and system performance. To qualify for this position, you should have a Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or a related field. You must have 2-6 years of experience in PCB design using ORCAD, with a strong understanding of PCB layout techniques, signal integrity, power integrity, thermal considerations, and EMC/EMI considerations. Experience with high-speed digital design and RF/microwave PCB layouts is a plus. Familiarity with industry standards, manufacturing processes for PCB fabrication and assembly, impedance-controlled circuits, layer stack-up trade-offs, and panel optimization is required. Knowledge of IPC standards, IPC certification, DFx standards, and signal/power integrity tools like Hyperlynx are advantageous. Strong problem-solving skills, attention to detail, and excellent communication and collaboration skills are essential for this role.,

At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world. Job Overview TE Connectivity s R&D/Product Development Engineering Teams conceive original ideas for new products, introduce them into practice. They are responsible for product development, and qualification from market definition through production and release; assist in the qualification of suppliers for new products to ensure suppliers deliver quality parts, materials, and services for new or improved manufacturing processes; conduct feasibility studies, testing on new and modified designs; direct and support detailed design, testing, prototype fabrication and manufacturing ramp. The R&D/Product Development Engineering Teams provide all required product documentation including, but not limited to, Solid Model, 2D/3D production drawings, product specifications, and testing requirements. They create and modify detailed drawings and drafting or conceptual models from layouts, rough sketches or notes and contribute to design modifications to facilitate manufacturing operation or quality of product. Typical fields of expertise includematerials, mechanics and systems, electrical, optics, chemistry, software, automation systems, packaging, testing and measurement, and manufacturing of electrical, mechanical and electronic components, products, and their integration into systems. KEY RESPONSBILITIES: Minimum of 5+ years of work experience in a signal integrity engineering role or related experience Minimum of 3+ years of work experience in connector development - Experience with interconnect design or experience with connector &/or cable/cable assembly design (high speed twinax cables, direct attach copper (DAC) cables) Demonstrated experience using Signal integrity analysis tools (Agilent ADS, Ansys HFSS or equivalent, 3D modeling tools) and testing equipment (including VNA, TDR and BERT). A solid understanding of statistical analysis and AI training. A solid understanding of SI knowledge, including electromagnetic theory and electrical circuit behavior Strong analytical capabilities to interpret simulation and lab data to identify issues and provide solutions to fix identified problem. Familiarity with printed circuit board design, fabrication and assembly. Familiar with material, manufacturing process, and manufacture inspection. Familiar with at least one programming language, such as Matlab, python, C++, VB, etc. Excellent verbal and written communication skills Ability to work in a global environment - able to accommodate varying time zones, fluent in English (verbal/written), able to collaborate with individuals across geographies Solid presentation skills with an ability to clearly communicate technical concepts to diverse audiences in English Individual must be highly motivated, a quick learner, and able to work independently Competencies Location

At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world. Job Overview TE Connectivitys R&D/Product Development Engineering Teams conceive original ideas for new products, introduce them into practice. PCB engineer is scalable to contribute individually. He/she is responsible for delivering the project from schematic scratch till the board get fabricated. Stackup analysis, routing strategy, placement feasibility is more important. R&D engineer should familiarize in manufacturing process and the different soldering process, IPC standards for SMT & PTH library footprint creation. Responsible for all the documentation related to the board design and fabrication data. Typical fields of expertise include Analysing different dielectric materials, knowledge on high-speed design constraint, electrical, software, automation systems, data packaging, testing and measurement, and manufacturing of electrical, mechanical and electronic components, products, and their integration into systems. Responsibilities: TE Connectivity is seeking an experienced candidate for high speed printed circuit board design. The candidate is expected to interface with US and China based engineering teams for input and independently work on printed circuit board layout while also providing guidance and direction to local designers. The position requires that the candidate be able to utilize generalized engineering direction to create detailed custom designs. The candidate will be responsible for ensuring the accuracy and functionality of the end design and be able to take ownership of various aspects of the PCB design. Programs may additionally include pre-layout analysis and coordination of global vendors for prototype fabrication and assembly. Candidate Desired Profie: Qualifications: Candidate should have excellent verbal communication skills, a high attention to detail, be highly motivated, a quick learner, and be able to work independently. Understanding of printed circuit board design, manufacturing, and assembly is required. Experience with printed circuit board design is required. Experience in a senior technical or leadership role is required. Must be able to deliver the board design from scratch schematic to gerber release for manufacturing. Very good exposure in design software - Altium, Allegro, AutoCAD is must. Previous work experience in high-speed board designs will be highly preferred. Altium/Allegro tool scripting knowledge will be an added advantage for this role. Able to address supplier Engineering Queries. Education MTech/PHD Familiarity with the following a plus: CAM350 High speed and/or RF circuits Signal integrity analysis Connectors and cable assemblies PCB manufacturing tolerances and cost drivers PDMLink process ECR/ECN release process Competencies ABOUT TE CONNECTIVITY TE Connectivity plc (NYSETEL) is a global industrial technology leader creating a safer, sustainable, productive, and connected future. Our broad range of connectivity and sensor solutions enable the distribution of power, signal and data to advance next-generation transportation, energy networks, automated factories, data centers, medical technology and more. With more than 85,000 employees, including 9,000 engineers, working alongside customers in approximately 130 countries, TE ensures that EVERY CONNECTION COUNTS. Learn more atwww.te.com and onLinkedIn , Facebook , WeChat, Instagram and X (formerly Twitter). WHAT TE CONNECTIVITY OFFERS: We are pleased to offer you an exciting total package that can also be flexibly adapted to changing life situations - the well-being of our employees is our top priority! Competitive Salary Package Performance-Based Bonus Plans Health and Wellness Incentives Employee Stock Purchase Program Community Outreach Programs / Charity Events IMPORTANT NOTICE REGARDING RECRUITMENT FRAUD TE Connectivity has become aware of fraudulent recruitment activities being conducted by individuals or organizations falsely claiming to represent TE Connectivity. Please be advised that TE Connectivity never requests payment or fees from job applicants at any stage of the recruitment process. All legitimate job openings are posted exclusively on our official careers website at te.com/careers, and all email communications from our recruitment team will come only from actual email addresses ending in @te.com . If you receive any suspicious communications, we strongly advise you not to engage or provide any personal information, and to report the incident to your local authorities. Across our global sites and business units, we put together packages of benefits that are either supported by TE itself or provided by external service providers. In principle, the benefits offered can vary from site to site.