131 Signal Integrity Jobs - Page 5

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels. Available Job Responsibilities Design and build memory or circuit blocks at the gate or transistor level Simulate and analyze the circuit design using transistor level simulators Extract the layout and perform post-layout simulations and verification Floorplan physical implementation and layout integration of design components Integrate characterization flow to extract timing and power information Develop scripts to automate characterization flow, simulations, and verification Specify and verify various behavioral and physical memory models Document the design specifications, behavioral description, and timing diagrams Help specify silicon test plan and correlate silicon to simulation data Preferred Skills Good understanding of transistor level circuit behavior and device physics Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis Proficiency in running simulators, writing automation scripts, and are tools savvy Understanding of memory behavioral and physical models is a plus Expertise in memory circuit design is a plus Understanding of DFT schemes and chip level integration is a plus Good communication, interpersonal, and leadership skills Motivated, self-driven and good at multi-tasking Passion for solving complex problems and willingness to learn .

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Physical Design Planning. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: Analog Layout. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Physical Design Planning. Experience3-5 Years.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 6-12 years of experience in physical design from product-based/EDA companies. DDRPhy /PCIE-high speed interface PD Timing Signoff experience with SNPS/CDNS tools PDNIR signoff and Physical verification knowledge Automation skills python/Perl/TCL RDL-design + Bump Spec understanding for smooth SoC PDN integration and signoff Proficiency in automation to drive improvements in PPA Experience working on multiple technology nodes in advanced processes. Experience in low power design implementation, including Unified Power Format (UPF), multi-voltage domains, and power gating. Familiarity with ASIC design flows and physical design methodologies. Good to Have: Design level knowledge to optimize the implementation for PPPA Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Overview Experienced STA/Timing Engineer with 3-10 Years of hands-on experience on timing sign off/convergence for complex SOCs. Ability to start immediately on timing analysis/sign-off with PD/Methodology teams across multiple sites and different technology nodes. : STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools for methodology development. Good Technical writing and Communication skills. Willing to work in cross-collaborative environment. Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS ICC, Innovous , PT/Tempus Familiar with process technology enablementCircuit simulations using Hspice/FineSim, Monte Carlo. Education B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI. Preferred Qualification/Skills Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling. Hands-on experience with STA tools - Prime-time, Tempus Have experience working on timing convergence at Chip-level and Hard-Macro level. In-depth knowledge crosstalk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows, methods, and tools (ICC2, Innovus) Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation. Proficient is scripting languages- TCL, Perl, Python Basic knowledge of device physics Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Services Group, Engineering Services Group > Layout Engineer General Summary: Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues. Minimum Qualifications: "¢ Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 3+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. OR Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 5+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. OR High School diploma or equivalent and 7+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. "¢ 3+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap). SRAM Mask Layout Designer Qualcomm is a company of inventors seeking to revolutionize the CPU market in an age of new possibilities. Are you interested in joining Qualcomm"™s high performance CPU team as an SRAM Mask Layout Designer? You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. As a Mask Layout Designer, you will develop block or macro level layouts and floorplans for high performance custom memories according to project requirements, specifications, and design schematics. Minimum qualifications — 5+ years of experience and a high school diploma or equivalent — OR 5+ years experience and BS in Electrical Engineering — OR 3+ years experience and MS in Electrical Engineering — Direct experience with custom SRAM layout — Experience in industry standard custom design tools and flows. — Knowledge of leading-edge FinFET and/or nanosheet processes (5nm or newer). — Experience in Layout design of library cells, datapaths, memories in deep sub-micron technologies. — Knowledge of all aspects of Layout floorplanning and hierarchical assembly. — Knowledge of Cadence Virtuoso and Calibre LVS/DRC. Preferred qualifications — Good understanding of device parasitics and reliability considerations during layout. — Good understanding of critical circuits and layout styles. — Ability to write Skill code for layout automation. — Knowledge of improving EMIR in layout. — Good communication skills to work with different teams to accurately describe issues and follow them through for completion. Roles and Responsibilities — Design layout for custom memories and other digital circuits based on provided schematics. — Read and interpret design rule manuals to create optimal and correct layout. — Own the entire layout process from initial floorplanning to memory construction to physical verification. — Use industry standard verification tools to validate LVS, DRC, ERC etc. — Interpret the results from the verification suite and perform layout fixes as needed. — Provide layout fixes as directed by the circuit design engineers. — Work independently and execute memory layout with little supervision. — Provide realistic schedules for layout completion. — Provide insight into strategic decisions regarding memory layout and

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: About The Role Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles "¢ Synthesis, Static Timing Analysis and LEC of SoC/Cores "¢ Full chip and block level timing closure, IO budgeting for blocks "¢ Logical equivalence check between RTL to Netlist and Netlist to Netlist "¢ Knowledge of low-power techniques including clock gating, power gating and MV designs "¢ ECO timing flow "¢ Proficient in scripting languages (TCL and Perl). Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 4+ yrs of experience

Analog Design Engineer Skills & Experience Required: 5+ years of relevant experience. Has relevant knowledge and hands on experience of SerDes design at high data rates, up to 20Gbps. Study the assigned block, analyze the circuit carefully, and work on the hand analysis. Understand the required performance, the targeted specs and trade-off between different performance metrices. Write behavioral model of the circuit blocks for system-level simulations. Simulate and verifying designed schematics using Synopsys tools using circuit simulators. Debug to find out the root cause for any performance degradation. Being capable of solving all the faced issues. Working with layout team on layout optimization. Evaluate post layout performance using extraction tools (ICV and Calibre). Understand the interface with other blocks (if any) and work with other team members to optimize the interface. Coordinate and handling top-level simulations. Develop and executing characterization plans of the designed blocks, systems, and chips. Check the design reliability (EM/IR/Aging) using available tools. Do timing models using custom static timing analysis tools. Deliver the corresponding documentation as per the design process. Excellent knowledge of design/simulation tools such as Synopsys, Cadence and/or Mentor tools or any relevant tool. Good knowledge of any EM simulation tool. Good knowledge in behavioral modeling (Verilog, Verilog AMS). Very Good knowledge of custom timing static analysis tool (Synopsys NanoTime and SiliconSmart). Job Location IndiaBangalore IndiaChennai IndiaHyderabad IndiaKolkata IndiaNoida S. KoreaSeoul Location - Bengaluru,Chennai,Kolkata,Noida

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Mandatory Skills: VLSI Board Design. Experience3-5 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Mandatory Skills: Analog Circuit design. Experience3-5 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Mandatory Skills: Analog Layout. Experience3-5 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

Objective We are looking for an experienced System Hardware Design Engineer from Product/Semiconductor industry background. Roles and Responsibilities As a Senior/Lead Hardware Engineer you will be designing innovative and high performance next generation Protocol Analyser products for the semiconductor industry. We are looking for candidates who thrive in a fast paced start-up like environment, you will be engaged In all aspects of hardware design life cycle including high-speed board design, R&D, proof of concept designs and validation. Basic Qualifications Bachelor's or masters degree in Electrical/Electronics/Communication Engineering or related field from reputed institute. 4 to 8 years of board design experience from any product based organization Proficient in high-density/high-speed design (including FPGA's, SerDes, PCIe Gen4/Gen5,UFS 4.0, 10/100 GigE, CPHY/DPHY,USB 3.2) Experience in interfacing high-speed memories such as DDR4/5, RDIMM, SODIMM Modules system integration including schematic and layout using industry-standard capture and design packages such as spice, Altium or Cadence. Hardware validation, troubleshooting, board bring-up, candidate should be good at using high-end laboratory equipment An outstanding teammate with strong interpersonal and communication skills. Collaborate with RTL, SW and quality engineers to integrate and debug the system level issues. Good verbal and written communication skills, design documentation as per organizational standards. Preferred Qualifications Experience in signal integrity and power integrity, High speed board design concepts. Hands-on Signal integrity analysis, PI and high speed analog simulation, SI tools such as HFSS, SIwave, ADS and Hyperlynx. Hands on with 33GHz and 50GHz Oscilloscopes and GHz pattern generators for protocol capture, timing and eye diagram analysis. Inclusion and Diversity We are committed to fostering a workplace that celebrates diversity in all its forms and believe diverse teams drive innovation, creativity, and success. We aim to create an inclusive environment where all employees feel valued and respected.

Role & responsibilities Design and develop printed circuit boards (PCBs) based on project requirements. Create schematic diagrams and translate them into PCB layouts using CAD software. Collaborate with cross-functional teams such as electrical engineers and product designers to ensure the PCB meets design specifications. Optimize PCB layout for signal integrity, power distribution, and thermal management. Perform design rule checks (DRC) and electrical rule checks (ERC) to verify design accuracy. Component Footprint/Landpattern modification and selection. Work with manufacturers to ensure that the PCBs are fabricated and assembled correctly. Troubleshoot and resolve issues during the prototype testing phase. Ensure compliance with industry standards and regulations, such as IPC standards and RoHS guidelines. Continuously improve designs for cost reduction, performance enhancement, and manufacturability. Maintain design documentation and version control for all PCB designs. Provide technical support and recommendations for board assembly and testing. Stay up to date with emerging technologies and design techniques in the PCB industry.

Skillset needed - High voltage Flyback Power Supply Design Analog & Digital Electronics Design (Micro controller / Microprocessor based Design) Communication Design: RS485, ETHERNET Design for EMI EMC expertise along with Experience in Simulation Tools as well RF communication Design, High speed digital design Expertise on Signal integrity Analysis Expertise on all IEC/UL Certification Compliance standards (Safety, EMC & Measurement Standard)

Apply now » .buttontext88d8dcea45dcd44d a{ border1px solid transparent; } .buttontext88d8dcea45dcd44d a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } STAFF R&D/PRODUCT DVL ENGINEER At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world. Job Overview As a Product Dvl Engineer in the Signal Integrity team you will focus on the electrical design, simulation, and verification-validation testing of high speed products in the connector and/or cable assembly, radio system industry—targeting high speed communications and connectivity within datacenters and wireless infrastructure. You will be expected to independently work on projects in the areas of signal integrity for product and system design including modeling, simulation, testing and circuit board layout. You will work collaboratively within a broader cross functional team of mechanical, manufacturing, & operations to execute leading edge products designs. You will be the subject matter expert for the signal integrity performance of a product/platform beginning with the initial analysis through prototype fabrication & evaluation, and production verification testing. You will tackle challenging design problems and utilize simulation tools to guide complex designs toward success. Responsibilities: Subject matter expert in signal integrity design, simulation and validation activities through product development cycles Establishing signal integrity design performance/functional requirements for new products Performing signal integrity simulations for multiple high-speed standards on each product. This includes determining the correct simulation methodology and setup to use, as well as a good understanding of the criteria for each interface. Performing PCB design schematic and layout reviews Creating actionable recommendations based upon design reviews and simulation results Guiding connector design and component qualifications from a signal integrity standpoint. Making data driven decisions about the product functionality and areas for improvement. Required Skills/ Experiences: Bachelor’s degree in Electrical Engineering or equivalent work experience 8 years of relevant work experience in electrical design, RF design, or PCB design Proficient with signal integrity analysis tools (Agilent ADS, Ansys HFSS, CST, or equivalent tools) A solid understanding of electromagnetic theory and electrical circuit behavior Strong analytical capabilities to interpret simulation and lab data to identify issues and provide solutions to fix identified problem. Familiarity with printed circuit board design, fabrication and assembly. Fluent in English (both verbal and written) to facilitate global communication both internally and with external customers. Ability to work in a global environment – able to accommodate varying time zones and capable of collaborating with individuals across geographies. Individual must be highly motivated, a quick learner, and able to work independently Nice to have Skills: Experience with interconnect design, including socket/connector/cable/cable assembly design (high-speed twinax cables, direct attach copper (DAC) cables), and/or RF antenna, RF sub-system Design experience with communication systems (high-speed servers, switches, routers, storage, antennas, RF front end or similar systems) Solid presentation skills with an ability to clearly communicate technical concepts to diverse audiences in English Strong organizational and time management skills with an ability to manage and execute multiple tasks/deadlines/projects simultaneously with limited direction. SixSigma methodologies or other strong data analytics background. Printed circuit board design, fabrication and assembly (Altium, AutoCAD) Experience in project leadership, especially as it applies across design, development & manufacturing teams Test equipment (oscilloscope, vector network analyzer, BERT) Signal conditioning techniques (equalization, amplification) Direct customer design and support experience Application and test knowledge of high-speed devices and equalization techniques .videocomponent8ae3a91ad732ccb9 a{ border1px solid transparent; } .videocomponent8ae3a91ad732ccb9 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } .buttontext13c01d781def3077 a{ border1px solid transparent; } .buttontext13c01d781def3077 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } Location: Bangalore, KA, IN, 560066 #job-location.job-location-inline {displayinline;} City: Bangalore State: KA Country/Region: IN Travel: Less than 10% Requisition ID: 134422 Alternative Locations: Function: Engineering & Technology Job Segment R&D Engineer, Fabrication, Manufacturing Engineer, Electrical Engineering, Front End, Engineering, Manufacturing, Technology Apply now »

Apply now » .buttontext88d8dcea45dcd44d a{ border1px solid transparent; } .buttontext88d8dcea45dcd44d a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } Sr Signal Integrity Engineer At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world. Job Overview TE Connectivity’s R&D/Product Development Engineering Teams conceive original ideas for new products, introduce them into practice. They are responsible for product development, and qualification from market definition through production and release; assist in the qualification of suppliers for new products to ensure suppliers deliver quality parts, materials, and services for new or improved manufacturing processes; conduct feasibility studies, testing on new and modified designs; direct and support detailed design, testing, prototype fabrication and manufacturing ramp. The R&D/Product Development Engineering Teams provide all required product documentation including, but not limited to, Solid Model, 2D/3D production drawings, product specifications, and testing requirements. They create and modify detailed drawings and drafting or conceptual models from layouts, rough sketches or notes and contribute to design modifications to facilitate manufacturing operation or quality of product. Typical fields of expertise includematerials, mechanics and systems, electrical, optics, chemistry, software, automation systems, packaging, testing and measurement, and manufacturing of electrical, mechanical and electronic components, products, and their integration into systems. KEY RESPONSBILITIES: Bachelor’s degree in Electrical Engineering or equivalent work experience 5 years of relevant work experience in electrical design, RF design, or PCB design Proficient with signal integrity analysis tools (Agilent ADS, Ansys HFSS, CST, or equivalent tools) A solid understanding of electromagnetic theory and electrical circuit behavior Strong analytical capabilities to interpret simulation and lab data to identify issues and provide solutions to fix identified problem. Familiarity with printed circuit board design, fabrication and assembly. Fluent in English (both verbal and written) to facilitate global communication both internally and with external customers. Ability to work in a global environment – able to accommodate varying time zones and capable of collaborating with individuals across geographies. Individual must be highly motivated, a quick learner, and able to work independently DESIRED SKILLS: Experience with interconnect design, including socket/connector/cable/cable assembly design (high-speed twinax cables, direct attach copper (DAC) cables), and/or RF antenna, RF sub-system Design experience with communication systems (high-speed servers, switches, routers, storage, antennas, RF front end or similar systems) Solid presentation skills with an ability to clearly communicate technical concepts to diverse audiences in English Strong organizational and time management skills with an ability to manage and execute multiple tasks/deadlines/projects simultaneously with limited direction. SixSigma methodologies or other strong data analytics background. Printed circuit board design, fabrication and assembly (Altium, AutoCAD) Experience in project leadership, especially as it applies across design, development & manufacturing teams Test equipment (oscilloscope, vector network analyzer, BERT) Signal conditioning techniques (equalization, amplification) Direct customer design and support experience Application and test knowledge of high-speed devices and equalization techniques Competencies ValuesIntegrity, Accountability, Inclusion, Innovation, Teamwork .videocomponent8ae3a91ad732ccb9 a{ border1px solid transparent; } .videocomponent8ae3a91ad732ccb9 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } .buttontext13c01d781def3077 a{ border1px solid transparent; } .buttontext13c01d781def3077 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } Location: Bangalore, KA, IN, 560066 #job-location.job-location-inline {displayinline;} City: Bangalore State: KA Country/Region: IN Travel: Less than 10% Requisition ID: 132207 Alternative Locations: Function: Engineering & Technology Job Segment Testing, Electrical Engineering, Drafting, Manufacturing Engineer, Front End, Technology, Engineering Apply now »

Apply now » .buttontext88d8dcea45dcd44d a{ border1px solid transparent; } .buttontext88d8dcea45dcd44d a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } Sr Signal Integrity Engineer At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world.DESIRED SKILLS Printed circuit board design (proficient in Altium a PLUS), fabrication and assembly (AutoCAD) Communication systems (high-speed servers, switches, routers, storage) Signal conditioning techniques (equalization, amplification) SixSigma methodologies or other strong data analytics background a PLUS. Experience in project leadership, especially as it applies across design, development & manufacturing teams Direct customer design and support experience Application and test knowledge of high-speed devices and equalization techniques Design experience with high-speed servers, switches, routers, storage, antenna, RF front end or similar systems Job Overview TE Connectivity’s R&D/Product Development Engineering Teams conceive original ideas for new products, introduce them into practice. They are responsible for product development, and qualification from market definition through production and release; assist in the qualification of suppliers for new products to ensure suppliers deliver quality parts, materials, and services for new or improved manufacturing processes; conduct feasibility studies, testing on new and modified designs; direct and support detailed design, testing, prototype fabrication and manufacturing ramp. The R&D/Product Development Engineering Teams provide all required product documentation including, but not limited to, Solid Model, 2D/3D production drawings, product specifications, and testing requirements. They create and modify detailed drawings and drafting or conceptual models from layouts, rough sketches or notes and contribute to design modifications to facilitate manufacturing operation or quality of product. Typical fields of expertise includematerials, mechanics and systems, electrical, optics, chemistry, software, automation systems, packaging, testing and measurement, and manufacturing of electrical, mechanical and electronic components, products, and their integration into systems. KEY RESPONSBILITIES: Drive SI design, simulation, and validation for next-gen high-speed interconnects (112G/224G PAM4, PCIe Gen6/7, Co-Packaged Optics) through the product development cycle. Conducting SI COE analysis, including o Performing signal integrity simulations and analysis for high-speed interconnect product development. This includes determining the correct simulation methodology and setup to use, as well as a good understanding of the criteria for each interface. o Modeling the connector with the consideration of manufacture impact and application impact. o Providing solutions to the SI challenges. This includes identifying the problems, making research plan, developing new technologies, and training and sharing the findings to the SI community. Develop novel interconnect solutions by optimizing mating interfaces, lead frames, and PCB transitions for resonance-free, low-loss performance. Enhance bulk cable design & termination techniques to minimize skew, impedance mismatches, and signal degradation. Advance high-frequency testing methodologies beyond 67 GHz with innovative non-PCB-based test fixtures. Utilize AI & big data analytics for predictive SI modeling, auto-routing, and performance optimization. Optimize material selection & electromagnetic design to improve noise isolation, signal integrity, and high-frequency response. Collaborate with NPD teams & industry partners to influence SI strategies, technology roadmaps, and next-gen product designs. Represent TE at industry forums (IEEE, OIF, PCI-SIG, etc.) and contribute to next-gen SI standards. Bachelor’s degree in Electrical Engineering. Should have total work experience of 3-5+years. Minimum of 5+ years of work experience in a signal integrity engineering role or related experience Minimum of 3+ years of work experience in connector development - Experience with interconnect design or experience with connector &/or cable/cable assembly design(high speed twinax cables, direct attach copper (DAC) cables) Demonstrated experience using Signal integrity analysis tools (Agilent ADS, Ansys HFSS or equivalent, 3D modeling tools) and testing equipment (including VNA, TDR and BERT). A solid understanding of statistical analysis and AI training. A solid understanding of SI knowledge, including electromagnetic theory and electrical circuit behavior Strong analytical capabilities to interpret simulation and lab data to identify issues and provide solutions to fix identified problem. Familiarity with printed circuit board design, fabrication and assembly. Familiar with material, manufacturing process, and manufacture inspection. Familiar with at least one programming language, such as Matlab, python, C++, VB, etc. Excellent verbal and written communication skills Competencies ValuesIntegrity, Accountability, Inclusion, Innovation, Teamwork .videocomponent8ae3a91ad732ccb9 a{ border1px solid transparent; } .videocomponent8ae3a91ad732ccb9 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } .buttontext13c01d781def3077 a{ border1px solid transparent; } .buttontext13c01d781def3077 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } Location: Bangalore, KA, IN, 560066 #job-location.job-location-inline {displayinline;} City: Bangalore State: KA Country/Region: IN Travel: 10% to 25% Requisition ID: 131811 Alternative Locations: Function: Engineering & Technology Job Segment Testing, Drafting, Electrical Engineering, Manufacturing Engineer, Front End, Technology, Engineering Apply now »

Apply now » .buttontext88d8dcea45dcd44d a{ border1px solid transparent; } .buttontext88d8dcea45dcd44d a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } R&D/PRODUCT DVL ENGINEER II At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world. Job Overview TE Connectivity’s R&D/Product Development Engineering Teams conceive original ideas for new products, introduce them into practice. PCB engineer is scalable to contribute individually. He/she is responsible for delivering the project from schematic scratch till the board get fabricated. Stackup analysis, routing strategy, placement feasibility is more important. R&D engineer should familiarize in manufacturing process and the different soldering process, IPC standards for SMT & PTH library footprint creation. Responsible for all the documentation related to the board design and fabrication data. Typical fields of expertise include Analysing different dielectric materials, knowledge on high-speed design constraint, electrical, software, automation systems, data packaging, testing and measurement, and manufacturing of electrical, mechanical and electronic components, products, and their integration into systems. Responsibilities: TE Connectivity is seeking an experienced candidate for high speed printed circuit board design. The candidate is expected to interface with US and China based engineering teams for input and independently work on printed circuit board layout while also providing guidance and direction to local designers. The position requires that the candidate be able to utilize generalized engineering direction to create detailed custom designs. The candidate will be responsible for ensuring the accuracy and functionality of the end design and be able to take ownership of various aspects of the PCB design. Programs may additionally include pre-layout analysis and coordination of global vendors for prototype fabrication and assembly. Candidate Desired Profile Candidate should have excellent verbal communication skills, a high attention to detail, be highly motivated, a quick learner, and be able to work independently. Understanding of printed circuit board design, manufacturing, and assembly is required. Experience with printed circuit board design is required. Experience in a senior technical or leadership role is required. Must be able to deliver the board design from scratch schematic to gerber release for manufacturing. Very good exposure in design software - Altium, Allegro, AutoCAD is must. Previous work experience in high-speed board designs will be highly preferred. Altium/Allegro tool scripting knowledge will be an added advantage for this role. Able to address supplier Engineering Queries. Familiarity with the following a plus: CAM350 High speed and/or RF circuits Signal integrity analysis Connectors and cable assemblies PCB manufacturing tolerances and cost drivers PDMLink process ECR/ECN release process Competency ValuesIntegrity, Accountability, Inclusion, Innovation, Teamwork ABOUT TE CONNECTIVITY TE Connectivity plc (NYSETEL) is a global industrial technology leader creating a safer, sustainable, productive, and connected future. Our broad range of connectivity and sensor solutions enable the distribution of power, signal and data to advance next-generation transportation, energy networks, automated factories, data centers, medical technology and more. With more than 85,000 employees, including 9,000 engineers, working alongside customers in approximately 130 countries, TE ensures that EVERY CONNECTION COUNTS. Learn more atwww.te.com and onLinkedIn , Facebook , WeChat, Instagram and X (formerly Twitter). WHAT TE CONNECTIVITY OFFERS: We are pleased to offer you an exciting total package that can also be flexibly adapted to changing life situations - the well-being of our employees is our top priority! Competitive Salary Package Performance-Based Bonus Plans Health and Wellness Incentives Employee Stock Purchase Program Community Outreach Programs / Charity Events Employee Resource Group IMPORTANT NOTICE REGARDING RECRUITMENT FRAUD TE Connectivity has become aware of fraudulent recruitment activities being conducted by individuals or organizations falsely claiming to represent TE Connectivity. Please be advised that TE Connectivity never requests payment or fees from job applicants at any stage of the recruitment process. All legitimate job openings are posted exclusively on our official careers website at te.com/careers, and all email communications from our recruitment team will come only from actual email addresses ending in @te.com . If you receive any suspicious communications, we strongly advise you not to engage or provide any personal information, and to report the incident to your local authorities. Across our global sites and business units, we put together packages of benefits that are either supported by TE itself or provided by external service providers. In principle, the benefits offered can vary from site to site. .videocomponent8ae3a91ad732ccb9 a{ border1px solid transparent; } .videocomponent8ae3a91ad732ccb9 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } .buttontext13c01d781def3077 a{ border1px solid transparent; } .buttontext13c01d781def3077 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } Location: Bangalore, KA, IN, 560066 #job-location.job-location-inline {displayinline;} City: Bangalore State: KA Country/Region: IN Travel: Less than 10% Requisition ID: 131824 Alternative Locations: Function: Engineering & Technology Job Segment R&D Engineer, Manufacturing Engineer, Testing, Engineer, Electrical, Engineering, Technology Apply now »

Apply now » .buttontext88d8dcea45dcd44d a{ border1px solid transparent; } .buttontext88d8dcea45dcd44d a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } Signal Integrity Engineer At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world. Job Overview TE Connectivity’s R&D/Product Development Engineering Teams conceive original ideas for new products, introduce them into practice. They are responsible for product development, and qualification from market definition through production and release; assist in the qualification of suppliers for new products to ensure suppliers deliver quality parts, materials, and services for new or improved manufacturing processes; conduct feasibility studies, testing on new and modified designs; direct and support detailed design, testing, prototype fabrication and manufacturing ramp. The R&D/Product Development Engineering Teams provide all required product documentation including, but not limited to, Solid Model, 2D/3D production drawings, product specifications, and testing requirements. They create and modify detailed drawings and drafting or conceptual models from layouts, rough sketches or notes and contribute to design modifications to facilitate manufacturing operation or quality of product. Typical fields of expertise includematerials, mechanics and systems, electrical, optics, chemistry, software, automation systems, packaging, testing and measurement, and manufacturing of electrical, mechanical and electronic components, products, and their integration into systems. Responsbilties: Drive SI design, simulation, and validation for next-gen high-speed interconnects (112G/224G PAM4, PCIe Gen6/7, Co-Packaged Optics) through the product development cycle. Conducting SI COE analysis, including o Performing signal integrity simulations and analysis for high-speed interconnect product development. This includes determining the correct simulation methodology and setup to use, as well as a good understanding of the criteria for each interface. o Modeling the connector with the consideration of manufacture impact and application impact. o Providing solutions to the SI challenges. This includes identifying the problems, making research plan, developing new technologies, and training and sharing the findings to the SI community. Develop novel interconnect solutions by optimizing mating interfaces, lead frames, and PCB transitions for resonance-free, low-loss performance. Enhance bulk cable design & termination techniques to minimize skew, impedance mismatches, and signal degradation. Advance high-frequency testing methodologies beyond 67 GHz with innovative non-PCB-based test fixtures. Utilize AI & big data analytics for predictive SI modeling, auto-routing, and performance optimization. Optimize material selection & electromagnetic design to improve noise isolation, signal integrity, and high-frequency response. Collaborate with NPD teams & industry partners to influence SI strategies, technology roadmaps, and next-gen product designs. Represent TE at industry forums (IEEE, OIF, PCI-SIG, etc.) and contribute to next-gen SI standards. Should have total work experience of 3-8+years. Minimum of 5+ years of work experience in a signal integrity engineering role or related experience Minimum of 3+ years of work experience in connector development - Experience with interconnect design or experience with connector &/or cable/cable assembly design (high speed twinax cables, direct attach copper (DAC) cables) Demonstrated experience using Signal integrity analysis tools (Agilent ADS, Ansys HFSS or equivalent, 3D modeling tools) and testing equipment (including VNA, TDR and BERT). A solid understanding of statistical analysis and AI training. A solid understanding of SI knowledge, including electromagnetic theory and electrical circuit behavior Strong analytical capabilities to interpret simulation and lab data to identify issues and provide solutions to fix identified problem. Familiarity with printed circuit board design, fabrication and assembly. Familiar with material, manufacturing process, and manufacture inspection. Familiar with at least one programming language, such as Matlab, python, C++, VB, etc. Excellent verbal and written communication skills Ability to work in a global environment – able to accommodate varying time zones, fluent in English (verbal/written), able to collaborate with individuals across geographies DESIRED SKILLS Printed circuit board design (proficient in Altium a PLUS), fabrication and assembly (AutoCAD) Communication systems (high-speed servers, switches, routers, storage) Signal conditioning techniques (equalization, amplification) SixSigma methodologies or other strong data analytics background a PLUS. Experience in project leadership, especially as it applies across design, development & manufacturing teams Direct customer design and support experience Application and test knowledge of high-speed devices and equalization techniques Design experience with high-speed servers, switches, routers, storage, antenna, RF front end or similar systems Competencies ValuesIntegrity, Accountability, Inclusion, Innovation, Teamwork .videocomponent8ae3a91ad732ccb9 a{ border1px solid transparent; } .videocomponent8ae3a91ad732ccb9 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } .buttontext13c01d781def3077 a{ border1px solid transparent; } .buttontext13c01d781def3077 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } Location: Bangalore, KA, IN, 560066 #job-location.job-location-inline {displayinline;} City: Bangalore State: KA Country/Region: IN Travel: 10% to 25% Requisition ID: 131812 Alternative Locations: Function: Engineering & Technology Job Segment Testing, Drafting, Manufacturing Engineer, Front End, CAD, Technology, Engineering Apply now »

7+ years experience Proficient in Allegro/OrCAD Proficient in communications signal integrity, impedance matching, speed up to 1GHz Proficient in PCB design standards Proficient in routing techniques Proficient in design for EMC compliance Proficient in PCB footprint creation, component placement, layer stack-up, design rules Good thermal and power integrity analysis Good electronics and schematics understanding Good knowledge of PCB manufacturing technologies, cost, and limitations Good troubleshooting ability Footprint, Routing, Pcb Layout Design, Allegro, Orcad, Pcb Design, Emc

Mettlesemi Systems and Technologies Pvt Ltd is looking for a passionate and experienced Signal and Power Integrity (SIPI) Engineer to join our dynamic team. This is a unique opportunity to work on cutting-edge semiconductor technologies and contribute to the optimization of highspeed interfaces and power delivery systems for leading clients in the industry. As a SIPI Engineer at Mettlesemi, you will play a critical role in the co-design of packages and PCBs, employing advanced simulation tools and methodologies to enhance system-level performance. If youhave a strong background in electromagnetics, signal integrity, and PDN analysis and a passion for innovation we d love to hear from you. Key Responsibilities: Perform SI/PI analysis for advanced packages and PCBs Optimize high-speed serial interfaces and PDNs Work with tools like Sigrity, HFSS, ADS, and more Collaborate with cross-functional teams and clients Present technical findings and propose actionable insights Location: Bangalore Experience: 4+ years Employment Type: Full-time Be part of our journey to redefine what s possible in secure and highspeed system design

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. The Power & Signal Integrity Group (PSIG) resides in the CHS (Central Hardware Systems) unit of Qualcomm Technologies, Inc., a leader in wireless communication technology. Engineers in the Power & Signal Integrity Group work with the various business units across Qualcomm to help bring leading edge mobile, AR\VR, IoT, Automotive and various others products to market. The candidate will work in a team-oriented environment with cross functional leads to provide electrical design expertise in the areas of signal integrity and power integrity for the design of wireless products and development systems. The engineer will be located in Bangalore, India and will be closely working with the Product architects, Platform HW teams, IO\PHY, IC Packaging, and other teams. The candidate is expected to perform SI / PI analyses and provide guidance on signal and power integrity challenges. Working effectively across organizational boundaries is essential as is the effective documentation and presentation of results. The candidate is expected to work closely with an experienced SI engineer while applying established PSIG methodologies. The engineer will have the opportunity to influence the evolution of analysis methodologies. Responsibilities Perform various IO analyses using established methodologies, potentially from model extraction through simulation and reporting of conclusions. IO types include DDR memory interfaces and variety of serial interfaces. Analyze and provide design guidance for DIE floor plans, IC packages, PCB power distribution networks using established methodologies. Document, distribute, and present results at appropriate meetings. 2+ years of work experience in the following areas: Electromagnetic theory and transmission lines Basic signal and power integrity concepts Commercial 3D electromagnetic field solver Commercial SI or RF simulation and analysis tools SPICE transient simulation including use of IBIS models The following experience is a plus: DDR and LPDDR design and analysis High speed serial IO design and analysis, PCIE, USB, UFS, CSI/DSI/MIPI Power Integrity analysis SI/PI tools :Ansys HFSS/SIwave, Cadence/Sigrity, Keysight ADS, HSPICE Spreadsheets and similar productivity tools Mentor or Cadence board design tools Education Requirements: Minimum Bachelor degree in Electrical Engineering or related discipline, Master degree preferred

Role & responsibilities As an Application Engineer, you will be performing signal integrity and power Integrity simulations on printed circuit layouts, packages. Responsible in optimizing the impedance discontinuities and implementing the cutout in PCB layout. Simulation and analysis must be performed, to verify whether the existing layout structure meets the customer loss budget. Preform layout reviews and ensure the SI, PI recommendations were implemented. Preferred candidate profile B.E/B.sc Electronics only freshers

"> Search Jobs Find Jobs For Where Search Jobs Manager - Signoff products ECO, PrimeClosure Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 10383 Remote Eligible No Date Posted 07/04/2025 We are looking for Manager to join Design Intent testing for our Signoff products E CO, PrimeClosure . This is an exciting opportunity to be part of engineering team to qualify tools with customer flows across the technology working closely with R&D, product engineers, field engineers and customers to solve complex technical challenges in the static timing analysis, design robustness, timing & power modeling, statistical analysis, ECO, extraction, and signal integrity analysis .. Through innovative techniques and ideas, you will help enable customers to accurately validate & use these features on their high-performance designs. Main responsibilities Mentor a team of engineers, set goals for the team, and drive for results. Will drive quality improvement effort by understanding customer design methodologies/flows and validating our tools to meet the required metrics before they are released to the customer. Perform in depth customer incoming root cause analysis to understand the product areas that need improvement and execute proactive testing to reduce customer issues by improving product quality. Identify opportunities to automate and find innovative solutions to improve productivity of teams. Work directly with R&D, Product Engineers, Field Engineers & customers to suggest improvements in Signoff and validation. Use in-depth product understanding to provide technical expertise , diagnose, troubleshoot issues. Key Qualifications The ideal candidate should have domain knowledge in timing, statistical analysis, front-end/back-end semiconductor manufacturing BSEE or equivalent, required with 10-12 years of experience , or MSEE. Synopsys tools like PrimeTime, Siliconsmart, NanoTime, PrimePower and Library Compiler experience is important, PD experience is a bonus. Exceptional debugging skills with good understanding of scripting languages. Experience with mentoring individuals is required. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!