Lead Design Verification Engineer (ASIC, SOC, IP)-Hyderabad & Bangalore

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Posted:1 week ago| Platform: Linkedin logo

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On-site

Job Type

Full Time

Job Description

Company Description:

MosChip® Technologies is a globally recognized leader specializing in Silicon and Product Engineering solutions with 1300+ engineers across Silicon Valley, USA, and India. The company offers comprehensive solutions, including silicon design, verification, software, systems engineering, AI/ML solution design, and test automation. Known for its innovation, MosChip® has developed and shipped millions of connectivity ICs and delivered over 200 SoC tape-outs with a first-time right success rate. The company is dedicated to advancing technology through cutting-edge engineering services and IP development, including Digital IPs, Verification IPs, and Mixed Signal IPs.


Role Description:

This is a full-time, on-site role for a Lead Design Verification Engineer in Hyderabad and Bangalore. The role involves performing design verification for SOCs, ASICs, and IPs, focused on on building SystemVerilog/UVM testbenches, creating verification plans, running RTL/gate-level simulations, driving coverage closure, and debugging issues for complex chips, ensuring functionality against specs, often involving protocols (PCIe, DDR) and hardware/software integration, using EDA tools for functional verification. They develop drivers, monitors, scoreboards, use constrained-random testing, and collaborate with design teams for sign-off.


Key Skills & Tools:

  • Languages:

     SystemVerilog (UVM/OVM/VMM), C/C++, HDL (Verilog/VHDL).
  • Methodology:

     UVM, Constrained Random Verification, Assertions, Coverage-driven verification.
  • Protocols:

     PCIe, DDR, AXI, MIPI, USB, Ethernet.
  • Tools:

     Synopsys, Cadence, Verdi, Python, Perl.
  • Concepts:

     Digital design fundamentals, RTL simulation, Formal Verification. 


Key Responsibilities:

Verification Planning:

Testbench Development:

Functional Verification:

Coverage Closure:

Debugging:

Protocol Verification

Automation & Scripting:

Hardware/Software Co-Verification:

RAL Implementation (Implied):






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