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Incise Infotech - Static Timing Analysis Engineer - VLSI

0 years

0 Lacs

noida uttar pradesh india

Posted:1 day ago| Platform: Linkedin logo

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Skills Required

timing analysis design development verification technology analyze synthesis drive constraints automate efficiency support power signal writing debugging tcl scripting automation reports communication

Work Mode

On-site

Job Type

Full Time

Job Description

Immediate Joiners Preferred

About the Role :

Incise Infotech Limited is expanding its VLSI Design team and is looking for skilled Static Timing Analysis (STA) Engineers to contribute to high-performance chip design projects.This role is ideal for engineers passionate about full-chip timing closure, constraint development, and timing verification in advanced technology nodes.

Key Responsibilities

  • Perform Static Timing Analysis at both block and full-chip levels using industry-standard tools such as PrimeTime or Tempus
  • Analyze and debug setup, hold, transition, and other timing violations
  • Work closely with RTL, Synthesis, and Physical Design (PD) teams to drive timing closure
  • Develop, validate, and manage SDC constraints for various design stages
  • Ensure timing sign-off readiness by generating and reviewing timing reports
  • Innovate and automate STA flows for improving efficiency and quality of results
  • Collaborate with design teams to support tape-out schedules and quality metrics
  • Perform PPA (Power, Performance, Area) analysis and support ECO timing closure
  • Support multiple projects by providing STA inputs during design reviews

Required Skillsets

  • Hands-on experience in STA tools like PrimeTime, Tempus, etc.
  • Strong understanding of timing concepts, clock domains, and signal integrity
  • Expertise in writing and debugging SDC constraints
  • Solid knowledge of CMOS, VLSI design flows, and timing closure methodologies
  • Proficient in TCL scripting and automation of STA reports and flows
  • Familiarity with synthesis, floorplanning, and physical design interactions
  • Experience with advanced technology nodes (e.g., 7nm, 16nm, 28nm) is a plus
  • Good communication and problem-solving skills
  • Ability to work independently and collaboratively in a fast-paced environment
(ref:hirist.tech)

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