331 Design Verification Jobs - Page 2

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm Graphics HW team in Bangalore is responsible for developing and delivering GPU solutions which are setting the power and performance benchmark in mobile computing industry. In this role of Graphics Verification Engineer, you will be verifying the Clock and power management module with design features for low power. The responsibilities will majorly include: Understanding of GPU power and clock domains with power-up/down sequences Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging simulations and achieving all coverage goals Develop test plan to verify sequences and design components for Clock and power management modules. Explore innovative DV methodologies (formal and simulation ) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications Minimum 3 -13 years of design verification experience* Senior positions to be offered to candidates with proven expertise in the relevant field Preferred Qualifications * 3+ years industry experience with below skillset : Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Basic understanding of low power design techniques Good understanding of design components such as clock gates, level shifters, isolation cells and state retention cells. Experience with Synopsys NLP (native Low Power) tool. Experience with scripting languages such as Perl, Python is a plus Education BE/BTech/ME/MTech/MS Electrical Engineering and/or Electronics, VLSI from reputed university preferably with distinction

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary Join Qualcomms cutting-edge hardware engineering team to drive the design verification of next-generation SoCs, with a focus on wireless technologies including WLAN (IEEE 802.11). You will work on IP and subsystem-level verification, collaborating with cross-functional teams to deliver high-performance, low-power silicon solutions. A strong understanding of on-chip buses and bridges is essential to ensure seamless integration and performance across subsystems. Key Responsibilities Develop and execute verification plans for complex SoC designs and IP blocks. Architect and implement testbenches using SystemVerilog and UVM/OVM methodologies. Perform RTL verification, simulation, and debugging. Collaborate with design, architecture, and software teams to ensure functional correctness. Contribute to IP design reviews and sign-off processes. Support post-silicon validation and bring-up activities. Analyze and verify interconnects, buses (e.g., AMBA AXI/AHB/APB), and bridges for performance and protocol compliance. Conduct CPU subsystem verification including coherency, cache behavior, and interrupt handling. Perform power-aware verification using UPF/CPF and validate low-power design intent. Execute performance verification to ensure bandwidth, latency, and throughput targets are met. Preferred Skills & Experience 2"“15 years of experience in digital design and verification. Deep understanding of bus protocols and bridge logic, including hands-on experience with AXI, AHB, and APB. Experience with CPU subsystem verification and performance modeling. Familiarity with wireless protocols (IEEE 802.11 a/b/g/n/ac/ax/be) is a plus. Proficiency in SystemVerilog, UVM/OVM, Verilog, and scripting languages (Perl, Tcl, Python). Experience with power-aware verification methodologies and tools (e.g., UPF, CPF). Familiarity with performance verification techniques and metrics. Exposure to tools like Clearcase/Perforce and simulation/debug environments. Strong analytical, debugging, and communication skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications Bachelors or Masters degree in Electrical/Electronics Engineering, Computer Science, or related field. Relevant experience in hardware design and verification.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job AreaHardware Engineering (Verification) QCT's Bangalore Wireless R&D Bluetooth HW team is looking for experienced Wireless HW design verification engineers to work on Qualcomms best in class chipsets for mobile phones, wearables and IOT. Candidate will be working with ASIC designs on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI Verification cycle like Testbench architecture, Verification Planning, Testbench and Test development, Verification closure with best-in-class methodologies including simulation, emulation, GLS and Formal techniques. The role also requires deep understanding of the Bluetooth Hardware Architecture. Candidate will require close interactions with Global Design, Systems, SoC, Validation and FW teams for design convergence and required to work with minimal supervision. Candidate must be able to take ownership of IP/Block/Sub-System verification. Incumbent will be analyzing HW design spec and develop a verification test plan/strategy for it, breaking down the work for new features, perform feasibility studies, estimate effort and mitigate risk. The role also required the candidate to mentor new joiners and less experienced colleagues. The candidate will work with design team on RTL debug during Pre-silicon HW development phase. Skills/Experience 6-10 years of strong experience in design verification Strong knowledge of HDLs like Verilog, System Verilog Proven experience of writing efficient constraint random tests Proven experience of building or maintaining a medium to complex SV/UVM environments Strong debugging and analytical skills and independent problem solving ability Proficient in debugging RTL/TB issues using Verdi or similar tools Demonstrate good judgment in selecting methods and techniques for obtaining solutions Strong communication skills, both written and verbal, with ability to evaluate and create testplans detailing complex features and relationships Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communications or related field Minimum Qualifications Bachelors Degree in Engineering in Electronics, VLSI, Communications or related field 6 years of VLSI industry experience in verification Preferred Qualifications Exposure to Bluetooth/BLE Technologies Knowledge on scripting languages such as Perl and(or) Python Skills: Functional Verification, Functional/Code Coverage, SystemVerilog Assertions, Universal Verification Methodology (UVM), Verification IP (VIP) Integration, SoC Integration, Formal checks Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary: Bachelors /Masters degree in Engineering Relevant experience of 2-12 yrs in any of the mentioned domain - Design/Verification/ Implementation Will be working on cutting-edge Wireless Technology (IEEE 802.11) team. Strong fundamentals in core areasMicroarchitecture, Computer Arithmetic, Circuit Design, Process Technology Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Design You will be responsible for developing HW blocks (IP design), conduct High/Mid/Low level Design review and delivery IP to Subsystem team for making complex SoCs. You will be a critical part of the WLAN subsystem, contribute to IP design, sign-off the core to the SOC design team. Strong communication skills to work with design teams worldwide Verification Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C As a design verification engineer you will work on developing IPs catering to upcoming Wifi standards like 802.11bn and beyond. You will have opportunity to contribute to the life cycle of the technology right from IP specification, till productization/customer deployments, leveraging your verification, pre and post silicon debug expertise. Implementation Candidate will be responsible for next generation WLAN hardmacro implementation Extensive experience in Synthesis (DC or Genus), Formal Verification (LEC / Formality), Conformal Low Power, PTPX, Primetime, Conformal ECO Extensive experience in UPF based power intent and synthesis

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Working experience (2+ years) in preferably Memory design Compiler approach of developing embedded SRAM/ROM development Fundamental know how on bit cell and its characteristics (SNM, WM, Cell current, Standby current, data retention) Fundamentals of process variability and its effect on memory design Strong understanding of Digital/Memory circuit design/layouts Critical path modeling concept, various type of models ( RC, C, Pai, ladder, distributive, etc) Good knowledge of semiconductor physics in general. Knowledge of and affinity to IC technology and IP design is mandatory

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a DV Engineer with a focus on SOC design verification, you will work to understand the internal requirements and complexities of our highly complex auto, compute, mobile, XR-VR, IoT SOCs and architect the required verification strategy. You will help set up methodologies, develop test plans, and verify that the design meets the highest quality standards. We believe in early involvement of DV, so you will also participate in architecture/product definition through early involvement in the product life-cycle. Preferred qualifications B.E/B.Tech/M.E/M.Tech in Electronics with 5+ year experience in verification domain. Strong fundamentals in digital ASIC verification Experience in IP/SS/SoC level verification of medium to high complexity design Familiarity with system level HW and SW Debug techniques and Verification requirements A good understanding of the complete verification life cycle (test plan, testbench through coverage closure) Strong System Verilog/UVM based verification skills & Experience with Assertion & coverage-based verification methodology Experience w/ PSS or higher-level test construction languages is an added advantage Working knowledge of Interconnect architecture and Bus protocols like AMBA - ACE/CHI/AXI Good understanding of low power design techniques Proficient with low power SoC design constructs such as clock gates, level shifters, isolation cells and state retention cells. Experience with UPF/CPF based power aware verification. Working knowledge of GLS , PAGLS and scripting languages such as Perl, Python is a plus Prior work on NoC/Interconnects end to end verification with solid understanding on to Bus protocols, Coherency, Performance, Latency, clock gating etc. Knowledge of one or more of Multimedia design blocks such as Display/Camera/Video/GFx Knowledge of one or more of peripheral blocks verification such as PCIe/USB/UFS/I3C Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.Roles and Responsibilities Define verification architecture, develop test plans and build verification environment Work with design team to understand design intent and bring up verification plans and schedules Verify Subsystems and Full SoC using advanced verification methodologies Build agents and checkers from scratch. Perform and write test plan from design architecture specs and/or protocol standard Develop test plan to verify all low power aspects across all modes of verification- RTL, PA-RTL, PA-GLS and Formal Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging UPF and RTL and achieving all coverage goals Assist in silicon bring-up, debug and bring-up activities Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Responsibilities: Define pre-silicon testplans based on design specs and using applicable standards working closely with design team. Architect and develop the testbench using advanced verification methodology such as SystemVerilog/UVM, Low power verification, Formal verification and Gate level simulation to ensure high design quality. Author assertions in SVA, develop testcases, coverage models, debug and ensure coverage closure. Work with digital design, modeling, controller/subsystem, & SoC integration teams to complete the successful PHY level verification, integration into subsystem and SoC, and post-silicon validation. Minimum Qualifications: Master's/Bachelors degree in Electrical Engineering, Computer Engineering, or related field. 8+ years ASIC design verification, or related work experience. Knowledge of a HVL methodology like SystemVerilog/UVM. Experience working with various ASIC simulation/formal tools such as VCS, Xcellium/NCsim, Modelsim/Questa, VCFormal, Jaspergold, 0In and others. Preferred Qualifications: Experience with Low power design verification, Formal verification and Gate level simulation. Knowledge of standard protocols such as PCIe, USB, MIPI, LPDDR, etc., Experience in scripting languages (Python, or Perl). Experience with SerDes IP verification, mixed-signal IP design verification, such as USB, PCIe, CXL, C2C, D2D, MIPI, UFS, DDR, PLL, Data Convertors (DAC, ADC), or sensors.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Overview Qualcomm WLAN HW team in Bangalore is responsible for developing and delivering best in class WLAN/WiFi solutions which are setting benchmark in wireless industry. In this role of WLAN Verification Engineer, you will be verifying the PHY Sub-System from both TX and RX perspective. The responsibilities will majorly include : Understanding of WLAN PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems Develop test plan to verify WiFi Standards including 11BE, sequences and design components. Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills . 3+ years industry experience with below skillset Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Good understanding of WiFi Standards is a plus Experience with GLS, and scripting languages such as Perl, Python is a plus Education BE/BTech/ME/MTech/MS Communication Engineering and/or Electronics, VLSI from reputed university preferably with distinction Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Minimum 4 to 6 years of work experience in ASIC RTL Design Experience in Logic design/micro-architecture/RTL coding is a must. Must have hands on experience with design and integration of complex multi clock domain blocks Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architecture Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Understanding of Automotive System Designs, Functional Safety, Memory controller designs and microprocessors is an added advantage Work closely with the Design verification and validation teams for pre/post Silicon debug Hands on experience in Low power design is preferable Experience in Synthesis / Understanding of timing concepts for ASIC is must

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Additional Additional Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. Preferred Qualifications: 10 years of experience Strong understanding of CAD/EDA tools and methodologies. Strong experience scripting (Python, Perl) in support of design verification Hands on experience with regression systems, CI/CD, Revision Control System (git, perforce) workflow. Strong fundamentals in digital design verification methodologies and EDA tools. Knowledge of SOC architecture Experience with web programming (javascript, etc) and databases. Principal Duties and Responsibilities: Develop and implement advanced CAD flows and methodologies to verify critical high performance and low power CPU designs. Utilize scripting languages (python) to automate CAD/IT processes and increase efficiency. Collaborate with cross-functional teams to ensure successful integration of CAD flows. Stay up-to-date with cutting-edge technology, conduct thorough analysis of CAD tools and make improvements. Work closely with users to troubleshoot and resolve any issues that arise in tools, flows, environment, and infrastructure. Collaborate with external vendors to ensure timely delivery, integration, and deployment of CAD/EDA tools while driving them to improve efficiency and productivity. Define and implement new infrastructure capabilities that can be used to accelerate design and development. Level of Responsibility: Works independently with minimal supervision. Work with chip leads in support of design verification. Collaborate with chip leads to understand the design methodology. high-level requirements, determine other areas to support current or future designs that can benefit from automation and tooling. Provides supervision/guidance to other team members. Decision-making is significant in nature and affects work beyond immediate work group. Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc. Has a moderate amount of influence over key organizational decisions. Tasks do not have defined steps; planning, problem-solving, and pri

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Overview We are looking to hire a strong DV engineer to work on verification of LPDDR/DDR based IPs and Subsystems in the Infra IP team Create DV infrastructure for verification Integrate VIP's Create and execute test plans, debug failures, write assertions, close code and functional coverage Ensure high quality verification Working with all stakeholders to ensure program success Minimum Qualifications Bachelor's degree in Engineering, Electronics, Information Systems, Computer Science, or related field. 4+ years Hardware Engineering experience or related work experience. Preferred Qualifications Following skill set is required: Strong Debug, UVM, System Verilog Understanding Specs and Standards and developing relevant test plans Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening Preferred Qualifications 4+ Year of industry experiences in the following areas- Thorough understanding of Digital design concepts Thorough understanding dv methodologies and tools Good understanding of DDR/LPDDR families (LP/PC) and generations (DDR2/3/4/5) Understanding of Bus protocols like AHB/AXI/ACE/ACE-Lite Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. BE/BTech degree in CS/EE with 3+ years experience.o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred : o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Skills/Experience : 2-5 years of strong experience in digital front end ASIC design verification Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communications or related field. We are looking for a highly motivated and talented RTL verification engineer to join our team to work on the next generation complex cores used in High End Modem/Mobile chips. In this role, a successful incumbent would- Develop verification environment and testbench components such as BFM and checkers. Develop comprehensive test plan for unit level verification of IP/Module features and implement test cases. Verify design in unit level environment using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification. Write functional cover-groups and cover-points for coverage closure. Perform RTL code coverage, assertion coverage, functional coverage and gate level simulations. Have expertise in verifying designs at system level and block level using constrained random verification. Operate at Expert level in System Verilog and UVM based verification. Expertise in coding SV Testbench, drivers, monitors, scoreboards, checkers - Strong and independent design debugging capability. Understanding of AHB, AXI and other bus protocols, digital design and system architecture - Understanding of TCP/IP Packet Processing Algorithms like Filtering, Routing, NAT, Decipher, Checksum, Ethernet Bridging, Tunneling is a Plus. Should possess good communication skills to ensure effective interaction with Engineering Management and team members. Should be self-motivated with good teamwork attitude and need to function with minimal guidance or supervision Responsibilities : Work in close coordination with Systems, Design, SoC team , SW team, Validation & DFT teams to get the goals completed. Developing the Verification Strategy, Testbench architecture and implementing the design verification plan and tests using SV/UVM/C. HW verification using Cadence and Synopsys simulator tools, SV/UVM based TB development, Regression analysis, bug-triage. Formal Verification using Jasper, VCF etc. Power Aware Verification on RTL and DC/PD Gate lebel Netlist. Conducting High-/Mid-/Low- level verification reviews, coverage closure and sign-off on block and Sub-system testing. Assisting SOC team with IP Integration testing at SOC level. Post-Silicon Debugs in close collaboration with Design, Validation and SW teams. Self-Motivated to Execute the defined tasks almost independently with minimal guidance Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for an experience Verification Staff/Architect Engineer, who will be responsible Verification of next generation Infrastructure IPs (DDRSS, Memory Controllers etc.) which goes into System-on-chip (SoC) for smartphones, tablets and other product categories. In this position you will be expected to plan and implement IP/Cluster/Formal verification flows for the Infra IPs. Also expected to coordinate with different Design and SOC teams throughout the IP development cycle. Job responsibilities include Ownership of DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage) Develop test plan and test cases to cover design feature set, follow up with stake holders on code coverage, functional coverage closure at different levels of test bench Work closely with System Architects, Design, emulation teams on failure debugs, code/functional coverage closure Debug of regression signatures and identifying bug fixes Responsible for Quality sign off and required documentation Developing/Deploying scripts/tools for validation (Certitude, VC Formal, VPlan) Debug and root cause post silicon issues in collaboration with Design, SW and test teams Work with SoC level performance modeling team on latency, bandwidth analysis " Required skillset include Strong debugging, Analytical and problem-solving skills Expertise on UVM based verification Knowledgeable about ARM bus protocols, Virtual Memory concepts, SoC system architecture Experience in developing Monitors, Scoreboards, Sequencers that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Communication and collaboration skills to work with a large world-wide design organization " Desired skillset includes Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse Experience in verifying designs meeting Automotive Safety Integrity Levels (ASIL) Proficiency in Scripting languages (Python or Perl) for Automation initiatives, C/C++/SystemC for performance models Post-si bring-up and HW-SW debug experience would be a plus. Knowledge & exposure to silicon debug tool chains would be an added advantage Qualification : Bachelor/Masters Degree in Electronics & Communication / Micro Electronics 9 -12 years of experience Experience with UVM and ARM Bus protocols. tor, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a DV Engineer with a focus on SOC design verification, you will work to understand the internal requirements and complexities of our highly complex auto, compute, mobile, XR-VR, IoT SOCs and architect the required verification strategy. You will help set up methodologies, develop test plans, and verify that the design meets the highest quality standards. We believe in early involvement of DV, so you will also participate in architecture/product definition through early involvement in the product life-cycle. Preferred qualifications B.E/B.Tech/M.E/M.Tech in Electronics with 5+ year experience in verification domain. Strong fundamentals in digital ASIC verification Experience in IP/SS/SoC level verification of medium to high complexity design Familiarity with system level HW and SW Debug techniques and Verification requirements A good understanding of the complete verification life cycle (test plan, testbench through coverage closure) Strong System Verilog/UVM based verification skills & Experience with Assertion & coverage-based verification methodology Experience w/ PSS or higher-level test construction languages is an added advantage Working knowledge of Interconnect architecture and Bus protocols like AMBA - ACE/CHI/AXI Good understanding of low power design techniques Proficient with low power SoC design constructs such as clock gates, level shifters, isolation cells and state retention cells. Experience with UPF/CPF based power aware verification. Working knowledge of GLS , PAGLS and scripting languages such as Perl, Python is a plus Prior work on NoC/Interconnects end to end verification with solid understanding on to Bus protocols, Coherency, Performance, Latency, clock gating etc. Knowledge of one or more of Multimedia design blocks such as Display/Camera/Video/GFx Knowledge of one or more of peripheral blocks verification such as PCIe/USB/UFS/I3C Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Roles and Responsibilities Define verification architecture, develop test plans and build verification environment Work with design team to understand design intent and bring up verification plans and schedules Verify Subsystems and Full SoC using advanced verification methodologies Build agents and checkers from scratch. Perform and write test plan from design architecture specs and/or protocol standard Develop test plan to verify all low power aspects across all modes of verification- RTL, PA-RTL, PA-GLS and Formal Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging UPF and RTL and achieving all coverage goals Assist in silicon bring-up, debug and bring-up activities

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: GPU Verification Engineer ------ Selected candidates will be part of the GPU HW team which is passionate about developing and delivering the best GPU Cores for all Qualcomm Snapdragon SOC products. Qualcomm GPU is an industry-leading solution which is driving the benchmarks in mobile computing industry and the future of mobile AR/VR. The overall GPU pre-Si verification team in Bangalore is currently heavily involved in the following Formal verification- Block level property based FV sign-off UVM/SV based constrained random test bench for functional verification Subsystem level TB for complete GPU workload analysis and compliance Emulation platforms to analyze performance and pipeline bottlenecks Power Aware & Gate level simulations to deliver a high-quality GPU implementation Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug triage. In the role of GPU Formal Verification Engineer , your project responsibilities will include the following, Develop high quality formal verification test benches to verify complex designs in GPU. It will involve creating & owning the test plan, test bench, performing debugs , deep bug hunting using formal tools and developing sign off quality testbenches and ensuring coverage closure & convergence metrics Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality Collaborate with worldwide architecture, design, and systems teams to achieve all project goals Currently, we are looking for candidates who can match one or more of the profiles listed below, Strong knowledge of Formal Property Verification & Assertion Based Verification, Formal Test planning and coverage analysis, Formal sign off & proof convergence strategies Hands-on experience with industry standard formal tools, such as JasperGold, VCFormal or Questa Formal Strong System Verilog Assertions knowledge, proficiency in Verilog, and scripting (Python, Perl, Tcl) is required Knowledge of GPU pipeline design is a plus, not mandatory Understanding of equivalence based methodologies such as DPV and SEQ is desired Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver Experience Minimum 5 years of Design verification experience Senior positions will be offered to candidates with suitable years of experience and proven expertise matching the profiles listed above Education BE/ME/M.Sc. in Electrical, Electronics, VLSI, Microelectronics, or equivalent courses from reputed universities Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle. Roles And Responsibilities Performance exploration. Explore high performance strategies working with the CPU modeling team. Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. Functional verification support. Help the design verification team execute on the functional verification strategy. Performance verification support. Help verify that the RTL design meets the performance goals. Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and po Preferred Qualifications Thorough knowledge of microprocessor architecture including expertise in one or more of the following areasinstruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools Knowledge of logic design principles along with timing and power implications Understanding of low power microarchitecture techniques Understanding of high performance techniques and trade-offs in a CPU microarchitecture Experience using a scripting language such as Perl or Python Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. Preferred Qualifications: Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 15+ years of Hardware Engineering or related work experience. 4+ years of experience with circuit/logic design/validation (e.g., digital, analog, RF). 4+ years of experience utilizing schematic capture and circuit stimulation software. 4+ years of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. 4+ years in a technical leadership role with or without direct reports. Principal Duties and Responsibilities: Leverages expert Hardware knowledge and experience to plan, optimize, verify, and test highly critical electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Drives the development of design rules and processes for electronic hardware, equipment, and/or integrated circuitry. Serves as an expert resource for conducting highly complex simulations and analyses of designs as well as for the implementation of designs with the best power, performance, and area. Collaborates with high-level representatives across functions (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement and drive new requirements and the latest test solutions in the production program to improve the yield, test time, and quality. Evaluates, characterizes, and develops the novel manufacturing solutions for leading edge products in highly advanced processes and bring-up product to meet customer expectations and schedules. Serves as an expert resource for the evaluation of reliability for highly critical materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Advises multiple teams of engineers in the development of complex hardware designs, evaluating various design features to identify potential flaws or issues. Writes detailed technical documentation for highly complex Hardware projects; reviews technical documentation for experienced engineers. Level of Responsibility: Provides supervision to direct reports. Decision-making is critical in nature and highly impacts program, product, or project success. Requires verbal and written communication skills to convey highly complex and/or detailed information. May require strong negotiation and influence with large groups or high-level constituents. Works within the prescribed budgetary objectives of the department. Has a great degree of influence over key organizational decisions. Tasks often require multiple steps which can be performed in various orders; extensive planning, problem-solving, and prioritization must occur to complete the tasks effectively.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Expertise in AMBA protocols (CHI/AXI/AHB) Excellent analytical skills, should have an experience of leading a team of 7-8 engineers Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Handson experience of GLS and timing simulations Exposure to Formal verification Self-driven and motivated to work in a high pressure environment Good at stakeholder management with good communication skills Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Details: Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's degree in electrical engineering or computer engineering with 4 to 9 years of experience or a master's degree in electrical engineering or computer engineering. 3+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Building emulation models, enabling content Monitoring and improve existing simulation environments and simulation efficiency. Experience with Debugging and ACM domain will be a plus. Job TypeExperienced Hire ShiftShift 1 (India) Primary Location India, Bangalore Additional Locations Business groupThe Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Verification and Validation R&D Primary responsibilities: Represent the Design Quality function on device development project teams and cross functional co-ordination with multiple departments including R&D, Quality Control, Manufacturing and Regulatory Affairs. Ensure that device development projects and changes to existing devices are conducted in compliance with the FDA 21CFR Part 820 Quality System Regulation, ISO 13485 Regulations, and other applicable standards like ISO 14971. Provide input to design and manufacturing documentation including material specifications, drawings, inspection procedures, and manufacturing procedures, to ensure that the resulting devices can be adequately manufactured and verified. Lead or support design activities including design verification, validation, test procedure development, usability engineering, and risk management. Generate or apply statistical methods with appropriate risk-based justification. Hands-on experience in Design History File compilation / Technical file documentation. Support internal and external inspections/ regulatory audits. Promote continuous improvement in design control activities and use of quality tools with design team. In-depth knowledge and understanding of 21 CFR Part 820 Quality System Regulation, ISO 13485 Quality Standard, 21 CFR 4 Regulation of Combination Products, 14971 Risk Management Standard, MDD, MDR, IEC/EN 62366 Application of Usability Engineering to Medical Devices, and ANSI HE75 Human Factors Engineering in Design of Medical Devices Secondary responsibilities (Wherever applicable): Experience interacting with regulatory agencies and notified bodies Experience with process improvements, process qualification and validation. Experience in complaint investigation, corrective action and preventive action system, statistical methods, quality risk management and Post Market Surveillance.

Role & responsibilities Job description We are seeking a detail-oriented hardware design engineer for design and development activities of our product line (SMPS/Chargers etc). The following would be the main responsibilities: 1. Hands on Experience on, SMPS & Chargers. 2. Knowledge of Power electronics. 3. Hands on Experience in circuit design, simulation, filter design, schematic & Layout, Micorcontroller based designs, UART/RS232/RS485/CAN/ LIN communication, DFMEA. 5. Hands on experience in validation jig designing using arduino. 6. Knowledge of transformers and inductors calculation, Thermal calculations and components selections/design, BOM preparation. 7. Knowledge of power switching topologies. like fkyback, LLC, PFc topologies. 8. Special Preference who has experience in, Inverters design & charger designing etc.. 9. Hands on Experience in Design Verification and Product Validation. 10. Good understanding on EMI/EMC, ESD testing. 11. Resolve issues in mass production of the design and manufacturing assembly line. 12. Go-Getter, Self Learner, Positive Attitude Preferred candidate profile Only Male Candidate, Willing to work in 6 days working setup. Perks and benefits Insurance,Bouns ,PF

Technical knowledge Design of sensor/ transducer interface and signal conditioning circuits, motor control driver circuits, DC- DC converters, selection of micro controllers as per system requirement, micro controller interface design etc., Development of analog and microcontroller-based control modules and systems. Design verification and testing for conformance to EMI/ EMC and various regulatory standards Design of analog/ digital and mixed circuit design, circuit simulation and analysis needed for development of control and display board for laboratory and industrial machine control. Should have executed similar development tasks right from initial conceptual stage through system engineering till prototype verification and acceptance. Knowledge of statutory testing and verification of the product through testing and evaluation such as CE compliance and similar standards. Preparation of test plans, specifications document, preparing and maintaining project schedules are part of essential qualifications. Knowledge of DFMECA, reliability prediction and design verification and standardization preferred. Leadership Must be technically sound. Guiding a team of young hardware engineers to achieve the goal. Ability to identify and source the right controllers and components for reliable and cost effective design which will meet customer requirement. Good at Planning and execution and estimation various task involved in electronic product/ module development. Ability to plan the infrastructure such as setting of testing lab including test instruments needed. Ability to make good technical proposal Ability of sustain team spirit. Design knowledge to take care of EMI/ EMC and other regulatory requirement as per industrial and automotive standards. Setting up a good design process by preparing and maintaining design guidelines and checklists.

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Understand the design specification , Memory and Memory BIST engine connections Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 + years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in DFT Verification - Demonstrated execution experience of verification of Memory BIST Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Hardware debug skills backed by relevant experience on projects Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , etc Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

Expertise in logic synthesis, conformal, static timing analysis and Place and Route (PnR) Hands on experience in all aspects of the chip development process Experience in creating or improving low power synthesis methodologies Experience with scripting languages like Perl, Tcl or Python Floorplan, Place and Route at block level, physical design verification, LVS, DRC, IR drop analysis; netlist to gds at block level RTL logic design or implementation experience on multi-million gate ASICs will be a plus Strong communication skills to effectively communicate across all internal groups Description: As a synthesis, PnR Engineer, you will have responsibilities spanning various aspects of SOC design and implementation. Responsible for activities like Synthesis, LEC, Conformal, P&R etc. You will be working closely on methodology for improving synthesis QOR. Responsible for floor planning, placement and routing at block level. Will need to work closely with other engineers that are members of the RTL, STA and Physical Design teams. Education & Experience: BS or MS in EE, EECS, or CS is required 4+ years relevant work experience

Expertise in logic synthesis, conformal, static timing analysis and Place and Route (PnR) Hands on experience in all aspects of the chip development process Experience in creating or improving low power synthesis methodologies Experience with scripting languages like Perl, Tcl or Python Floorplan, Place and Route at block level, physical design verification, LVS, DRC, IR drop analysis; netlist to gds at block level RTL logic design or implementation experience on multi-million gate ASICs will be a plus Strong communication skills to effectively communicate across all internal groups Description: As a synthesis, PnR Engineer, you will have responsibilities spanning various aspects of SOC design and implementation. Responsible for activities like Synthesis, LEC, Conformal, P&R etc. You will be working closely on methodology for improving synthesis QOR. Responsible for floor planning, placement and routing at block level. Will need to work closely with other engineers that are members of the RTL, STA and Physical Design teams. Education & Experience: BS or MS in EE, EECS, or CS is required 4+ years relevant work experience