407 Design Verification Jobs - Page 4

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Digital Verification Engineer for IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create job s, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in. Digital Verification Engineer for for Mixed-Signals IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions. IPs include telemetry ADCs, 100W+ charging (Quick Charge 5.0), 5G power (mmW, envelope tracking, high performance low noise oscillators etc") and high efficiency power management (DC-DC charge pumps, bucks and linear regulators). * Work includes partnering with international teams in all stages of development from system definition to high-volume (100M+) OEM launches. * Digital Verification aspects include all stages of the verification process from test planning, UVM-compliant test-bench architecture, constrained-random stimulus creation, score-boarding and coverage closure. * Work includes verification of digital and mixed-signals IPs and exposure to analog behavioral models is a plus. * Work includes debugging of complex embedded systems including SOCs, firmware, embedded sequencers. * Position includes IP or chip DV ownership including task planning and project risk mitigation. * Work in a dynamic team environment with aggressive schedule towards metrics-based high quality target. Preferred Qualifications Strong troubleshooting skills across embedded systems disciplines (digital RTL, Firmware, analog behavioral models) Strong communication and organizational skills Strong process-oriented mindset. Expert-level System Verilog Programming Advanced UVM/SV (Universal Verification Methodology using System Verilog) Python or Perl scripting Minimum Qualifications Bachelor's degree in Science, Engineering, or related field. 8+ years ASIC design, verification, or related work experience Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: QCT's Bangalore Wireless R&D (WRD) HW team in Bangalore is looking for experienced Wireless HW design verification engineers to work on Qualcomms best in class chipsets for mobile phones, wearables and IOT . Candidate will be working with ASIC designs on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI Verification cycle like Testbench architecture, Verification Planning, Testbench and Test development, Verification closure with best-in-class methodologies. In this role of WRD Verification Engineer, you will be verifying Wifi and/or Modem from both TX and RX perspective. The responsibilities will majorly include : Understanding of Wireless systems PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems. Own complete IP/Block/SS level DV. Own end to end DV tasks from design analysis, Verification Plan development , Coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals. Explore innovative DV methodologies (formal, simulation and emulation based) to continuously improve the quality and efficiency of test benches. Successful candidate will be required to collaborate with worldwide design, architecture teams and other stake holder to achieve all project goals. Hence, strong communication skills are a must. Skills/Experience: 2-10 years of strong experience in design verification Strong knowledge of System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Proven experience of building or maintaining a medium to complex SV/UVM environments Proven experience of writing efficient constraint random tests Prior Experience in verifying WIFI, Modem PHY layer is a strongly desirable. Strong debugging and analytical skills and independent problem-solving ability Proficient in debugging RTL/TB issues using Verdi or similar tools Experience in formal / static verification methodologies will be a plus Good understanding of Wireless protocols, Modem/Wifi Standards is a plus Experience with Power Aware verification, GLS, and scripting languages such as Perl, Python is a plus. Experience in formal / static verification methodologies will be a plus Preferred Qualifications: Understanding of Wireless protocols, Modem/Wifi Standards Experience in IP verification of DSP related HW blocks. Knowledge on scripting languages such as Perl and(or) Python Education Requirements BE/BTech/ME/MTech/MS Communication Engineering and/or Electronics, VLSI , from reputed university preferably with distinction Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Overview We are looking to hire a strong DV engineer to work on verification of LPDDR/DDR based IPs and Subsystems in the Infra IP team Create DV infrastructure for verification Integrate VIP's Create and execute test plans, debug failures, write assertions, close code and functional coverage Ensure high quality verification Working with all stakeholders to ensure program success Minimum Qualifications Bachelor's degree in Engineering, Electronics, Information Systems, Computer Science, or related field. 4+ years Hardware Engineering experience or related work experience. Preferred Qualifications Following skill set is required: Strong Debug, UVM, System Verilog Understanding Specs and Standards and developing relevant test plans Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening Preferred Qualifications 4+ Year of industry experiences in the following areas- Thorough understanding of Digital design concepts Thorough understanding dv methodologies and tools Good understanding of DDR/LPDDR families (LP/PC) and generations (DDR2/3/4/5) Understanding of Bus protocols like AHB/AXI/ACE/ACE-Lite Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Exp : 3- 5 Yrs Position : Senior or Lead Expertise : Power fundamentals Good knowledge of PTPX Good knowledge of CLP Knowledge of design verification, RTL coding, synthesis, and physical design Protocol knowledge of , DDR, CHI, Cache, computer organization, bus protocol, Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Our team here works on the Verification of advanced IP's, HW Accelerators and Subsystem for AI/ML/DL Applications Being part of this team will give you exposure to the design and verification of latest Qualcomm AI/ML/DL IP's/Core Being a part of the DV Team, you will work on Functional , Formal Power aware and Gate level simulation Get to work on the latest and cutting-edge tech nodes Required to work on IP verification and own various DV tasks from Test plan creation, coverage model development, test case writing and coverage closure. Should be proficient in System-Verilog and scripting language like Shell, Perl . Must have RTL/gate level simulation debug experience. Should have a working knowledge of bus protocols like AHB/AXI . Candidates should have 5-8 years experience. Good in SV, UVM, Assertions, GLS Solid knowledge of C and Scipting language like python Working knowledge of bus protocol like AHB/AXI Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FVExperience in Logic design/micro-architecture/RTL coding is a must.Must have hands on experience with design and integration of complex multi clock domain blocksExperience in Verilog/System-Verilog is a must.Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architectureHands on experience in Multi Clock designs, Asynchronous interface is a must.Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.Work closely with the Design verification and validation teams for pre/post Silicon debugHands on experience in Low power design is preferableExperience in Synthesis / Understanding of timing concepts for ASIC is must Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: The ideal candidate should leverage his knowledge and experience to provide leadership, technical guidance, and execution of silicon validation of ARM or DSP based multiple SOC projects and platforms Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skills Experience in Hifi Processor, Soundwire interface, ANC, DMA, I2S verification experience is a Plus. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. 12-15 years of experience with a Bachelor's/ Masters degree in Electrical/ Electronics engineering Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: : We are seeking a highly skilled and experienced Senior Formal Verification Engineer to join our dynamic team. The ideal candidate will have a strong background in formal verification methodologies and tools, with a proven track record of verifying complex IPs. You will play a critical role in ensuring the quality and reliability of our cutting-edge IPs. Key Responsibilities: Develop and execute formal verification plans for complex IPs. Collaborate with design and verification teams to define verification strategies and methodologies. Create and maintain formal verification environments using industry-standard tools. Identify and debug issues in the design using formal verification techniques. Provide technical guidance and mentorship to junior team members. Work closely with cross-functional teams to ensure seamless integration of IPs. Continuously improve verification processes and methodologies. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. 8-12 years of experience in formal verification. Proficiency in formal verification tools such as JasperGold, Cadence IFV, or similar. Strong understanding of digital design and verification methodologies. Experience with SystemVerilog, UVM, and other verification languages. Excellent problem-solving and debugging skills. Strong communication and teamwork skills. Ability to work independently and manage multiple tasks effectively. Preferred Qualifications: Experience with verification of high-performance IPs. Knowledge of scripting languages such as Python or Perl. Familiarity with version control systems like Git. Why Join Us: Opportunity to work on cutting-edge technology and innovative projects. Collaborative and inclusive work environment. Competitive salary and benefits package. Professional growth and development opportunities. If you are passionate about formal verification and want to be part of a team that is pushing the boundaries of technology, we would love to hear from you! Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Our team here works on the Verification of advanced IP's, HW Accelerators and Subsystem for AI/ML/DL Applications Being part of this team will give you exposure to the design and verification of latest Qualcomm AI/ML/DL IP's/Core Being a part of the DV Team, you will work on Functional , Formal Power aware and Gate level simulation Get to work on the latest and cutting-edge tech nodes Required to work on IP verification and own various DV tasks from Test plan creation, coverage model development, test case writing and coverage closure. Should be proficient in System-Verilog and scripting language like Shell, Perl . Must have RTL/gate level simulation debug experience. Should have a working knowledge of bus protocols like AHB/AXI . Candidates should have 5-8 years experience. Good in SV, UVM, Assertions, GLS Solid knowledge of C and Scipting language like python Working knowledge of bus protocol like AHB/AXI Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: QCT is currently seeking digital verification engineers for the mixed-signal ASICs that support QCTs mobile platforms for next generation 5G RFIC/PMIC/Codec technologies. Successful candidates will be working on the following - Block/Subsystem/SoC level digital IP verification using constrained-random coverage methodologies at both RTL and Gate Level. The skills involved includes SV/UVM/UVM_REG/Randomization/Coverage/SVA. Preferred Qualifications -Experience in writing Test Plans independently -Experience with debugging RTL & Gate level simulations -Experience with Functional Coverage &Code Coverage -Experience with Scripting in perl, python, tcl -Experience in planning Verification architecture, review testbench/ testplans with juniors, identify coverage gaps, propose alternate methods for coverage - Should have been involved in leading a chip DV effort - Silicon Debug Experience a plus. - Experience with Mixed Signal Designs involving DSP a plus - Modeling Experience with Matlab, Octave a plus Minimum Qualifications RequiredBachelor's, Electronics or EE PreferredMaster's, VLSI, Electronics or EE. 5+ years ASIC design, verification, or related work experience Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. We are hiring across mutliple roles in the below domain: 1. Physical Design 2.RTL Design 3. Design Verification 4. STA/ Synthesis 5. DFT 6. FPGA Emulation 7. Validation Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in. You will be joining a successful engineering team whose deliveries can be found in billions of mobile, compute and IoT products worldwide. Based out of Qualcomm's Bangalore office, this role offers a position in Low Power controller IP cores and subsystem digital design targeted for variety of industry leading Snapdragon SoCs for mobile, compute, IoT and Automotive markets. Key Responsibilities Micro-architecture and RTL design for Cores / subsystems. Work in close coordination with Systems, Verification, SoC, SW, PD & DFT teams for design convergence. Enable SW teams to use HW blocks. Qualify designs using static tool checks including Lint, CDC, LEC and CLP. Synthesis, LEC and Netlist CLP Report status and communicate progress against expectations. Preferred Qualifications 5 to 10 years of strong experience in digital front end design (RTL design) for ASICs Expertise in RTL coding in Verilog/SV/VHDL of complex designs with multiple clock domains and multiple power domains Familiar with UPF and power domain crossing Experience in Synthesis, Logical Equivalence checks, RTL and Netlist CLP Familiarity with various bus protocols like AHB, AXI, SPMI, I2C, SPI Experience in low power design methodology and clock domain crossing designs Experience in Spyglass Lint/CDC checks and waiver creation Experience in formal verification with Cadence LEC Understanding of full RTL to GDS flow to interact with DFT and PD teams Expertise in Perl/TCL/Python language Experienced in database management flows with Clearcase/Clearquest. Expertise in post-Si debug is a plus Excellent oral and written communications skills to ensure effective interaction with Engineering Management and team members. Team player, self-motivated, should be able to work with minimal supervision. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Lead Verification Efforts, Guide a team of engineers in developing and executing verification plans for complex designs, including PCIe-based IP or SoC. Testbench Development, Protocol Expertise, Methodology and Tools, Coverage Driven Verification

Strong System Verilog and UVM expertise ,DDR protocol knowledge ,GLS experience ,Testbench development, Test planning and execution , debugging & scripting skills

Qualcomm India Private Limited is seeking a Systems Engineer to join their Engineering Group. In this role, you will be responsible for analyzing and evaluating GPU architecture and microarchitecture to optimize performance and power consumption. Your tasks will include GPU power modeling, workload analysis, and developing tests for pre-silicon and post-silicon power verifications. You will collaborate closely with various teams such as RTL designers, architects, design verification specialists, compilers, drivers, silicon implementation teams, and post-silicon teams. Knowledge of Graphics architecture is considered a plus for this position. Minimum qualifications for this role include a Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field, along with 2+ years of experience in ASIC design and verification, as well as low-power ASIC optimization. Alternatively, candidates with a Master's or PhD in Engineering, Information Systems, Computer Science, or a related field and relevant work experience are encouraged to apply. Preferred qualifications for this position include a Master's or PhD degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field, with at least 3 years of experience in advanced CPU/GPU architecture and microarchitecture design development, VLSI design and verification, and low-power ASIC design techniques. Experience with industry tools such as PrimeTime PX and Power Artist, as well as Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development, GPU driver, and compiler development is highly desirable. Proficiency in C/C++ Programming Language, Scripting (Python/Perl), Assembly, Verilog/SystemVerilog, and Design Verification will be beneficial for this role. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, you can reach out to disability-accommodations@qualcomm.com. Please note that this email address is solely for accommodation requests and not for application updates or resume inquiries. As a prospective employee of Qualcomm, you are expected to adhere to all applicable policies and procedures, including security protocols for protecting confidential information. Qualcomm does not accept unsolicited resumes or applications from staffing and recruiting agencies. If you have any inquiries regarding this role, please contact Qualcomm Careers for more information.,

You will be responsible for executing internal projects or small tasks within customer projects in the fields of VLSI Frontend, Backend, or Analog design with minimal supervision from the Lead. As an individual contributor, you will work on tasks such as RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. Your key outcomes will include analyzing and completing assigned tasks successfully within the defined domain and ensuring quality delivery as approved by senior engineers or project leads. Your performance will be measured based on the quality of deliverables, timely delivery, reduction in cycle time and cost through innovative approaches, and the number of trainings attended. You are expected to deliver clean modules that integrate seamlessly at the top level, meet functional specifications and design guidelines without deviation, and maintain thorough documentation of tasks and work performed. In addition to timely delivery, you are expected to support team members with intermediate tasks to ensure project progress and participate in teamwork by assisting team members when needed. Your role will also involve proactively planning approaches to automate tasks, participating in technical discussions, and demonstrating innovation and creativity. Your skill set should include proficiency in languages and programming skills such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, Makefile, and Spice. Familiarity with EDA tools like Cadence, Synopsys, and Mentor tool sets, as well as technical knowledge in areas like IP Spec Architecture Design, Micro Architecture, Bus Protocols, Physical Design, Circuit Design, and Analog Layout, will be essential. Knowledge of technology aspects like CMOS, FinFet, and various nanometer technologies is also required. You should have strong communication skills, good analytical reasoning, problem-solving abilities, attention to detail, and the capability to learn new skills as needed to execute project tasks. Previous project experience in RTL Design, Verification, DFT, Physical Design, STA, PV, Circuit Design, or Analog Layout will be an added advantage. Additional comments mention the requirement of working knowledge in C-language, debugging CPU, Cluster environments, and familiarity with AMBA bus protocols. Design verification and experience with AMBA bus protocols are highlighted as crucial skills for this role. UST is a global digital transformation solutions provider known for partnering with leading companies worldwide to drive real impact through transformation. With deep domain expertise, innovation, and agility, UST collaborates with clients from design to operation, aiming to embed innovation and purpose into their organizations. As part of UST, you will have the opportunity to work alongside a diverse team of over 30,000 employees in 30 countries, contributing to projects that impact billions of lives globally.,

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures todays innovators stay Ahead of Whats Possible . Learn more at www.analog.com and on LinkedIn and Twitter (X) . Analog Devices (ADI) has just over $9 billion in revenue with offices around the world. As a global leader in the design and manufacturing of analog, mixed signal, power management and DSP integrated circuits, ADI is known for helping to solve its customers toughest engineering challenges. With a commitment to engineering for good, ADI strives to create a more sustainable future, while also focusing on its employees through mentoring programs, employee networks and continuous learning opportunities. At ADI, you will learn from the brightest minds who are here to help you grow and succeed. You will make an impact through work on meaningful projects alongside a team of experts. ADI s culture values aligned goals, work-life balance, continuous and life-long learning opportunities, and shared rewards Job Req Type: Experienced Required Travel: No Shift Type: 1st Shift/Days

Role Overview As a Lead Design Verification Engineer , you will own verification strategy and execution for high-complexity IP and SoC designs. You will be responsible for planning, leading teams, defining testbench architecture, and ensuring coverage-driven closure. Key Responsibilities Define and drive the verification plan based on design specifications and functional requirements. Architect and develop reusable UVM/SystemVerilog-based testbenches. Own IP/SoC-level functional verification from test planning to coverage closure. Work closely with RTL, DFT, and firmware teams for seamless integration and debug. Guide and mentor junior engineers; conduct reviews and knowledge sessions. Contribute to verification methodology improvements and best practices. Perform regression setup, coverage analysis, and issue tracking. Deliver high-quality, first-time-right silicon. Required Skills Strong experience in IP/SoC verification using SystemVerilog/UVM . Solid understanding of verification methodologies and simulation flows. Hands-on with tools like VCS, Questa, Verdi, SimVision, etc. Experience with standard bus protocols like AXI, AHB, PCIe, USB, etc. Good debugging skills using waveform viewers and log analysis. Experience in writing assertions and functional coverage models. Knowledge of scripting (Python, Perl, TCL) is a plus. Strong communication and leadership abilities. Preferred Qualifications Experience with formal verification, assertion-based verification (SVA). Exposure to low-power verification and UPF flows. Familiarity with safety/security standards (e.g., ISO 26262, DO-254). Experience working with emulation platforms and FPGA prototyping. Location: Bangalore / Hyderabad / Pune Experience: 815 Years Notice Period: Immediate to 30 Days Company: ADV Logics – Empowering Next-Gen VLSI Innovation

Responsibilities & Key Deliverables As a Senior Engineer in CAE at Mahindra & Mahindra Ltd, you will play a pivotal role in enhancing our vehicle safety standards through advanced simulation techniques. Your primary responsibilities will include: Creating fully functional crash finite element (FE) models that can accurately simulate real-world crash scenarios including frontal, side, rear, and pedestrian tests using leading CAE software such as LSDYNA, Hypermesh, Lsprepost, and Primer. Gaining in-depth understanding of vehicle crash behaviour to inform design improvements, ensuring optimum durability while reducing mass. Working collaboratively with design teams to implement efficient modifications that enhance crash performance and accumulate iterations within tight deadlines. Mentoring junior engineers or fresh PGETs, guiding them in executing crash Design Verification Plan (DVP) simulations effectively. Conducting thorough analyses of crash test data to enhance the correlation between crash simulations and physical tests, driving improvements in CAE methodologies. Demonstrating project planning and prioritisation, managing resource allocation, and adhering to rigorous project timelines. Applying basic finite element analysis (FEA) knowledge, bolstered by strong mechanical engineering fundamentals. Delivering competent crash analysis in line with US, European, Australian, and Indian crash safety standards. Possessing knowledge of non-linear, dynamic explicit FE-analysis, while addressing time-step considerations, materials, elements, mass scaling, and energy balance to ensure the integrity of simulations. Experience You should bring a wealth of practical experience to this position, specifically: 4 to 6 years of proven experience in the automotive sector, with a strong focus on crash simulations and CAE processes. Proficiency in CAE tools, specifically LSDYNA, Hypermesh, Primer, D3plot, and Lsprepost, enhancing your ability to deliver high-quality modelling and analysis. Demonstrated experience in project management, showcasing your ability to drive projects from inception to conclusion while maintaining high safety standards and performance evaluation. Industry Preferred Your expertise is especially valued in the automotive industry, where your contributions can significantly impact vehicle design and performance. Working in a dynamic environment that encompasses: Leading initiatives to integrate advanced simulation methodologies. Collaborating with diverse teams focused on innovation and efficiency in automotive development. Your background in automotive engineering will provide the foundation for understanding the unique challenges and demands of this industry. Qualifications We seek a candidate with the following educational qualifications: BTech or MTech in Engineering, preferably from an esteemed institution like IITs (with a minimum GATE score of 90%) or other reputed engineering colleges. Your academic foundation will support your ability to excel in complex engineering challenges and contribute to cutting-edge vehicle design projects. General Requirements General requirements for the role include: Excellent communication skills to articulate complex technical information to diverse audiences. A collaborative mindset, with a strong emphasis on teamwork and cross-disciplinary collaboration. Proactive problem-solving skills combined with the ability to think critically under pressure. A commitment to continual learning and professional development in the ever-evolving field of automotive engineering.

Responsibilities & Key Deliverables As a Lead Engineer - NVH within the Automotive Division at Mahindra & Mahindra Ltd, you will be instrumental in achieving set Noise, Vibration, and Harshness (NVH) targets while leading and executing multiple projects concurrently. Your key responsibilities include: Achieving targeted NVH outcomes such as Incab Noise and Tactile Vibrations through collaboration with the design team, necessitating structural modifications. Constructing comprehensive Full Vehicle Finite Element (FE) models adhering to established processes and quality standards. Generating reports, presentations, and work plans while effectively communicating progress and updates to stakeholders. Leading technology development initiatives by researching and applying the latest NVH techniques. Committing to continuous learning and mastering advanced toolsets pertinent to NVH analysis. Your advanced technical expertise will also involve: Building and debugging Full Vehicle FE models while analysing various load cases. Conducting system-level global and local stiffness load case assessments. Analysing trimmed body level NTF & VTF alongside vehicle-level modal maps. Evaluating structure-borne cabin noise and vibrations under varying conditions. Engaging in optimization efforts using Optistruct & Mode Frontier. Customising and automating simulation tools to streamline the execution process of Design Verification Plans (DVPs). Performing Modal Analysis, TPA, ODS, PCA, and Vibro-Acoustics Analysis. Correlating simulation load cases to enhance accuracy and reliability in outputs. Your role will involve working closely with multiple project cross-functional teams (CFTs), executing NVH simulations under the supervision of your manager. A demonstrated automotive NVH expertise, particularly in areas such as Idle NVH, Powertrain NVH, and Road NVH is essential. Experience To ensure success in this role, a minimum of 10 to 12 years of experience in automotive system NVH is required. Your deep understanding should encompass component level, assembly level, and full vehicle level NVH analysis. It is imperative that you possess excellent execution skills, demonstrating your ability to lead teams towards achieving exceptional vehicle NVH performance deliveries. Your leadership skills will facilitate effective collaboration and alignment within your team as you drive towards your collective goals. Industry Preferred Your background should ideally be rooted in the automotive industry . Familiarity with current automotive NVH trends, technologies, and challenges will be greatly beneficial as you contribute to vehicle performance enhancements. Qualifications A Bachelors or Masters degree in Engineering is required for this position. An academic foundation such as: BE/B.Tech ME/M.Tech will provide the requisite engineering knowledge to thrive in this role. General Requirements In addition to your technical qualifications, the following general requirements will enhance your candidacy: Strong analytical and problem-solving skills, with a keen attention to detail. Exceptional communication abilities to effectively articulate complex concepts to a range of stakeholders. Ability to thrive in a fast-paced, dynamic environment, managing multiple priorities. A commitment to continuous professional development and a proactive approach to learning new technologies. Team-oriented attitude with a willingness to collaborate with diverse groups across the organisation.

Roles and Responsibility Required Skills and Experience : Understanding of computer architecture and concepts. Basic understanding of CMOS Transistors, their behaviors. Understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits. Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. Good experience in design verification: Sense amplifier analysis, self-time analysis and marginality analysis. Understanding of Power versus Performance versus Area trade-offs in typical CMOS design. You have an engineering demeanor and Passion for Circuit design. Expected to have good interpersonal skills. Minimum 2 Yrs of experience in SRAM / memory design Margin, Char and its related quality checks. Nice To Have Skills and Experience : You know basic scripting languages, e.g. Perl/TCL/Python. Some Experience of working on Cadence or Synopsys flows. Experience with Circuit Simulation and Optimization of standard cells.

Roles and Responsibility Responsibilities: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : Understanding of computer architecture and concepts. Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. Good experience in design verification: Sense amplifier analysis, self-time analysis and marginality analysis. Understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits. Understanding of Power versus Performance versus Area trade-offs in typical CMOS design. Strong knowledge of physical implementation impact on circuit performance. Good understanding of high-performance and low power circuit designs with exposure to FinFet technologies, bitcell stability analysis Proven experience as the designated responsible individual for a memory design, leading a small team of designer. Expected to have good interpersonal skills. Circuit Design: Design and develop digital circuits for memory blocks like SRAM, register files, and caches. Simulation and Verification: Perform simulations and verification to ensure functionality and optimize for power, performance, area, timing, and yield. Minimum 7 Yrs of experience in SRAM / memory design Margin, Char and its related quality checks. Nice To Have Skills and Experience : Some Experience of working on Cadence or Synopsys flows. Experience with Circuit Simulation and Optimization of standard cells.

Job Description: We are looking for experienced DV Lead Engineers with a strong background in SystemVerilog, UVM, and protocol-based SoC/IP verification . The ideal candidate will have excellent debugging and leadership skills, with hands-on experience in building testbenches and leading verification teams. Key Responsibilities: Build comprehensive test plans , test cases , and functional coverage from specification documents Architect and develop UVM-based testbenches and verification environments Work with high-speed protocols such as AXI, AHB, APB, PCIe Hands-on debugging and simulation using Synopsys and Cadence tools Mentor junior team members, collaborate cross-functionally, and lead project execution Good to Have: Scripting and automation (Perl/Python/TCL) Experience with UPF simulations , GLS , and Formal Verification Exposure to SoC-level verification Strong communication and leadership abilities

Job Description: We are looking for skilled Design Verification Engineers with 5-10 years of strong experience in the semiconductor domain. Ideal candidates will have hands-on experience in SystemVerilog (SV) and UVM , along with a solid understanding of SoC/IP level verification , GLS , and CPU verification . Key Skills Required: SystemVerilog (SV) UVM (Universal Verification Methodology) SoC/IP Level Verification GLS (Gate-Level Simulation) CPU/Sub-system Verification High-speed interface protocols: PCIe, DDR, Ethernet Requirements: Immediate to 30 days joiners only Willing to work from office (Bengaluru or Hyderabad) Strong debugging and problem-solving skills Excellent communication and team collaboration abilities

Strong in digital design. Skills in ASIC/FPGA verification(directed test or SV/UVM) A good knowledge of simulation flow. Good scripting knowledge Perl/python Apply &Share your Resume to mansoor@hisoltech.com