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Design verification

Design verification

Aritrak Technologies

4 - 9 years

|

0 Lacs

hyderabad bangalore rural bengaluru

Posted:1 day ago| Platform:

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Skills Required

design verification verilog uvm system verilog

Work Mode

Work from Office

Job Type

Full Time

Job Description

ob Title: Design Verification Engineer (5-7 YOE)

Positions: 3 Nos

Key Responsibilities

Develop and implement test plans, test benches, and verification environments for MIPI, NoC, and subsystem-level designs.
Work on UVM-based constrained random verification and functional coverage closure.
Define verification strategy and drive verification sign-off for assigned subsystems.
Debug design and testbench issues at block, subsystem, and SoC levels.
Collaborate with design, architecture, and validation teams to ensure coverage completeness and timely bug closure.
Contribute to automation frameworks and continuous integration flows for regression.
Drive functional/performance verification of MIPI protocols (e.g., CSI, DSI, UniPro, UFS).
Validate NoC interconnect fabric including throughput, latency, QoS, and corner-case scenarios.
Engage in subsystem-level verification, integrating multiple IPs and validating end-to-end use cases.

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Aritrak Technologies

Information Technology & Services

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