You will be responsible for designing, developing, and integrating functional tests for NVMe client SSD firmware validation. Your duties will include troubleshooting and analyzing complex problems, multitasking, meeting deadlines, and achieving results in a fast-paced environment. As a successful candidate, you must be self-motivated and self-directed, with the ability to work effectively with others. You should have a desire to collaborate as a team member within and outside of your team. The qualifications required for this position include a Bachelor's or Master's degree, firmware knowledge for a storage device, knowledge of flash memory technology, and familiarity with SATA/NVMe protocols. You should have proficiency in Python and excellent communication skills. Preferred qualifications for this role include experience in firmware validation and working with protocol analyzers. This position falls under the Embedded Solutions job category and is located in Bangalore, India. If you meet the experience and qualification criteria and have the necessary skills, we encourage you to apply for this exciting opportunity.,
As a Sr. Verification Engineer specializing in SOC Verification, you will be a valuable member of the SmartSoC team, contributing your expertise to intricate SOC Verification projects. Your responsibilities will entail the technical execution of SOC Verification projects for complex ARM-based SOCs. This involves tasks such as Test Planning, Environment Architecture, and creating SV-UVM environments to ensure the successful verification of SOC designs. To excel in this role, you should possess 3 to 10 years of experience in Design Verification, coupled with excellent Communication and Presentation Skills. Your proficiency in SOC Verification is crucial, along with your expertise in Verification methodologies such as Coverage Driven Test Planning, Environment Architecting, and Verification Flow. A strong command of System Verilog is essential, as well as familiarity with methodologies like OVM, UVM, VMM, or RVM. Furthermore, your knowledge of protocols, specifically one of SATA, USB, Ethernet, or PCIE, will be highly beneficial. Your willingness and ability to adapt to new methodologies, languages, and protocols are key attributes for success in this role. This position falls under the Job Category of VLSI (Silicon Engineering) and offers opportunities in various locations including Bangalore, Chennai, Hyderabad, Noida in India, Stockholm in Sweden, and Texas in the USA. Join us at SmartSoC and be part of a dynamic team working on cutting-edge SOC Verification projects.,
As a Sr. Verification Engineer specializing in SOC Verification at SmartSoC, you will be responsible for the technical execution of complex ARM-based SOC Verification projects. Your role will involve test planning, environment architecture, and the development of SV-UVM environments. To succeed in this role, you should have 3-10 years of experience in Design Verification, with a strong expertise in SOC Verification. Excellent communication and presentation skills are essential, along with a deep knowledge of Verification methodologies such as Coverage Driven Test Planning, Environment Architecture, and Verification Flow. Proficiency in System Verilog and familiarity with methodologies like OVM, UVM, VMM, or RVM is required. Additionally, you should possess a solid understanding of protocols, including at least one of SATA, USB, Ethernet, or PCIE. The ability and willingness to adapt to new methodologies, languages, and protocols are crucial for success in this position. This opportunity falls under the VLSI (Silicon engineering) job category and is available in multiple locations, including India (Bangalore, Chennai, Hyderabad, Noida), Sweden (Stockholm), and the USA (Texas). If you are a driven and skilled SOC Verification expert looking to tackle challenging projects in a dynamic environment, we encourage you to apply and be a part of our innovative team.,
The ideal candidate for the RTL Design Lead Engineer position will work on IP development and integration into SoCs across various markets and technology nodes. You will be responsible for RTL design, front-end tools flow, and SoC integration/porting tasks. With over 8 years of experience, you should have a strong engineering background with exposure to front-end ASIC tool flows. You must be self-driven and able to work independently to track and complete tasks efficiently. Your expertise should include in-depth knowledge of AHB and bus infrastructures like matrix and fabrics, as well as a good understanding of ARM-based SoC architecture. Experience in ARM Cortex A/M integration or support, SoC DV methodology, and Low-Power design methodology is highly desirable. You should have hands-on experience with ASIC tools such as Lint, CDC, and possess expertise in System Verilog/Verilog RTL coding, including power-aware RTL coding and design knowledge. An understanding of Clock-Structures/Scheme and excellent communication skills are also important for this role. This position falls under the job category of VLSI (Silicon engineering) and is available in multiple locations including India (Bangalore, Hyderabad, Noida), Malaysia, Singapore, Sweden (Stockholm), and the USA (Texas).,
We are seeking a highly skilled and experienced ASIC RTL Design Engineer to join our team in Bangalore. The successful candidate will have 6 to 10 years of relevant experience and will play a crucial role in the design and integration of RTL components for complex ASIC projects. The candidate should possess a strong background in RTL UPF, SoC Design Integration, and multi-domain UPF methodologies. Additionally, a strong understanding of resolving VSI issues is required to excel in this role. The ideal candidate should have a proven track record of working with RTL UPF (Unified Power Format) to efficiently manage power intent for ASIC designs. Experience in the integration of RTL components into System-on-Chip (SoC) designs, ensuring seamless functionality and performance is crucial. Proficiency in working with multi-domain UPF to address power management across different aspects of the design is essential. Ability to identify and rectify VSI (Voltage Storm Immunity) issues to enhance the reliability and robustness of the ASIC design is a key requirement. Candidates who have experience in addressing UPF constraints and issues during the synthesis process and Engineering Change Orders (ECOs), including mitigating RTL-UPF mismatches, will be considered favorably. This position offers an exciting opportunity to work on cutting-edge ASIC projects, pushing the boundaries of design and innovation. If you are a seasoned RTL Design Engineer with the requisite experience and skills, we encourage you to apply and join our dynamic team in Bangalore.,
As an Electrical Engineer in the field of VLSI (Silicon engineering), you should hold a Bachelors or Masters degree in Electrical Engineering or a related field (BE/BTech/M.E/M.Tech). Your communication skills, both verbal and written, should be excellent. With a minimum of 8 years of experience in functional Design Verification (DV), you are expected to have proficiency in low-power UPF-based verification and possess strong debugging skills. Your skills should include an in-depth understanding of power gating and power management techniques, along with familiarity with AXI and SMN protocols. Previous experience with AMD is considered advantageous. This full-time position is open in Bangalore (BLR) or Hyderabad (HYD), India. If you meet the qualifications and experience required for this role, please submit a detailed resume showcasing your relevant experience and skills.,
We are currently seeking talented and experienced Design Verification Engineers to join our team in Bangalore. As a Design Verification Engineer, you will be responsible for ensuring the functionality, performance, and reliability of our complex designs, with a focus on Core Data Path (CDP), Graphics Data Path (GDP), USB4 (USB 4.0), Power Gating (PG), and Power Management (PM) domains. We are looking for candidates with 4 to 7+ years of relevant experience in design verification. Key Responsibilities: - Verification Planning: Collaborate with design and architecture teams to develop comprehensive verification plans for CDP, GDP, USB4, PG, and PM components. - Testbench Development: Create and maintain advanced testbenches, including constrained-random and assertion-based methodologies, to thoroughly verify design functionality. - Functional and Coverage Testing: Execute functional tests and track coverage metrics to ensure exhaustive testing of design features. - Protocol Verification: Verify compliance with industry-standard protocols, including USB4, and identify and address protocol violations. - Bug Reporting and Debugging: Document and report issues, and work closely with design teams to resolve bugs in a timely manner. - Performance Verification: Assess and verify the performance of data path components, ensuring they meet specified requirements. - Power Verification: Verify power management and power gating strategies to optimize power consumption. - Scripting and Automation: Develop and use scripting languages and automation tools to streamline verification processes. - Documentation: Prepare detailed verification plans, test reports, and documentation. Qualifications: - Bachelors or Masters degree in Electrical Engineering, Computer Science, or a related field. - 4 to 7+ years of experience in design verification. - Strong knowledge of CDP, GDP, USB4, PG, and PM domains. - Experience with industry-standard verification methodologies and tools. - Excellent problem-solving skills and attention to detail. - Strong communication and teamwork skills. If you are a highly motivated and detail-oriented Design Verification Engineer with a passion for ensuring the quality and reliability of complex designs, we encourage you to apply. Join our team to work on cutting-edge technologies and contribute to the success of our projects.,
Role Overview: You will be responsible for designing, implementing, and debugging firmware for the next generation of SSDs. Your role will involve working on HW Interface drivers, algorithm design, and implementation to contribute to the SSD firmware development. You will collaborate with firmware Architects, ASIC, flash media, validation, and other cross-functional teams to design and implement firmware modules and algorithms to achieve performance goals. Additionally, you will develop characterization and evaluation programs for new products and support failure analysis on test systems. Key Responsibilities: - Design, implement, and debug firmware for next-gen SSDs - Develop HW Interface drivers and algorithms - Collaborate with cross-functional teams for SSD firmware development - Design and implement firmware modules and algorithms to achieve performance goals - Develop characterization and evaluation programs for new products - Support failure analysis on test systems - Participate in technical design and implementation reviews across teams and functions Qualification Required: - B.E/B.Tech/M.E/M.Tech degree or equivalent with 4 or more years of related experience - Excellent Embedded C programming skills - Strong problem-solving skills - Experience with logic analyzers and protocol analyzers preferred - Experience with NAND flash is desirable - Ability to work effectively cross-functionally and globally - Strong communication and interpersonal skills - Prior experience with design/Bring up on new generation SOC/ASIC is a plus - High-level understanding of Storage Stack/Data path is desirable Note: The job is categorized under Embedded Solutions and is based in India with locations in Bangalore, Chennai, Hyderabad, and Noida.,
Role Overview: You will be responsible for working in the field of VLSI (Silicon engineering) with a focus on electrical engineering. Your role will involve utilizing your expertise in DVT pattern experience, ATE, functional vectors generation, Stimgen flow, and preferably AMD. Strong communication skills and a minimum of 7 years of experience in the industry will be essential for this role. Key Responsibilities: - Utilize your expertise in DVT pattern experience and ATE for testing purposes - Generate functional vectors and understand Stimgen flow for efficient testing - Prioritize tasks related to AMD products if applicable - Demonstrate strong debugging skills for effective problem-solving - Apply your knowledge of MBIST, JTAG, and Phy-loopback in the testing process Qualifications Required: - Bachelors or Masters degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech) - Minimum of 7 years of experience in the field - Proficiency in DVT pattern experience - Experience with ATE and functional vectors generation - Understanding of Stimgen flow - Prior experience with AMD is preferred - Strong communication skills, both verbal and written Note: Kindly showcase your relevant experience and skills through a detailed resume during the application process.,
You will be responsible for working on both IP development and integration into SoCs for various markets and tech nodes. Your job will include RTL design, front-end tools flow, and SoC integration/porting-related tasks. Key Responsibilities: - Designing RTL for IP development - Implementing front-end ASIC tool flows - Integrating and porting SoCs - Tracking and closing tasks independently - Utilizing in-depth knowledge of AHB and bus infrastructures - Understanding ARM-based SoC Architecture - Supporting ARM Cortex A/M integration - Implementing SoC DV methodology - Employing Low-Power design methodology - Using ASIC tools such as Lint and CDC - Utilizing System Verilog/Verilog RTL coding - Implementing Power aware RTL coding/design - Understanding Clock-Structures/Scheme - Demonstrating good communication skills Qualifications Required: - Minimum 8 years of experience - Engineering experience with exposure to front-end ASIC tool flows - Self-driven and independent in task tracking and closure - Good understanding of AHB and bus infrastructures - Familiarity with ARM-based SoC Architecture - Exposure to ARM Cortex A/M integration or support - Knowledge of SoC DV methodology - Experience in Low-Power design methodology - Hands-on experience with ASIC tools Lint, CDC, etc. - Proficiency in System Verilog/Verilog RTL coding - Knowledge of Power aware RTL coding/design - Understanding of Clock-Structures/Scheme - Excellent communication skills The company operates in the VLSI (Silicon engineering) job category with locations in India (Bangalore, Hyderabad, Noida), Malaysia, Singapore, Sweden (Stockholm), and the USA (Texas).,
As a Sr. Verification Engineer for SOC Verification at SmartSoC, your role will involve the technical execution of SOC Verification projects for complex ARM based SOCs. You will be responsible for test planning, environment architecture, and developing SV-UVM environments to ensure the successful completion of projects. Key Responsibilities: - Technical execution of SOC Verification projects for complex ARM based SOCs - Test Planning, Environment Architecture, and development of SV-UVM environments Qualifications Required: - 3-10 years of experience in Design Verification - Excellent Communication and Presentation Skills - Expert Knowledge in SOC Verification - Proficiency in Verification Coverage Driven Test Planning, Architecting Environments, and Verification Flow - Strong knowledge in System Verilog - Familiarity with at least one methodology such as OVM, UVM, VMM, or RVM - Very Good knowledge of protocols, with expertise in at least one protocol of SATA, USB, Ethernet, or PCIE - Ability and willingness to learn new methodologies, languages, protocols, etc. Please note that the job category is VLSI (Silicon engineering) and the job locations include India (Bangalore, Chennai, Hyderabad, Noida), Sweden (Stockholm), and USA (Texas). Join SmartSoC's team of SOC Verification experts and be a part of exciting and challenging projects in the field of VLSI engineering.,
As a Lead Verification Engineer, you will be responsible for developing and executing comprehensive verification strategies for USB/LPDDR subsystem designs, focusing on low-power design requirements. Your key responsibilities will include: - Collaborating with cross-functional teams to define verification goals and ensure alignment with project objectives. - Designing and implementing reusable, scalable, and efficient verification testbenches using SystemVerilog/UVM or C based, leveraging Cadence VIP and other verification IPs. - Applying expertise in low-power design and verification techniques to ensure accurate and reliable verification of power management features, such as power states, power domains, and power-aware verification methodologies. Qualifications required for this role include: - Extensive experience (8+ years) in verification. - Strong knowledge of Cadence VIP and verification methodologies (SystemVerilog/UVM). - Proficiency in low-power design techniques and power-aware verification methodologies. - Hands-on experience with industry-standard simulation and verification tools (e.g., Cadence Incisive, Synopsys VCS, Mentor Questa). - Solid understanding of verification languages (SystemVerilog, VHDL) and scripting languages (Perl, Python, TCL). - Familiarity with industry standards and protocols related to USB (USB 2.0, USB 3.x) and LPDDR (LPDDR4, LPDDR5). In addition to the technical requirements, this position falls under the job category of VLSI (Silicon engineering) and is a full-time role based in Bangalore, India.,
You are seeking highly skilled and motivated DFT-DV Engineers to join the dynamic team in Bangalore. As a DFT-DV Engineer, you will play a pivotal role in ensuring the quality and reliability of digital designs through Design for Test (DFT) and Design Verification (DV) methodologies. The ideal candidates should possess a minimum of 4 to 7+ years of experience in the field, with a strong background in DFT DV flow, JTAG, MBIST, SCAN, PG, PHY-LP, and BSCAN. - DFT Implementation: Collaborate with design and verification teams to define and implement DFT strategies and methodologies that enable efficient testing of complex digital designs. - Scan and ATPG: Develop and maintain scan insertion, Automatic Test Pattern Generation (ATPG), and compression methodologies to achieve high test coverage. - Memory BIST: Implement and verify Memory Built-In Self-Test (MBIST) solutions for embedded memories in the design. - JTAG and Boundary Scan: Develop JTAG and Boundary Scan solutions to facilitate efficient testing and debugging of digital designs. - Power Management: Work on Power Gating (PG) techniques to optimize power consumption during testing. - PHY-LP Integration: Collaborate with PHY teams to ensure seamless integration of low-power features into the design. - BSCAN Integration: Implement Boundary Scan (BSCAN) infrastructure to enhance testability and debug capabilities. - Verification: Verify DFT features and ensure their correctness through simulation and formal verification. - Documentation: Prepare detailed documentation, including DFT specifications, test plans, and reports. Qualifications: - Bachelors or Masters degree in Electrical Engineering, Computer Science, or related field. - 4 to 7+ years of experience in DFT-DV engineering. - Strong expertise in DFT methodologies, including scan, ATPG, MBIST, JTAG, BSCAN, and PG. - Proficiency in industry-standard EDA tools for DFT implementation. - Experience with low-power design and PHY-LP integration is a plus. - Excellent problem-solving skills and attention to detail. - Strong communication and teamwork skills. If you are a proactive and results-oriented engineer with a passion for ensuring the quality and reliability of digital designs, we encourage you to apply. Join in the mission to develop cutting-edge technology and make a significant impact in the semiconductor industry.,
Role Overview: You will be responsible for designing, implementing, and debugging firmware for the next generation of SSDs. Your role will involve working on HW Interface drivers, algorithm design and implementation, and contributing to the SSD firmware to deliver market-leading products. You will collaborate with firmware Architects, ASIC, flash media, validation, and other cross-functional teams to achieve best-in-class performance goals. Key Responsibilities: - Design and implement firmware modules and algorithms to meet performance objectives - Develop characterization and evaluation programs for new products - Support failure analysis on test systems - Participate in technical design and implementation reviews across teams and functions - Utilize Embedded C programming skills effectively - Utilize problem-solving skills to troubleshoot and analyze complex problems - Work collaboratively with internal and cross-functional teams - Communicate effectively (written and verbal) and demonstrate excellent interpersonal skills Qualification Required: - Bachelor's or Master's degree in Engineering (B.E / B. Tech / M.E / M. Tech) - 4 or more years of related experience - Strong Embedded C programming skills - Ability to work in a fast-paced, dynamic environment - Experience using logic analyzers and protocol analyzers - Prior experience with NAND flash is desirable - Familiarity with Assembly language programming is a plus - High level understanding of Storage Stack/Data path is preferred Please note: This job falls under the category of Embedded Solutions and is based in India with locations in Bangalore, Chennai, Hyderabad, and Noida.,
You are a highly skilled ASIC RTL Design Engineer with 6 to 10 years of experience, seeking to join a dynamic team in Bangalore. Your role will involve designing and integrating RTL components for complex ASIC projects, focusing on RTL UPF, SoC Design Integration, and multi-domain UPF methodologies. Your expertise in resolving VSI issues will be crucial for success in this position. Key Responsibilities: - Utilize RTL UPF (Unified Power Format) to manage power intent efficiently for ASIC designs. - Integrate RTL components into System-on-Chip (SoC) designs to ensure seamless functionality and performance. - Work with multi-domain UPF to address power management across different design aspects. - Identify and resolve VSI (Voltage Storm Immunity) issues to enhance ASIC design reliability and robustness. In addition to the core responsibilities, experience in addressing UPF constraints and issues during the synthesis process, as well as handling Engineering Change Orders (ECOs) to mitigate RTL-UPF mismatches, will be advantageous. This position provides an exciting opportunity to work on cutting-edge ASIC projects, contributing to design and innovation in the field. If you have the requisite experience and skills as a seasoned RTL Design Engineer, we invite you to apply and be part of our innovative team in Bangalore.,
As a candidate for the position of SSD Firmware Validation, you will be responsible for the following functions: - Test Design, Development, and Integration of functional tests for NVMe client SSD firmware validation. - Troubleshoot and analyze complex problems. - Multi-task and meet deadlines. - Proven ability to achieve results in a fast-moving, dynamic environment. - Self-motivated and self-directed, with a demonstrated ability to work well with people. - Desire to work as a team member, both on the same team and outside of the team. Qualifications Required: - Bachelors or Masters degree in Engineering. - Firmware knowledge for a storage device. - Knowledge of Flash memory technology. - Understanding of SATA/NVMe protocols. Skills Required: - Proficiency in Python. - Excellent communication skills. Preferred Experience: - Previous experience in Firmware Validation. - Experience with protocol analyzers. If you're interested in this position, please note that the job falls under the Embedded Solutions category and is located in Bangalore, India.,
Role Overview: As an Electrical Engineer in the VLSI (Silicon engineering) field, you will be responsible for designing and developing complex electrical systems. Your main focus will be on utilizing your expertise in security protocols, real boot processes, Debug mode, Warm reset, power management, and LP-UPF. Additionally, you will need to have proficiency in Trace, Cross-Trigger, JTAG, and AXI protocols to excel in this role. Key Responsibilities: - Design and develop complex electrical systems - Utilize expertise in security protocols, real boot processes, Debug mode, Warm reset, power management, and LP-UPF - Demonstrate proficiency in Trace, Cross-Trigger, JTAG, and AXI protocols - Collaborate with team members to ensure project success - Stay updated on the latest industry trends and technologies Qualifications Required: - Bachelors or Masters degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech) - Strong communication skills, both written and verbal - At least 8 years of professional experience in the field - Previous experience with AMD is considered an advantage Note: Interested candidates are required to submit a detailed resume highlighting their relevant experience and skills. Please note that the job is a Full-Time position located in India, with options in Bangalore and Hyderabad.,