You will be responsible for designing, developing, and integrating functional tests for NVMe client SSD firmware validation. Your duties will include troubleshooting and analyzing complex problems, multitasking, meeting deadlines, and achieving results in a fast-paced environment. As a successful candidate, you must be self-motivated and self-directed, with the ability to work effectively with others. You should have a desire to collaborate as a team member within and outside of your team. The qualifications required for this position include a Bachelor's or Master's degree, firmware knowledge for a storage device, knowledge of flash memory technology, and familiarity with SATA/NVMe protocols. You should have proficiency in Python and excellent communication skills. Preferred qualifications for this role include experience in firmware validation and working with protocol analyzers. This position falls under the Embedded Solutions job category and is located in Bangalore, India. If you meet the experience and qualification criteria and have the necessary skills, we encourage you to apply for this exciting opportunity.,
As a Sr. Verification Engineer specializing in SOC Verification, you will be a valuable member of the SmartSoC team, contributing your expertise to intricate SOC Verification projects. Your responsibilities will entail the technical execution of SOC Verification projects for complex ARM-based SOCs. This involves tasks such as Test Planning, Environment Architecture, and creating SV-UVM environments to ensure the successful verification of SOC designs. To excel in this role, you should possess 3 to 10 years of experience in Design Verification, coupled with excellent Communication and Presentation Skills. Your proficiency in SOC Verification is crucial, along with your expertise in Verification methodologies such as Coverage Driven Test Planning, Environment Architecting, and Verification Flow. A strong command of System Verilog is essential, as well as familiarity with methodologies like OVM, UVM, VMM, or RVM. Furthermore, your knowledge of protocols, specifically one of SATA, USB, Ethernet, or PCIE, will be highly beneficial. Your willingness and ability to adapt to new methodologies, languages, and protocols are key attributes for success in this role. This position falls under the Job Category of VLSI (Silicon Engineering) and offers opportunities in various locations including Bangalore, Chennai, Hyderabad, Noida in India, Stockholm in Sweden, and Texas in the USA. Join us at SmartSoC and be part of a dynamic team working on cutting-edge SOC Verification projects.,
As a Sr. Verification Engineer specializing in SOC Verification at SmartSoC, you will be responsible for the technical execution of complex ARM-based SOC Verification projects. Your role will involve test planning, environment architecture, and the development of SV-UVM environments. To succeed in this role, you should have 3-10 years of experience in Design Verification, with a strong expertise in SOC Verification. Excellent communication and presentation skills are essential, along with a deep knowledge of Verification methodologies such as Coverage Driven Test Planning, Environment Architecture, and Verification Flow. Proficiency in System Verilog and familiarity with methodologies like OVM, UVM, VMM, or RVM is required. Additionally, you should possess a solid understanding of protocols, including at least one of SATA, USB, Ethernet, or PCIE. The ability and willingness to adapt to new methodologies, languages, and protocols are crucial for success in this position. This opportunity falls under the VLSI (Silicon engineering) job category and is available in multiple locations, including India (Bangalore, Chennai, Hyderabad, Noida), Sweden (Stockholm), and the USA (Texas). If you are a driven and skilled SOC Verification expert looking to tackle challenging projects in a dynamic environment, we encourage you to apply and be a part of our innovative team.,
The ideal candidate for the RTL Design Lead Engineer position will work on IP development and integration into SoCs across various markets and technology nodes. You will be responsible for RTL design, front-end tools flow, and SoC integration/porting tasks. With over 8 years of experience, you should have a strong engineering background with exposure to front-end ASIC tool flows. You must be self-driven and able to work independently to track and complete tasks efficiently. Your expertise should include in-depth knowledge of AHB and bus infrastructures like matrix and fabrics, as well as a good understanding of ARM-based SoC architecture. Experience in ARM Cortex A/M integration or support, SoC DV methodology, and Low-Power design methodology is highly desirable. You should have hands-on experience with ASIC tools such as Lint, CDC, and possess expertise in System Verilog/Verilog RTL coding, including power-aware RTL coding and design knowledge. An understanding of Clock-Structures/Scheme and excellent communication skills are also important for this role. This position falls under the job category of VLSI (Silicon engineering) and is available in multiple locations including India (Bangalore, Hyderabad, Noida), Malaysia, Singapore, Sweden (Stockholm), and the USA (Texas).,
We are seeking a highly skilled and experienced ASIC RTL Design Engineer to join our team in Bangalore. The successful candidate will have 6 to 10 years of relevant experience and will play a crucial role in the design and integration of RTL components for complex ASIC projects. The candidate should possess a strong background in RTL UPF, SoC Design Integration, and multi-domain UPF methodologies. Additionally, a strong understanding of resolving VSI issues is required to excel in this role. The ideal candidate should have a proven track record of working with RTL UPF (Unified Power Format) to efficiently manage power intent for ASIC designs. Experience in the integration of RTL components into System-on-Chip (SoC) designs, ensuring seamless functionality and performance is crucial. Proficiency in working with multi-domain UPF to address power management across different aspects of the design is essential. Ability to identify and rectify VSI (Voltage Storm Immunity) issues to enhance the reliability and robustness of the ASIC design is a key requirement. Candidates who have experience in addressing UPF constraints and issues during the synthesis process and Engineering Change Orders (ECOs), including mitigating RTL-UPF mismatches, will be considered favorably. This position offers an exciting opportunity to work on cutting-edge ASIC projects, pushing the boundaries of design and innovation. If you are a seasoned RTL Design Engineer with the requisite experience and skills, we encourage you to apply and join our dynamic team in Bangalore.,
As an Electrical Engineer in the field of VLSI (Silicon engineering), you should hold a Bachelors or Masters degree in Electrical Engineering or a related field (BE/BTech/M.E/M.Tech). Your communication skills, both verbal and written, should be excellent. With a minimum of 8 years of experience in functional Design Verification (DV), you are expected to have proficiency in low-power UPF-based verification and possess strong debugging skills. Your skills should include an in-depth understanding of power gating and power management techniques, along with familiarity with AXI and SMN protocols. Previous experience with AMD is considered advantageous. This full-time position is open in Bangalore (BLR) or Hyderabad (HYD), India. If you meet the qualifications and experience required for this role, please submit a detailed resume showcasing your relevant experience and skills.,
We are currently seeking talented and experienced Design Verification Engineers to join our team in Bangalore. As a Design Verification Engineer, you will be responsible for ensuring the functionality, performance, and reliability of our complex designs, with a focus on Core Data Path (CDP), Graphics Data Path (GDP), USB4 (USB 4.0), Power Gating (PG), and Power Management (PM) domains. We are looking for candidates with 4 to 7+ years of relevant experience in design verification. Key Responsibilities: - Verification Planning: Collaborate with design and architecture teams to develop comprehensive verification plans for CDP, GDP, USB4, PG, and PM components. - Testbench Development: Create and maintain advanced testbenches, including constrained-random and assertion-based methodologies, to thoroughly verify design functionality. - Functional and Coverage Testing: Execute functional tests and track coverage metrics to ensure exhaustive testing of design features. - Protocol Verification: Verify compliance with industry-standard protocols, including USB4, and identify and address protocol violations. - Bug Reporting and Debugging: Document and report issues, and work closely with design teams to resolve bugs in a timely manner. - Performance Verification: Assess and verify the performance of data path components, ensuring they meet specified requirements. - Power Verification: Verify power management and power gating strategies to optimize power consumption. - Scripting and Automation: Develop and use scripting languages and automation tools to streamline verification processes. - Documentation: Prepare detailed verification plans, test reports, and documentation. Qualifications: - Bachelors or Masters degree in Electrical Engineering, Computer Science, or a related field. - 4 to 7+ years of experience in design verification. - Strong knowledge of CDP, GDP, USB4, PG, and PM domains. - Experience with industry-standard verification methodologies and tools. - Excellent problem-solving skills and attention to detail. - Strong communication and teamwork skills. If you are a highly motivated and detail-oriented Design Verification Engineer with a passion for ensuring the quality and reliability of complex designs, we encourage you to apply. Join our team to work on cutting-edge technologies and contribute to the success of our projects.,