RTL DESIGN LEAD ENGINEER

You will be responsible for working on both IP development and integration into SoCs for various markets and tech nodes. Your job will include RTL design, front-end tools flow, and SoC integration/porting-related tasks. Key Responsibilities: - Designing RTL for IP development - Implementing front-end ASIC tool flows - Integrating and porting SoCs - Tracking and closing tasks independently - Utilizing in-depth knowledge of AHB and bus infrastructures - Understanding ARM-based SoC Architecture - Supporting ARM Cortex A/M integration - Implementing SoC DV methodology - Employing Low-Power design methodology - Using ASIC tools such as Lint and CDC - Utilizing System Verilog/Verilog RTL coding - Implementing Power aware RTL coding/design - Understanding Clock-Structures/Scheme - Demonstrating good communication skills Qualifications Required: - Minimum 8 years of experience - Engineering experience with exposure to front-end ASIC tool flows - Self-driven and independent in task tracking and closure - Good understanding of AHB and bus infrastructures - Familiarity with ARM-based SoC Architecture - Exposure to ARM Cortex A/M integration or support - Knowledge of SoC DV methodology - Experience in Low-Power design methodology - Hands-on experience with ASIC tools Lint, CDC, etc. - Proficiency in System Verilog/Verilog RTL coding - Knowledge of Power aware RTL coding/design - Understanding of Clock-Structures/Scheme - Excellent communication skills The company operates in the VLSI (Silicon engineering) job category with locations in India (Bangalore, Hyderabad, Noida), Malaysia, Singapore, Sweden (Stockholm), and the USA (Texas).,