407 Design Verification Jobs - Page 8

JOB DESCRIPTION : Experience in verification of coherent protocols like ARMs ACE/CHI and Network-on-chip (NoC) Experience in ARM or x86 assembly language programming Prior experience in CPU or other IP verification Food allowance Health insurance Annual bonus

We are looking for a talented and motivated Design Verification Engineer to join our team and play a key role in ensuring the functionality and quality of our next-generation integrated circuits (ICs). This position offers the opportunity to work on challenging projects while utilizing your expertise in verification methodologies and tools. Roles & Responsibilites. Develop and implement comprehensive verification plans using industry-standard methodologies (e.g., UVM) Design and write robust verification environments (testbenches) to achieve high code coverage Utilize simulation tools (e.g., ModelSim, Cadence Incisive, Synopsys VCS) to verify RTL functionality Debug and analyze verification failures to identify the root cause of design issues Collaborate with RTL design engineers to resolve functional bugs and ensure design revisions meet verification requirements Participate in code reviews and ensure adherence to verification coding standards Stay up-to-date with the latest verification tools and methodologies Qualifications. Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus) 2-7 years of experience in design verification for ASICs or SoCs Strong understanding of digital design principles (combinational logic, sequential logic) Proven ability to develop and debug complex verification environments Proficiency in Verilog or VHDL with experience in verification methodologies (e.g., UVM) Experience with simulation tools and scripting languages (e.g., Python, Perl) is a plus Excellent analytical and problem-solving skills Strong communication and collaboration skills to work effectively in a team environment

Expertise in block level and system level verification using UVM Proficiency in coding UVM tests Strong debugging skills for resolving failure In-depth experience in coverage analysis and functional coverage Knowledge in scripting

We are seeking a highly skilled and experienced DV Lead to drive the verification of complex System-on-Chip (SoC) designs. The ideal candidate will be proficient in SoC-level verification methodologies , have strong expertise in writing C test cases for embedded systems, and lead verification planning and execution for SoC projects. Key Responsibilities: Lead the end-to-end SoC verification lifecycle, from test planning to coverage closure. Define verification strategy , test plans, and verification infrastructure for SoC-level designs. Develop and execute C-based test cases for processor and peripheral verification in a simulation/emulation environment. Collaborate with RTL design, firmware, and software teams to ensure complete SoC-level functional coverage. Drive debugging efforts across multiple functional blocks and coordinate with cross-functional teams to resolve issues. Utilize industry-standard verification tools and methodologies (e.g., UVM, System Verilog, C, scripting). Manage a team of verification engineers and ensure timely delivery of milestones.

We are looking for a control firmware engineer with 8+ years of experience in embedded communication firmware development with expertise in Description Understand product requirements / Firmware specifications / communications firmware architecture for Solar Energy Grid Tie / Off Grid Inverters /Back-up systems / Auxiliary Products like communication Gateways and Operator/service Interfaces applications. Hands on Code Implementation / debugging / development and testing of systems Development of real time state machine, monitoring and communications functions for the above referred renewable energy products. Understand and comply with QMS, PMP and lean development requirements Participate in subsystem and system level design verification planning and testing Essential Functions: Programming language C/C++ for 32 bit microcontrollers, RTOS environments like uC OS-II/QNX/embedded Linux or other platforms. Experience in Bootloader development and reliable firmware upgrade mechanisms. Familiarity with embedded testing ,test automation scripting for embedded products, development tools, including emulators and version control software. Exposure to advanced real time firmware debugging tools like J-Trace, logic analyzers, time/performance profiling techniques etc.. Experience Cyber security complained firmware development, System level/sub system level Threat modeling, good understanding on TCP/IP based communication stacks, various encryption techniques, Authentication/ authorization algorithms/models. Scripting languages like Python and Lua. Experience in industrial field bus communication protocols like MODBUS / CAN and protocols like USB, TCP/IP and embedded webservers. Exposure in WIFI/Bluetooth based communication interface development. Exposure to Web technologies like HTML, JavaScript is preferred. Good interpersonal communication skills and experience in working with global teams Qualifications

Senior Design Verification Engineer - InSemi Tech Senior Design Verification Engineer Bangalore & Hyderabad | 5+ Years Key Responsibilities: Expertise in SOC/IP verification Expertise in System Verilog Coding Experience in OVM/UVM/methodology Working environment in APB/AHB/AXI/PCIe/DDR protocol Experience in Test Bench Development Understanding in Gate Level simulation/debug

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics, AI or connectivity processor and related IP. You will: Be responsible for the delivery of all verification activities related to a GPU component or sub-system from early stages of verification planning to sign-off Create verification plans, develop and maintain UVM testbench components Track and report verification metrics and closure Participate in all stages of design specification definition providing feedback from the verification perspective Develop testbenches in UVM, write tests, sequences, functional coverage, assertions & verification plans. Be responsible for the definition, effort estimation and tracking of your own work Be able to influence and advance our GPU verification methodology Have the opportunity to lead, coach and mentor other members of the team Participate in design and verification reviews and recommend improvements About you Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard. You'll have: Have a proven track record of developing verification environments for complex RTL designs Have excellent understanding of constrained-random verification methodology and challenges of verification closure Be confident in defining verification requirements, and work out the implementation approach and details of a testbench Be able to do root-cause analysis of complex issues and resolve them in a timely manner Have excellent knowledge of SystemVerilog and UVM Be able to develop new verification flows Have working knowledge of ASIC design methodologies, flows and tools Be able to plan, estimate and track your own work Experience working on multiple projects at one time The skill to be able to communicate technical issues both in written form and verbally You might also have: Experience leading teams Graphics/GPU/CPU/SoC knowledge Experience in wider verification technologies, such formal property based verification and code mutation Skill scripting in Python, TCL, Perl, SystemC, C++ experience Understanding of functional safety standards such as ISO26262 Who we are Imagination is a UK-based company that creates silicon and software IP designed to give its customers an edge in competitive global technology markets. Its GPU and AI technologies enable outstanding power, performance, and area (PPA), fast time-to-market, and lower total cost of ownership. Products based on Imagination IP are used by billions of people across the globe in their smartphones, cars, homes, and workplaces. We need your skills to help us continue to deliver technology that will impress the industry and our customers alike, ensuring that people everywhere can enjoy smarter and faster tech than ever before. So come join us if you're wanting that something more Bring your talent, curiosity and expertise and well help you do the rest. Youll be part of one of the worlds most exciting companies who are one of the leaders in semiconductor IP solutions. As a part of our team, you can help us transform, innovate, and inspire the lives of millions through our technology. Additional information If you encounter accessibility barriers in the application process or if you have access needs and require support or adjustments to participate equitably in the recruitment process, please email recruitment@imgtec.com.

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics IP. You will: Be responsible for the delivery of all verification activities related to a GPU component or sub-system from early stages of verification planning to sign-off Create verification plans, develop and maintain UVM testbench components Track and report verification metrics and closure Participate in all stages of design specification definition providing feedback from the verification perspective Develop testbenches in UVM, write tests, sequences, functional coverage, assertions & verification plans. Be responsible for the definition, effort estimation and tracking of your work Be able to influence and advance our GPU verification methodology Participate in design and verification reviews and recommend improvements About you Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard. You'll have: Have a proven track record of developing verification environments for complex RTL designs Have excellent understanding of constrained-random verification methodology and challenges of verification closure Be confident in defining verification requirements, and work out the implementation approach and details of a testbench Be able to do root-cause analysis of complex issues and resolve them in a timely manner Have excellent knowledge of System Verilog and UVM Be able to develop new verification flows Have working knowledge of ASIC design methodologies, flows and tools Be able to plan, estimate and track your own work The skill to be able to communicate technical issues both in written form and verbally You might also have: Graphics/GPU/CPU/SoC knowledge Experience in wider verification technologies, such formal property based verification and code mutation Skill scripting in Python, TCL, Perl, SystemC, C++ experience Understanding of functional safety standards such as ISO26262 Who we are Imagination is a UK-based company that creates silicon and software IP designed to give its customers an edge in competitive global technology markets. Its GPU and AI technologies enable outstanding power, performance, and area (PPA), fast time-to-market, and lower total cost of ownership. Products based on Imagination IP are used by billions of people across the globe in their smartphones, cars, homes, and workplaces. We need your skills to help us continue to deliver technology that will impress the industry and our customers alike, ensuring that people everywhere can enjoy smarter and faster tech than ever before. So come join us if you're wanting that something more Bring your talent, curiosity and expertise and well help you do the rest. Youll be part of one of the worlds most exciting companies who are one of the leaders in semiconductor IP solutions. As a part of our team, you can help us transform, innovate, and inspire the lives of millions through our technology. Additional information If you encounter accessibility barriers in the application process or if you have access needs and require support or adjustments to participate equitably in the recruitment process, please email recruitment@imgtec.com.

Lead load extraction, hand calcs, and crack growth assessments. Conduct fatigue life predictions (rainflow/Miner) and damage tolerance evaluations. Validate composite/metallic material performance in ISAMI. Manage complex static and fatigue analysis, including crack growth and DTA for metallic and composite structures. Ensure compliance with Airbus structural analysis methods and tools. Develop Excel VBA tools for process automation. Drive and ensure Airframe certification requirements and resolve critical structural issues. Guide junior engineers and review analysis reports. Review technical reports, Liaise with Technical committee for design verification and changes. conduct technical audits, and support management decisions. Qualifications: masters in Aerospace/Mechanical Engineering (PhD a plus). 9+ years in airframe stress/F&DT (fuselage sub-assemblies: frames, panels, junctions). Expert in Airbus methods, ISAMI, HyperWorks, Nastran/Patran. Deep knowledge of composite/metallic fatigue and crack growth. Advanced Excel/VBA/Python for analytical automation. Good Communication skills

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Job Responsibilities Responsible for Corporate Application Engineering (CAE) activities in the Design for Test (DFT) Domain of VLSI systems From a technical stand-point, understanding customer needs on DFT, involve and work with their projects for using right methodologies and Siemens tools for successful project completion Provide DFT Tool support to all the existing customers. Help customers improve the productivity through efficient tool usage. Provide onsite tool support to customers as and when needed Developing and delivering technical training on new features and product updates Tracking and updating customer issues using defined Siemens processes and tracking tools. Developing Technical content for Siemens knowledgebase. Involve and drive the Tool evaluation/benchmark; Technical product presentations; Methodology review; Tool deployment and adoption; drive competitive replacements, provide support to customers during critical project implementation phases. Educational qualifications: Required BE/B.Tech in Electronics & Communications Engineering (E&C), or Electrical and Electronics Engineering (EEE) Work Experience: 4+ years relevant experience in DFT area of VLSI domain. Technical skills: In additional to possessing hands-on knowledge of DFT implementation and verification, the position would need excellent problem solving & communication skills able to work independently to solve complex problems and device new solutions and workarounds for customer issues. Knowledge and experience with VLSI design, HDL Synthesis, VLSI Testing and design for testability. Experience with design, simulation, verification of ASIC/VLSI circuits and systems, design verification and product test generation preferred. In-depth understanding of Design for Test (DFT) structures is required. This includes ATPG/Scan/Compression based testing, Memory BIST, Logic BIST, IJTAG and Boundary Scan (1149.1/6). Knowledge of scan data compression methodologies with EDT is preferred. Preferred experience in specific areas: Operating SystemsUNIX, Linux, Sun Solaris. LanguagesVerilog (Behavioral, RTL, gate level), VHDL (Behavioral, RTL, gate level), Perl, C/C++. CAD ToolsSynthesis, Simulation, ATPG, Memory BIST, Logic BIST, Boundary Scan. Familiarity with Tessent flows and methodologies is a plus. General/soft skills: Work effectively with customers, internally with divisions and R&D Ability to work autonomously Strong verbal and written communication skills; good presentation skills Excellent organizational and time management skills Build and foster relationships with customer and peers with a positive attitude to win business success Good problem solving and debugging skills, Willingness for technical sales Should be a good team player Job may require some domestic and international travel. #DISW #LI-EDA #LI-Hybrid A collection of over 377,000 minds building the future, one day at a time in over 200 countries. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! At Siemens, we are always challenging ourselves to build a better future. We need the most innovative and diverse Digital Minds to develop tomorrows reality. Find out more about the Digital world of Siemens here:/digitalminds Siemens Software. Where today meets tomorrow

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, weve got quite a lot to offer. How about you We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrows idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Looking for Siemens EDA ambassadors We are passionate about innovations that mean real progress, and we are curious about technologies that still need to be developed. Do you want to use curiosity, passion, and creativity to make the lives of millions of people easier and betterJoin us- whichever path you take, were looking forward to seeing your point of view! Veloce Transactors (Accelerated Verification IPs) Veloce Transactor Group is part of Mentor Emulation Division R&D located in Noida. Group develops transactors (RTL based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile etc. At present Veloce Transactor Library supports more than 25 protocol solution and growing further. This is your Role Individual will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology. Primary responsibilities include understanding standard specifications, develop architecture and micro-arch for the design and writing a synthesized design using Verilog/System Verilog. Required Experience: We seek a graduate with at 1-8 years of relevant working experience with (BE/BTech/ME/MTech/MS) from a reputed engineering college. We value your experience on the protocol e.g. PCIe, USB, Ethernet, AMBA in Design or Verification. Good understanding of IP Verification Methodologies, Verification procedures and practices are plus! Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc We value expertise in Verilog, SystemVerilog, and SystemC, as well as experience in developing RTL for FPGAs, ASICs, and IPs, as this will greatly contribute to the quality of our products. We expect candidates to be able to build verification test plans and environments, develop test cases, utilize VIPs, and efficiently debug defects identified during verification processes. We consider exposure to object-oriented programming languages like C++ an advantage, and experience in scripting languages such as Perl will also be valuable in automating tasks and improving efficiency. You need to engage with customers for Deployment and R&D assistance. We've got quite to offer, how about you Join our Digital World We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. At Siemens, we are always challenging ourselves to build a better future. We have some of the most inquisitive minds working across the world, re-imagining the future and doing extraordinary things. #LI-EDA #LI-HYBRID

Notice Period Immediate Employment Contract JobDescription 5 + years of experience in SDLC which includes Design Development Testing with special emphasis on Data Warehouse and Business Intelligence applications Experience in Data Warehousing ETL Tool IBM Info Sphere DataStage 11.5/11.7 is mandatory Familiarity in incorporation of various data sources such as Oracle Excel files and Flat files landing into the staging area Involvement in troubleshooting of Data Stage jobs and addressing issues like performance tuning Expert in Creation of Sequence jobs using Job Activity Wait for File Activity Exception Handler Sequencer Terminator Activity Notification Activity etc. Having good knowledge on ETL concepts Good knowledge in SQL and UNIX commands Secondary Skills Excellent communications skills. Knowledge in Wealth Management Domain is desirable Experience working with onsite-offshore model.

About Us: Silcosys Solutions Private Limited is a pioneer in semiconductor innovation, committed to delivering cutting-edge analog design solutions that power the future of technology. If you are eager to work on impactful projects and advance your expertise, we invite you to join our dynamic team. Job Description: As a Design Verification Engineer, you will be responsible for verifying complex SoC designs, working closely with design teams to ensure robust and high-quality products. You will employ advanced verification methodologies and tools to identify and resolve issues, ensuring that our SoC designs meet industry standards and customer requirements. Responsibilities: 1. Develop and execute comprehensive test plans to verify the functionality of SoC designs. 2. Create and maintain verification environments using advanced verification techniques, such as UVM, SystemVerilog, and assertion-based methodologies. 3. Collaborate with design teams to debug and resolve functional issues in RTL and gate-level simulations. 4. Ensure thorough verification coverage by analyzing and improving functional coverage metrics. 5. Perform regression testing to ensure consistent performance and reliability across design iterations. 6. Work closely with architects and designers to understand design specifications and refine verification strategies. 7. Develop reusable verification components and ensure alignment with project timelines and quality standards. 8. Document verification results, generate detailed reports, and present findings to stakeholders. Requirements: 1. Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field. 2. 3+ years of experience in SoC design verification within the VLSI domain. 3. Expertise in advanced verification methodologies, including UVM and SystemVerilog. 4. Strong understanding of SoC architectures, protocols, and interfaces (e.g., AXI, PCIe, USB, DDR). 5. Proficiency with simulation tools such as VCS, ModelSim, or Questa. 6. Experience with scripting languages (Python, Perl, TCL) for automation. 7. Familiarity with version control systems like Git. Excellent debugging and problem-solving skills, with a focus on delivering high-quality results. 8. Strong communication and collaboration skills to work effectively with cross-functional teams. Preferred Qualifications: 1. Experience with formal verification tools and techniques. 2. Familiarity with low-power verification strategies. Knowledge of hardware-software co-verification. 3. Exposure to machine learning or AI-based approaches in verification. Why Join Us? 1. Work on state-of-the-art SoC designs in a collaborative and innovative environment. 2. Opportunity to be part of a fast-growing company shaping the future of VLSI solutions. 3. Competitive compensation, professional growth opportunities, and a supportive work culture. How to Apply: If this role excites you, submit your updated resume at info@silcosys.com and any relevant project portfolios today. Join Silcosys Solutions Private Limited and shape the future !

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Collaborate with design and verification teams to understand digital design specifications and ensure comprehensive verification coverage. Develop and execute verification plans for ASIC/FPGA designs using directed tests and/or SystemVerilog with UVM methodologies. Build and maintain testbenches, verification components, and assertion-based verification structures to validate complex digital designs. Perform simulation, debugging, and coverage analysis to ensure functional correctness and compliance with design requirements. Contribute to the automation of verification flows through scripting (Python, Perl, Bash) to improve productivity and consistency. Work in Unix/Linux environments for development, simulation, and regression testing activities. Document verification strategies, results, and maintain clear communication with cross-functional teams to support project milestones. Actively participate in code reviews and contribute to continuous improvement of verification methodologies and best practices. Skills Must have 1 position6+y, 1 position4+y Strong in digital design. Skills in ASIC / FPGA verification (directed test or System Verilog / UVM) A good knowledge of simulation flow Good basis in scripting Python, Perl, Bash... Proficiency in Unix environment. Good communication skills Nice to have Bachelor's/Master's in ECE Other Languages EnglishB2 Upper Intermediate Seniority Regular

Role & responsibilities Design Verification Engineer (2-15 years experience) Company: HCL Tech Job Summary: We are looking for a talented and motivated Design Verification Engineer to join our team and play a key role in ensuring the functionality and quality of our next-generation integrated circuits (ICs). This position offers the opportunity to work on challenging projects while utilizing your expertise in verification methodologies and tools. Responsibilities: Develop and implement comprehensive verification plans using industry-standard methodologies (e.g., UVM) Design and write robust verification environments (testbenches) to achieve high code coverage Utilize simulation tools (e.g., ModelSim, Cadence Incisive, Synopsys VCS) to verify RTL functionality Debug and analyze verification failures to identify the root cause of design issues Collaborate with RTL design engineers to resolve functional bugs and ensure design revisions meet verification requirements Participate in code reviews and ensure adherence to verification coding standards Stay up-to-date with the latest verification tools and methodologies Qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus) 2+ years of experience in design verification for ASICs or SoCs Strong understanding of digital design principles (combinational logic, sequential logic) Proven ability to develop and debug complex verification environments Proficiency in Verilog or VHDL with experience in verification methodologies (e.g., UVM) Experience with simulation tools and scripting languages (e.g., Python, Perl) is a plus Excellent analytical and problem-solving skills Strong communication and collaboration skills to work effectively in a team environment Benefits: Competitive salary and benefits package Opportunity to work on leading-edge technologies and projects Collaborative and dynamic work environment Potential for professional development and career advancement

Job Role Responsibilities Role: Taking care of Functional Safety and Software Update Team activities. Responsibilities: Management of Functional Safety Management of Software Update team Functional Safety Software Update Consulting and Promoting to each department. Can provide functional safety guidance on feature definition, design, verification and validation measures. Collaboration with Cross-Functional Teams to work closely with other engineering disciplines (such as software, hardware, and mechanical engineers) to ensure safety across the entire system. Collaborate during system development, validation, and verification phases. Perform Confirmation reviews on SOTIF workproducts Prepare assessments based on requirements Process/templates/checklists for SOTIF to be defined for MSIL use Systematically derive relevant scenarios, evaluate in terms of damage severity and controllability Derive measures to ensure a safe target function. Carrying out residual risk analyses Documentation of existing considerations and analyses regarding SOTIF The SOTIF engineer shall be very familiar with ISO 21448 Manage safety requirements traceability and work with design, implementation, performance, validation and service team members to validate SOTIF requirements. Competency Requirements Must possess good experience in Design field. Should be aware of technicalities of designing a part and ought to be capable of verifying the modifications introduced in the same as per regulatory standards. Enthusiasm and a desire to work in a very fast-paced environment where innovation and rapid change is the norm. Strong system engineering background Good interpersonal and communication skills with a high level of integrity Experience working within a cross-functional team Expert knowledge of ISO 21448 (preferable) Lead with confidence. Preferably proven track on technical leadership Behavioral: Capability of managing a Team having variety of projects. Have grip over latest Industrial Trends (global domestic) and innovatively avail the same in respective work domain. Have ability to effectively plan and co-ordinate mutual activities with various stakeholders. Should possess good Interpersonal, Communication Presentation skills.

Job Title : Cybersecurity Test Engineer Location : Bangalore, India Experience : 4 to 8 Yrs About the Role : Looking for Cybersecurity Test Engineer who will be working closely with Hardware, Software and Systems engineering teams to deliver the next generation of Automotive SOC's. Ideal candidate is someone who has strong knowledge and hands on experience with Cybersecurity ISO 21434 standards. He/she should be able to Validate Cybersecurity features for Automotive SOC's and its applications. Responsibilities : - Perform penetration testing of SoC Automotive products. - Establish the Security goals and requirements. - Verification strategies in compliance with ISO 21434. - Develop test specifications, test cases, and test plans for security vulnerability testing. - Scan vulnerabilities with regards to CVSS levels and patch fixing from NIST database. - Perform code-level fuzz testing using open source tools. - Support documentation of test results and collaborate with the development team. - Participate in automating test process within CI/CD environments. - Setup and maintain traceability in compliance with Automotive SPICE requirements. - Experience in tools like OpenVAS, Nmap , wireshark, penetration testing for embedded systems. - Experience in Automotive domain is a must. - Practical experience performing TARA, security concepts and other Cybersecurity Artefacts mentioned in IS021434.

The ASIC Front-End Head is responsible for leading the front-end design team, ensuring high-quality Application-Specific Integrated Circuit (ASIC) designs, and driving innovation in digital chip development. This role requires expertise in RTL design, verification, synthesis, and architecture development, along with strong leadership and strategic planning skills. Key Responsibilities Technical LeadershipDefine and implement best practices for front-end ASIC design, ensuring efficiency and performance. Architecture & DesignOversee the development of digital circuits, including RTL coding, synthesis, and timing analysis. Verification & ValidationEnsure robust design verification methodologies using tools like UVM, SystemVerilog, and simulation frameworks. Cross-Team CollaborationWork closely with back-end design, physical design, and fabrication teams to optimize chip performance. Innovation & R&DStay updated with emerging semiconductor technologies and drive research initiatives. Mentorship & Team DevelopmentGuide and mentor engineers, fostering a culture of learning and technical excellence. Technical Project ManagementOversee front-end development timelines, ensuring timely delivery of high-quality designs. Required Qualifications EducationBachelor's or Master's degree in Electrical/Electronics Engineering, VLSI Design, or a related field. Experience15+ years in ASIC front-end design, with a proven track record of successful projects. Technical Skills: Expertise in HDLs (Verilog, VHDL), synthesis tools, timing analysis, and low-power design techniques. Leadership & CommunicationAbility to lead teams, manage projects, and communicate effectively with stakeholders. Problem-SolvingAnalytical mindset with a passion for optimizing digital designs for performance and efficiency. Reinvent your world.We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

Key Responsibilities Oversee and manage two wheeler components for all suppliers bought parts for mechanical(Sheet Metal, Plastic/ Rubber, Forging , Casting and Machining) Parts Derive New development product quality for mechanical parts Coordinate with engineering for quality specifications from product requirements and ensure these are implemented during the design and development stages Work closely with engineering teams to control product designs, ensuring they meet quality, performance, manufacturability, and known issue resolutions Ensure field reports, suppliers issues and internal feedback to address recurring quality or design issues and ensure they are resolved in new product designs Oversee validation and testing processes, ensuring that new products meet required quality and safety standards before mass production Drive continuous improvement initiatives based on learnings from existing product performance and feedback from the field and suppliers Coordinate across teams, including R&D, engineering, production, and supply chain, to ensure cohesive development and launch of new products Ideal Candidate BE/ B.Tech- Mechanical with 8~10 Years of experience in Auto Industry (Preferably OEM- 2W, 4W) In depth knowledge of APQP, PPAP, SPC, MSA and problem solving techniques Should have sound knowledge of Part development process/ Supplier Quality Assurance Knowledge of parts inspection and usage of measuring equipment (CMM, Roundness Tester, Contour Tracer etc) Should have knowledge of part qualification based on Design verification Should have knowledge of quality assurance practice and procedures

Skillset: DV | System Verilog | UVM | Protocol Expertise Must-Have Skills: Strong expertise in System Verilog (SV) and UVM Proven experience in Test Bench Development Deep protocol knowledge in at least one of the following: PCIe / UCIe / CXL / NVM AXI / ACE / CHI Ethernet / RoCE / RDMA DDR / LPDDR / HBM Key Responsibilities : Lead and drive verification for block, subsystem, or SoC level designs Strong experience in IP/subsystem/SoC verification using SV/UVM Verification experience with ARM or RISC-V CPU based subsystems Work with C/Assembly for low-level testing Perform Power Aware Simulations using UPF Location : Bangalore | Hyderabad | Cochin | Pune

Desired Profile : You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. Academic Credentials : MS or BS in Computer Engineering/ Computer Science with 5+ years working experience in ASIC RTL design. Key Responsibilities : 1. Develop micro-architecture and design for high-speed IO controller blocks based on architectural requirement 2. Conduct design reviews of designs in technical presentations to peers and management. 3. Develop RTL code for high-speed IO controller blocks in Verilog HDL and make sure functional correct and reusable for different configuration. 4. Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure. 5. Work with Design Verification team to ensure quality for architecture definition and design implementation. 6. Provide guidance and leadership to the team members. Preferred Experience : 1. Strong knowledge in computer architecture and interconnects. 2. Strong experience in high speed IO controller design (e.g. USB, PCIe, SATA, Thunderbolt). USB and/or Thunderbolt a strong plus. 3. Experience in full ASIC design cycle: requirements definition, architectural and micro-architectural specification, RTL, design verification, floor-planning, synthesis, timing closure, post-silicon validation. 4. Expert on Verilog RTL design and has experience of large digital ASIC project. 5. Familiar with front-end EDA tools and flows. 6. Familiar with Unix/Linux and scripts (tcl, perl, ruby and etc.) 7. Preferred candidates with valid work permit (Green Card / US Citizen / H1B)

Roles and Responsibility PFB the JD. JD Lead: 1 or 2 or 3 based on the options we get 15+ years of experience in Design Verification Strong experience in Processor based SoC verification Strong experience in ARM Cortex M or A series designs. Must have worked on bringing up the boot code, writing ISR, exceptions and other functions Strong experience in System Verilog and UVM based design verification Experience in Tensilica xtensa designs is a big plus Must have lead at least 2 to 3 SoC DV or Processor subsystem projects with a team size of 10+ Engineers Must have strong experience in AMBA protocols Must have strong understanding of functioning of Cache controllers, DMA & memory management controllers/ techniques JD Engineer: 9 members 1. 3 to 10 years of experience in Design Verification 2. Good experience in Processor based SoC Verification is a must 3. Experience in writing C or Assembly testcases is a must 4. Strong experience in AHB or AXI protocol is a must 5. System Verilog and UVM experience is a must JD Engineer: 6 members 1. 3 to 10 years of experience in Design Verification 2. Good experience in Processor based SoC Verification is a must OR strong experience in IP verification using SV/ UVM is a must 3. Experience in writing C or Assembly testcases is a plus 4. Strong experience in AHB or AXI protocol is a must Location: 1. Pune or Noida or Bangalore 2. Each location needs a lead + team of 3 to 4 to a minimum 3. If we can set it up in one location that would be great

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for candidates between 3 to 13 years of experience. Worked on coverage driven module verification. Strong in System Verilog, UVM Sound experience in testbench (stimulus, agent, monitor, checker) development. Failure debugging with Verdi & log file. Worked in the verification having c based reference model inside the testbench Experience with assertion development. Familiar with the EDA tools IUS, VCS, Verdi etc. Exposure in scripting(perl, Python). Good team player. Need to interact with the designers and other verification engineers proactively. Prior experience with video pipeline is added advantage. Knowledge of tensilica Worked with sub-system verification with tensilica Experience in C based system modelling. Debug with C based reference model. Have exposure to the other verification tasks gate level simulation, Power aware simulation, formal verification, sub-system verification and emulation. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Join Qualcomm's design verification team in verifying the high-speed mixed-signal IP designs ( PCIe, USB, MIPI, CXL, C2C, D2D, DDR, PLL, DAC, ADC, Sensors, etc.) for exciting products targeted for 5G, AI/ML, compute, IOT, and automotive applications. The team is responsible for the complete design verification lifecycle, from system-level concept to tape out and post-silicon support. Responsibilities Define pre-silicon and post-silicon testplans based on design specs and using applicable standards working closely with design team. Architect and develop the testbench using advanced verification methodology such as SystemVerilog/UVM, Analog/mixed signal simulation, Low power verification, Formal verification and Gate level simulation to ensure high design quality. Author assertions in SVA, develop testcases, coverage models, debug and ensure coverage closure. Work with digital design, analog circuit design, modeling, controller/subsystem, & SoC integration teams to complete the successful PHY level verification, integration into subsystem and SoC, and post-silicon validation. Minimum Qualifications Master's/Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field. 12+ years ASIC design verification, or related work experience. Knowledge of a HVL methodology like SystemVerilog/UVM. Experience working with various ASIC simulation/formal tools such as VCS, Xcellium/NCsim, Modelsim/Questa, VCFormal, Jaspergold, 0In and others. Preferred Qualifications Experience with Low power design verification, Formal verification and Gate level simulation. Knowledge of standard protocols such as PCIe, USB, MIPI, LPDDR, etc., Experience in scripting languages (Python, or Perl). Experience with mixed-signal IP design verification, such as USB, PCIe, CXL, C2C, D2D, MIPI, UFS, DDR, PLL, Data Convertors (DAC, ADC), or sensors.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Verification & Validation team is currently looking for self-motivated engineers who will perform ARM or DSP based SOC Pre-Si and Post Si validation including system level validation and debug. The ideal candidate should leverage his knowledge and experience to provide leadership, technical guidance, and execution of silicon validation of ARM or DSP based multiple SOC projects and platforms Experience in SoC pre/post silicon validation. ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug. Perform system level validation and debug Debug experience with Lauterbach Trace32 environment. Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers. Embedded software development of low level hardware drivers in C language. Working experience related to one or more of the following is required. ARM/DSP Processors/USB/PCIE, Ethernet Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 2-6yrs experience