Responsibility 4 management of Design activities including RFQ'S Design freeze/Release, DFMEA,PPAP, Design Verification/Product Validation testing & CAE.Present design, cost, changes.Liaise closely with all depments 2 fully u/stand design requirement Required Candidate profile He must know Catia & from SEAT background.Conceptualize new designs & design revisions.Improve reliability performance 2 reduce warrantable issues in the field.Deal with parts suppliers, Prototyping

Design Verification Engineer (5+ years) ASIC/SoC/FPGA Design Verification (Bangalore, Chennai and Hyderabad) Design Verification with planning, architecture, development, maintenance, and execution on complex IPs and/or SOCs. Strong knowledge of digital design principles and computer architecture. Proficiency in verification languages like Verilog or SystemVerilog. Experience with UVM (Universal Verification Methodology).

Hitachi Rail is looking for an enthusiastic self-motivated Signalling Functional Design Engineer who thrives in a fast-paced environment. The successful candidate is comfortable performing a wide range of tasks from administrative to strategic. The position is based in Bangalore, India. About Us A career at Hitachi Rail will help create a legacy. With operations in every corner of the world, our work goes to the cutting-edge of digital transformation and technology. From the multi-cultural strength of our global organization to the sustainable and innovative ways we work to bring people together, there s something for everyone to get stuck into. And that s where you come in. About the Position: Deliver the functional design of small Signalling projects (in terms of geography, or number of objects or subsystems or interfaces involved. . . ) in accordance with industry and company standards Key Accountabilities: Ensure the delivery of Functional signalling Design (schemes, specification documents, test reports ) compliant to project requirements, budget and schedule and to industry standards, company guidelines and processes. Ensure the delivery of functional design documentation including system requirements and architecture, interface control, scheme plans, control tables, block design, and analysis Ensure the gap identification between customer requirements and company products. Ensure the identification of development and procurement needs based on customer requirements and identified gaps. Ensure the review of Functional Signalling design requirements allocation and demonstrate the compliance of design documents by the traceability Ensure the effective implementation of the lessons-learnt database were the detected design errors, process and tool inefficiencies and the related corrective actions are duly recorded. Ensure the execution of the Verification activities on issued documents, according to the V&V Plan. Contribute to the configuration and HW/SW design of the Signalling system by control of the functional design and produce or control the version control sheet if applicable. Participate to technical reviews to detect design errors, process and tool inefficiencies, ensuring the identification and implementation of corrective and improvement actions Key Experience Preferred: 6+ years of experience in Signalling Interlocking Design, Verification activities for Indian Railways / Australian Railways Education/Qualifications Preferred: B. Tech / BE on Electronics & Communication Engineering or Electrical and Electronics Engineering Thank you for your interest in Hitachi Rail. If your application is of interest, we will be in contact. Please do not hesitate to discover more about us and our latest jobs at https://www. hitachirail. com/careers . At Hitachi Rail, there is a place for everyone. We welcome and value differences in background, age, gender, sexuality, family status, disability, race, nationality, ethnicity, religion, and world view. It is our commitment to create an inclusive environment - we are proud to be an equal opportunity employer. We would be delighted if you would be one of our followers at https://www. linkedin. com/company/hitachirail #LI-AV1 Thank you for your interest in Hitachi Rail. If your application is of interest, we will be in contact. Please do not hesitate to discover more about us and our latest jobs at https://www. hitachirail. com/careers . At Hitachi Rail, there is a place for everyone. We welcome and value differences in background, age, gender, sexuality, family status, disability, race, nationality, ethnicity, religion, and world view. It is our commitment to create an inclusive environment - we are proud to be an equal opportunity employer. https://www. linkedin. com/company/hitachirail

Hitachi Rail is looking for an enthusiastic self-motivated Senior Signalling Design Engineer who thrives in a fast-paced environment. The successful candidate is comfortable performing a wide range of tasks from administrative to strategic. The position is based in Bangalore, India. About Us A career at Hitachi Rail will help create a legacy. With operations in every corner of the world, our work goes to the cutting-edge of digital transformation and technology. From the multi-cultural strength of our global organization to the sustainable and innovative ways we work to bring people together, there s something for everyone to get stuck into. And that s where you come in. About the Position: Deliver the functional design of small Signalling projects (in terms of geography, or number of objects or subsystems or interfaces involved. . . ) in accordance with industry and company standards Key Accountabilities: Ensure the review of Functional Signalling design requirements allocation and demonstrate the compliance of design documents by the traceability Ensure the delivery of Functional signalling Design (schemes, specification documents, test reports ) compliant to project requirements, budget and schedule and to industry standards, company guidelines and processes. Ensure the delivery of functional design documentation including system requirements and architecture, interface control, scheme plans, control tables, block design, and analysis Ensure the gap identification between customer requirements and company products. Ensure the identification of development and procurement needs based on customer requirements and identified gaps. Ensure the effective implementation of the lessons-learnt database were the detected design errors, process and tool inefficiencies and the related corrective actions are duly recorded. Ensure the execution of the Verification activities on issued documents, according to the V&V Plan. Contribute to the configuration and HW/SW design of the Signalling system by control of the functional design and produce or control the version control sheet if applicable. Participate to technical reviews to detect design errors, process and tool inefficiencies, ensuring the identification and implementation of corrective and improvement actions Key Experience Preferred: 12+ years of experience in Signalling Interlocking Design, Verification activities for Indian Railways / Australian Railways Education/Qualifications Preferred: B. Tech / BE on Electronics & Communication Engineering or Electrical and Electronics Engineering Thank you for your interest in Hitachi Rail. If your application is of interest, we will be in contact. Please do not hesitate to discover more about us and our latest jobs at https://www. hitachirail. com/careers . At Hitachi Rail, there is a place for everyone. We welcome and value differences in background, age, gender, sexuality, family status, disability, race, nationality, ethnicity, religion, and world view. It is our commitment to create an inclusive environment - we are proud to be an equal opportunity employer. We would be delighted if you would be one of our followers at https://www. linkedin. com/company/hitachirail #LI-AV1 Thank you for your interest in Hitachi Rail. If your application is of interest, we will be in contact. Please do not hesitate to discover more about us and our latest jobs at https://www. hitachirail. com/careers . At Hitachi Rail, there is a place for everyone. We welcome and value differences in background, age, gender, sexuality, family status, disability, race, nationality, ethnicity, religion, and world view. It is our commitment to create an inclusive environment - we are proud to be an equal opportunity employer. https://www. linkedin. com/company/hitachirail

Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications Minimum Qualifications: Candidate should have done Electrical or Computer Science Engineering or related field in Bachelor's with 8+ Years relevant experience or Master's with 6+ Years relevant experience or PhD with 4+ years relevant experience required. Related technical experience should be in/with: Silicon Design and/or Validation/Verification. Preferred Qualifications: Design and/or Design Verification with developing, maintaining, and executing complex IPs and/or SOCs. OVM/UVM, System Verilog, constrained random verification methodologies. The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure). Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies. Experience in Xeon CPU Pre-Silicon or Post Silicon Validation.

Be a member of the team that plays a significant role in ensuring the quality of next generation microprocessors through structured DFT. 5+ years of Design Verification experience with strong Verilog, System Verilog, C++ and UVM/OVM knowledge Good understanding and exposure to SoC design and architecture Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects Ability to come with detailed testplan based on the Arch specs Exposure to DFT concepts such as JTAG, SCAN, memory BIST is an added advantage. Comfortable with VCS/Verdi and excellent debug skills Logical in thinking and ability to gel well within a team and be a proactive member of the team.

InnoPhase Inc., DBA GreenWave Radios, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays. Based in San Diego, California, GreenWave Radios has earned a reputation for delivering power-efficient digital-to-RF solutions. Our commitment to innovation is backed by a robust team of more than 100 talented engineers spread across four R&D facilities worldwide and an extensive portfolio of over 120 global patent filings, underscoring our dedication to pushing the boundaries of radio technology. InnoPhase Inc., DBA GreenWave™ Radios and Synergic Emergence have a co-employment relationship. For over three years, GreenWave Radios has partnered with Synergic Emergence, a professional employment organization provider, to offer our employees the best benefits and services. This arrangement means that Synergic Emergence provides employee pay checks and benefits, and GreenWave Radios will provide employment, evaluation, and advancement. By outsourcing some HR functions, GreenWave Radios can focus on what we do best – developing and implementing highly innovative SOC cellular radio integrated circuit products. Job Description InnoPhase Inc., DBA GreenWave™ Radios Bangalore is looking for a Senior Engineer - Design Verification to join our fast-paced and motivated team to drive excellence in our 5G products. This role is an excellent opportunity for someone that enjoys driving the critical path and making a significant impact in launching products into the market and winning! Key Responsibilities You will be working within DV team on verifying ORAN packet processing blocks using internal developed reference Python Model. Work on high speed SERDES interface verification such as PCIE but not limited to. Develop UVM testbench environment and execute verification cases to verify RTL design in bit true and cycle accurate. Construct SoC level testbench re-using verification components developed at the IP/ Subsystem level. Test bench architecture for random/directed testing, stimulus generation, and integration of custom and off the shelf VIP/UVCs. Develop and execute verification plans based on design specifications and collaboration with architects and designers. Construct HW/SW Co-Verification environment - test-benches, use-cases, APIs, sequences. Execute and Debug use-cases. Be part of a dynamic and functionally diverse team with opportunities for gaining exposure to modelling (TLM), HW emulation/acceleration, and SW driven verification. Debug test cases and report verification result to achieve expected code/functional coverage metrics. Utilize constrained random verification, functional coverage, code coverage and assertions to achieve goals. Work with FW team to convert DV sequence to FW drivers Support emulation, FPGA, prototyping efforts. Implement and maintain automated verification flows in languages such as Python, Perl/ Shell scripts. Job Requirements Master's and/or bachelor's degree in engineering (or equivalent) in EC/ EE/ CS. 5 or more years of experience in ORAN protocol design verification using reference models. Hands-on experiences in integrating Python/C++ models to UVM environment and create Agents, Scoreboards components for network functional blocks. Experiences in Cadence vManager for DV metrics extraction and regression Good understanding of the complete verification life cycle (test plan, testbench through coverage closure). Expertise in developing testbench environment and verification components (Monitor, Scoreboard, Driver, Agent etc) from scratch. Proficient in SystemVerilog, Verilog, UVM and C; and scripting languages like Python, Perl and Tcl/Shell. Experience in developing IP/ Subsystem/ chip-level SystemVerilog and UVM based Experiences in GIT, JIRA, MS office suites Benefits: Competitive salary and stock options. Learning and development opportunities. Employer paid health Insurance. Earned, Casual, Sick & parental leaves.

ISSP FPGA prototyping delivers Intel's core products, therefore you will have a unique opportunity to take part in major activities that affect the entire organization and the high-tech world.Our FPGA design verification team is in charge of validating infrastructure designs used to prototype cutting edge Intel client, devices and data centers chips.We are looking for great, highly motivated problem-solvers seeking to make significant contributions and impact on the projects they work on.In your role you will plan, design and execute scalable and robust verification environments, learn complex digital computers flows and simulate the behavior of the RTL design in purpose of debug and development using advanced verification methodologies. Qualifications Studying towards a B.Sc. or MSc in Computer Science / Electrical Engineering / Computers Engineeringsome experience with OOP (C++, Java...)some understanding of chip design frontend flow (design/validation/synthesis)any relevant chip design / verification experience is a big advantage

TE Connectivitys R&D/Product Development Engineering Teams conceive original ideas for new products, introduce them into practice. They are responsible for product development, and qualification from market definition through production and release; assist in the qualification of suppliers for new products to ensure suppliers deliver quality parts, materials, and services for new or improved manufacturing processes; conduct feasibility studies, testing on new and modified designs; direct and support detailed design, testing, prototype fabrication and manufacturing ramp. The R&D/Product Development Engineering Teams provide all required product documentation including, but not limited to, Solid Model, 2D/3D production drawings, product specifications, and testing requirements. They create and modify detailed drawings and drafting or conceptual models from layouts, rough sketches or notes and contribute to design modifications to facilitate manufacturing operation or quality of product. Typical fields of expertise include: materials, mechanics and systems, electrical, optics, chemistry, software, automation systems, packaging, testing and measurement, and manufacturing of electrical, mechanical and electronic components, products, and their integration into systems. Responsibilities R&D/Product Development Engineer is part of Product development team responsible to Develop individual products or specific technical elements for low to medium complex projects. This position support in development of Low voltage / High Voltage / Charge Inlet Connectors. RESPONSIBILITIES Assisting / Making proposals on products (Low & Medium Complex) for customers Providing support to Sr. engineer / Supervisor by Creating / Modifying CAD Models & Drawings. Collaborate with Simulation team & interpret results. Create & updating product specifications. Evaluating the quality of manufactured products-First article Inspection report Carry out/execute design change requests (Engg Change management). Coordinating & resolving technical issues. Implement design changes based on the DFM review feedback Assists in conducting DVP (design verification) & refinement of a product design. Assists in creation of PV (product validation) plan, testing & documentation. Analysis of Proto samples & refinement of a product design. Desired Candidate Profile Working knowledge with use of CAD systems (CREO Part modeling & Sheet Metal) Reading and interpreting engineering drawings/product prints Interpretation of simulation results & translating into product design Working knowledge in Design for Manufacturability (DFM-Molding / Stamping / Plating) & DFMEA Working knowledge in Tolerance stack-up and GD&T Good Conceptual, problem solving and Analytical Skills Working knowledge of product development (Processes, Approaches, Tools and Techniques) & Validation Working knowledge in prototyping methods Understanding of linear and non-linear analysis Working knowledge of product life cycle, ability to perform design activity & produce deliverables. Basic Knowledge in quality tools (8D, Why Why analysis, Fish bone.) Working knowledge of designing with Plastics & Sheet Metal components EDUCATION & CRITICAL EXPERIENCE B.E / B. Tech: Generally, 4+ years of experience in supporting Development / Product Engineering activities. ME/MTech - Generally, 2+ years of experience in supporting Development / Product Engineering activities.

- Must have hands on designed/implemented/Integrated DDR controller or DDR Phy design for a project(ASIC or FPGA). - Should be excellent in DDR protocol knowledge. - Must be an expert in micro architecture and RTL coding. Skill set needed - Verilog, SoC & Sub-system RTL Integration, knowledge of industry known standards Interfaces (AXI, AMBA, NOC, Fabric, UCIE, PCIE, SATA, DDR etc. etc.) Scripting : (Shell, python, ruby, perl etc.), CDC & LINT Checkers, Synthesis, LEC, Constraints/SDC understanding, Clocking, UPF, Register roll up. What You'll Do: - You will be responsible for pre-sales support, proposing architecture to customers based on their requirements. - You will work with team to come up with architecture and micro-architecture and work with cross functional team to ensure delivery - You will manage the design / RTL team to achieve the project goals - You will work with customer, provide technical support and provide collaterals agreed upon - You will work with team to achieve flow, methodology improvements to achieve high reuse - You will work with IP vendors to generate / get right configurations of the IP - You will manage team work allocation, schedule, risk mitigation and deliverables from design team. What You'll Need: - 4+ Years of experience in understanding of ARM based architecture, CPU subsystems, interconnect, boot process, memory subsystem, knowledge of Interface IP blocks like PCIe or USB or Ethernet or DDRx controller, QSPI, DMA, or other similar blocks - Good understanding of IPs, integration/application requirement, work with RTL team/vendors to achieve architecture goals - Should have designed one or more ARM based ASIC/SoC and used one or more of PCIe, DDRx, USB, SATA, . - Should have good knowledge of multiple flavors of AMBA bus protocols & interconnect solutions available - Should have good understanding of process / flow to achieve power & performance goals - Should understand and work on all aspects of VLSI development from SoC architecture, micro architecture, RTL coding, RTL quality checks, silicon bring up. - Should have good understanding of requirements from physical design, FPGA, Software, DFT and verification team. - Should have handled a design from Spec to GDS-II - Track design progress, working with cross functional teams, delivering on agreed upon milestones. - Should provide mentoring and support to the team

Developing and executing test plans and procedures to verify the functionality and performance of a designIdentifying and documenting design defects and issues, and working with designers and other stakeholders to address themAnalyzing test results and data to identify patterns and trends, and making recommendations for design improvementsDeveloping and implementing automated test scripts and test frameworks to improve testing efficiency and accuracyCollaborating with other engineers and stakeholders to ensure that all design requirements are properly verified and validatedCreating and maintaining documentation related to the verification and validation process, including test plans, test reports, and traceability matricesParticipating in design reviews and providing feedback on design requirements and testabilityProviding technical support and expertise to other departments, to ensure that designs are implemented correctly and meet all necessary requirements. Strong analytical and problem-solving skills, with the ability to identify areas for improvement and develop effective solutions.

Job Description: As a DE/DV Lead or Senior DE/DV, you will be responsible for driving the development, verification, and validation of complex semiconductor designs focused on multi-core processors, GPUs/AI Tensors, IoT, and cutting-edge protocols. You will collaborate closely with cross-functional teams, including architecture, design, and system engineering, to ensure the successful execution of projects. Your expertise in design verification (DE) and validation (DV) will be instrumental in ensuring the functionality, performance, and quality of our semiconductor products. The key responsibilities for these roles include, but are not limited to: Key Responsibilities: Lead the design verification and validation efforts for multi-core processors, GPUs/AI Tensors, IoT, and related protocols. Define verification/validation strategies, methodologies, and test plans to ensure comprehensive coverage. Develop and execute advanced verification/validation environments and testbenches. Perform functional and performance verification/validation tests, analyze results, and drive issue resolution. Collaborate with design and architecture teams to address design issues and refine specifications. Drive the development of advanced verification/validation techniques and methodologies. Mentor and provide technical guidance to junior team members. Stay updated with the latest industry trends, emerging technologies, and protocols related to the target domains. Collaborate with cross-functional teams to ensure successful project execution and timely delivery. Qualifications: Bachelor s, Master s, or Ph.D. degree in Electrical Engineering, Computer Science, or a related field. Proven experience in design verification and validation of complex semiconductor designs. Strong expertise in multi-core processors, GPUs/AI Tensors, IoT, and related protocols. In-depth knowledge of verification/validation methodologies, testbench development, and coverage-driven verification. Proficiency in using industry-standard verification/validation tools and languages (e.g., SystemVerilog, UVM). Experience with protocols such as PCIe Gen 6, Cache coherence/CXL 3.0, DDR5/GDDR5/LPDDR/HBM. Strong analytical and problem-solving skills. Excellent communication and collaboration abilities. Leadership skills for DE/DV Lead positions. Company Overview: Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. If you are a talented and experienced DE/DV Lead or Senior DE/DV with a passion for multi-core processors, GPUs/AI Tensors, IoT, and cutting-edge protocols, we invite you to apply for this role at AISemiCon. To apply, please submit your resume and a cover letter highlighting your relevant experience and achievements to hiring@aisemicon.in We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs.

Experience - 3 to 8 Years Location - Chennai Domain - Automotive Responsibilities Development, test and delivery of audio and infotainment features. Manage the integration of an infotainment system into specific vehicles. Responsible for supplier management for hardware and software releases as per the vehicle timeline. Implementation of quality improvements to the infotainment system, including quality analysis of issues, leading supplier engagement, visit to customer vehicles to dive deeper into issues, and drive closure of open issues and validate software fixes. Responsible for respective components / sub-systems specific delivery aligned with EECI deliverables per customer milestones Responsible to meet quality targets Skills / Qualifications System integration experience System Troubleshooting Highly motivated and hands-on team player with an exceptional attention to detail Knowledge of infotainment systems and features Understanding of vehicle system engineering Understanding with Design Failure Mode & Effects Analysis (DFMEA) & Design Verification Plan & Report (DVP&R) Experience with Infotainment Systems: Bluetooth, Hands-Free Phone, AM/FM radio, Navigation, Audio, Media, and Infotainment HMI features Client Client is amongst the world s leading providers of design and technology services across industries including Automotive, Broadcast, Communications, Healthcare, and Transportation. Client is helping customers reimagine their products and services through design thinking and the application of digital technologies such as IoT (Internet of Things), Cloud, Mobility, Virtual Reality, and Artificial Intelligence.

Siplont Sytems Pvt Ltd is looking for SoC Verification Engineer to join our dynamic team and embark on a rewarding career journey. Analyzing customer needs to determine appropriate solutions for complex technical issues Creating technical diagrams, flowcharts, formulas, and other written documentation to support projects Providing guidance to junior engineers on projects within their areas of expertise Conducting research on new technologies and products in order to recommend improvements to current processes Developing designs for new products or systems based on customer specifications Researching existing technologies to determine how they could be applied in new ways to solve problems Reviewing existing products or concepts to ensure compliance with industry standards, regulations, and company policies Preparing proposals for new projects, identifying potential problems, and proposing solutions Estimating costs and scheduling requirements for projects and evaluating results

Staff Engineer, Analog Location: Bangalore Key Responsibilities Developing low-power, high-performance analog circuits, including OpAmp, Comparators, Bandgap References, LDOs, Capless LDO, ADCs, DACs, PLL, DLL, Switching Regulator, High Speed IOs, DDR in advanced process nodes. Defining circuit implementation architecture based on specifications, creating transistor-level designs, and collaborating with analog layout designers for optimization. Creating and maintaining documentation for designs, including specifications, test plans, usage guidelines, and limitations. Collaborating with system architects, the analog design team, and the DV (Design Verification) team for DV modeling and digital top verification. Mentoring junior designers and sharing best practices to enhance design performance and productivity. Requirements : B. Tech /BE/ME/M Tech in Electronics/Electrical Engineering or related fields with 5+ years of relevant hands-on experience. Strong experience in analog and mixed-signal circuit design and/or architecture. Experience with advanced process/FinFET is a plus. Understanding of device basics and physics, with an understanding of the following: High speed Driver and Receiver designs, PLL design with solid system understanding Hands-on experience of Sub block design of Current mirrors, bandgap reference, Opamp, amplifiers with small-signal analysis of several topologies. Experience in ADC/DAC/Regulator or High Speed SerDes circuit design Good knowledge of devices, circuits, and EDA tools (schematic, layout, simulator, RC extraction, etc.), considering trade-offs among performance, power consumption, die area, and reliability. Basic knowledge of the following layouts: antenna checks, antenna failure, latchup issues, ESD constraints, and layout rules, ERC related checks, matching, cross talk, coupling, shielding, guard ring usage, LEF generation, .lib characterization, extraction setup, DRC LVS runs switch knowledge, IR drop requirements, EM issues, parasitic matching, parasitic reduction techniques, and static and dynamic IR analysis Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals. Excellent written and verbal communication skills.

Key Responsibilities Work closely with design team to review the design spec and define/participate detailed testplan Strategy and verification plan Develop testbench at SOC level for complex ASIC System-On-Chips Develop and maintain verification environment in UVM Implementation verification including Scan, JTAG related logic. Develop and improve the verification flow and methodology Maintain regression and debug test failures with designers Requirements : B. Tech /BE/ME/M Tech in Computer Science, Electronics/Electrical Engineering or related fields with 2 - 10 years of relevant hands-on experience. Hands-on experience on using Verilog, System Verilog and UVM (Universal Verification Methodology) Experience in Unit and SoC Verification, JTAG insertion. Deep understanding of modern verification concepts. Good scripting skills in languages such as Perl, Tcl, or Python. Programming skills in System Verilog, C, C++ Working knowledge of RTL coding in Verilog, Synthesis STA Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals. Excellent written and verbal communication skills.

Responsibilities Develop and maintain automation scripts in Bash, Perl, and Python. Monitor, troubleshoot, and optimize file system and data archiving workflows. Collaborate with other teams to improve and streamline operational processes. Maintain existing backup automation infrastructure. Create clear and reusable documentation for all developed scripts and processes. Skills Must have Strong hands-on experience with Bash and either Perl or Python. Solid knowledge of Unix/Linux environments. Familiarity with automation and monitoring tools. Experience in troubleshooting system and scripting issues. Nice to have Experience with IBM Spectrum Protect (TSM) or similar enterprise backup/archive solutions. Object storage systems (e.g., HCP, S3). Experience working in enterprise environments with change management processes.IBM Certified Administrator Tivoli Storage Manager V6 or above is preferred. ITIL Foundation (understanding of change management, CAB, etc.).

SOC Verification engineers with 3+ years of experience Knowledge of ARM architecture, CPU fundamentals & Cache coherency Experience with C/C++, assembly, and scripting languages. Familiarity with low-power design and verification Develop CDV UVM verification environments at system level Verify CPU connectivity to IP blocks Develop SoC test plans and test cases and track metrics including code and functional covera Job Requirement: Bachelors or Masters in EE/CS or related field 3+ years of SoC in ASIC/FPGA verification experience Proficiency in SV and UVM Experience with simulation, emulation, and formal verification Strong debugging and problem-solving skills Experience (years) : 3+ Year Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent

Skills/Experience: Extensive experience in IP/SOC Verification. Must be proficient in System Verilog and UVM. Must have hands-on experience in the verification of the IP protocols such as PCIe/DDR/USB/Ethernet/CXL/HDMI/MIPI/DSI/CS/GLS/CPU Verification or any other high-speed protocols. Experience with scripting language (Python, Perl, TCL etc.) Experience in assembly language or C is a plus. Ability to create testbenches from scratch and own the complete verification including coverage of the subsystem/chip level. Strong debugging capabilities. Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent

Supporting development of leading Client SoCs for Intel working across various domains like Logic Design, Verification, Physical Design or DFT based the requirements and matching skillset. Qualifications Pursuing Post Graduate Degree (M.Tech. /ME/..) in Microelecronics/VLSI or similar stream. Preferred Skill domains -Logic Design, Pre-Silicon Verification, Physical/ Structural Design, Layout, DFT, System Validation, Firmware.

Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications. 1. Applies scientific methods to analyse and solve software engineering problems. 2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance. 3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers. 4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities. 5. The software engineer collaborates and acts as team player with other software engineers and stakeholders. Job Description - Grade Specific Is fully competent in it's own area and has a deep understanding of related programming concepts software design and software development principles. Works autonomously with minimal supervision. Able to act as a key contributor in a complex environment, lead the activities of a team for software design and software development. Acts proactively to understand internal/external client needs and offers advice even when not asked. Able to assess and adapt to project issues, formulate innovative solutions, work under pressure and drive team to succeed against its technical and commercial goals. Aware of profitability needs and may manage costs for specific project/work area. Explains difficult concepts to a variety of audiences to ensure meaning is understood. Motivates other team members and creates informal networks with key contacts outside own area. Skills (competencies) Verbal Communication.

Knowledge on verification plans based on design specifications and requirements Proficiency in UVM and SystemVerilog for developing verification environments Unterstanding of protocols like PCIe, USB, Ethernet, or AMBA (AXI, AHB, APB) Required Candidate profile Hands-on experience with debugging tools like Verdi, DVE, or SignalTap Ability to analyze and resolve complex design and verification issues Proficiency in scripting languages like Python, Perl, Shell

Interested candidates can forward resume to : vlsi.team07@gmail.com

About The Role Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum (must haves) Bachelor's degree in electrical engineering or computer engineering with 4 to 9 years of experience or a master's degree in electrical engineering or computer engineering. 4+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Monitoring and improve existing simulation environments and simulation efficiency. Good to Have: Building emulation models, enabling content Working with Validation Engineers and central CAD teams to support and maintain verification requirements in terms of Automation and tool flow support. Coordinating with Val team on CAD Requirement with support CAD, IT and Engineering Compute Teams. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.