3614 Verilog Jobs - Page 36

Principal Engineer – Analog Design Location: Bangalore We are a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing We are a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Engineer – Analog Design to join our memory interface chip design team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a Principal Engineer – Analog Design, the candidate will be reporting to Director Engineering and is a Full-Time position. The candidate will be l...

Division: Artificial Intelligence Solutions Employment Status: Exempt Salary Grade: 106 Shift Requisition ID: 75815 Please be aware that if you are selected to formally interview for an internal position you will be required to notify your current manager. Please refer to the Employee Transfers Guidelines posted on Skylink. Description Responsibilities Digital design specification, design, analysis, and HDL (Verilog) coding Behavioral modeling of analog and mixed signal circuits Digital back-end: synthesis, physical implementation (prep for P&R), static timing, scan insertion, etc. Verification of digital sub-systems, mixed-signal sub-systems, and the entire chip using a combination of digit...

Work Location : Bangalore, Beijing, Dallas, Pune , Romania, Taiwan Work Expertise : 4+ years Job Specs : Expertise in Digital Verification Expertise in Functional Verification Expertise in SOC / IP Verification Expertise in working on system Verilog assertions & test benches Expertise in working on OVM / UVM / VMM based verification flow Expertise in working on ARM processor Expertise in working on AMBA bus protocols (AXI, AHB, APB) Expertise in CXL or PCIe Protocol Verification Expertise in simulation tools (VCS, ModelSim, Questa) Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. Expertise in analysing Code Coverage, Functional Coverage and As...

Positions: IP/ SoC Verification Engineer / Senior Verification Engineer Location: Bangalore Experience: 4 - 8 Years Employment type: Full Time, permanent Salary: 32 Lakhs PA Key Responsibilities Understand the design/arch requirements and create/modify test plan Create test suites (SV/UVM, C, etc, as needed) and test benches Collaborate closely with the design team to address any design errors Perform initial debug of test failures to identify design errors Analyse test results (logs, waveforms) and report the observations in case of issues. Identify functional cover points and assertions, write test cases/sequences to cover them Regress and triage the test cases Improve the quality of verif...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Develop, implement, and maintain verificat...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Design, implement, and verify FPGA logic u...

Job Title: Design Verification Engineer Location: Bangalore, India Type - Full time Description: Client is seeking a Design Verification Engineer. The role is technical, hands-on, in charge of the verification environment for new silicon projects and developments. We are looking for an experienced professional with Passion & Drive to succeed. Primary Responsibilities Include: Responsible for all aspects of verification methodology employed and for ensuring the application of uniform standards and adoption of best practices. Work and liaison with other Design Verification teams within our customer sites to identify holes in the design verification flow and implement corrective action. Ove...

Job description: Location: Bengaluru, Karnataka Experience: Minimum 2 to 5 Years of EdTech/IT/Corporate/Institutions Qualification: BE, BTECH, ME, MTECH, MCA (Any Degree) Shift Timing: 9:00 am to 6:00 pm (Mon to Fri) 9:00 am to 1:00 pm ( Sat ) Skills & Requirements: Create training programs according to requirements. Excellent knowledge of C, C++ and coding platforms. Managerial skills required to train Graduate Engineers, Working professionals, corporate freshers & Laterals. Excellent self-management skills (prioritizing the task). Content Development, Technical Assessment and Evaluation, Project development. Roles & Responsibilities: Strong Training experience in C Programming, Python or A...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Develop, implement, and maintain verificat...

Principal IP/RTL Design Engineer for TPU / GPU Hyderabad / Bangalore Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. Position Overview Seeking an IP/RTL Design Engineer with 5+ years of experience to design IP/RTL for TPUs, focusing on high-performance matrix multiplication, low-latency interconnects, and power-efficient AI acceleration. Key Responsibilities Design IP blocks for TPU cores, including systolic arrays, vector units, and memory subsystems. Develop Verilog/SystemVerilog RTL for performance, timing, and...

Location: Bengaluru, Karnataka Experience: Minimum 3 Years of EdTech/IT/Corporate/Institutions Qualification: BE, BTECH, ME, MTECH, MCA (Any Degree) Shift Timing: 9:00 am to 6:00 pm (Mon to Fri) 9:00 am to 1:00 pm ( Sat) Skills & Requirements: Outstanding verbal and written communication skills, along with strong negotiation abilities Proficient in spoken English – fluency is a must Solid experience in delivering technical training, especially in areas such as VLSI, Verilog, HDL, VHDL, Digital/Analog/Physical Electronics, and Verification Hands-on expertise in Verilog programming, Linux OS, Digital System Design, SystemVerilog (SV), UVM, and FPGA Understanding of academic institution operati...

Job description: Location: Bengaluru, Karnataka Experience: Minimum 2 to 5 Years of EdTech/IT/Corporate/Institutions Qualification: BE, BTECH, ME, MTECH, MCA (Any Degree) Shift Timing: 9:00 am to 6:00 pm (Mon to Fri) 9:00 am to 1:00 pm ( Sat ) Skills & Requirements: Create training programs according to requirements. Excellent knowledge of C, C++ and coding platforms. Managerial skills required to train Graduate Engineers, Working professionals, corporate freshers & Laterals. Excellent self-management skills (prioritizing the task). Content Development, Technical Assessment and Evaluation, Project development. Roles & Responsibilities: Strong Training experience in C Programming, Python or A...

Principal Staff Verification Engineer (VLSI Verification + AV +AI Expertise) Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. Thu, Aug 21 at 4:49 PM Job Description – Staff Verification Engineer (VLSI Verification + AV +AI Expertise) Position: Staff Verification Engineer – VLSI Verification Lead Location: Hyderabad Experience: 12+ years in Functional Verification Key Protocol Experience: MIPI DSI, DisplayPort, HDMI Role Overview We are seeking a highly skilled Staff Verification Engineer with strong expertise in VL...

Job Title: FPGA Engineer Intern Location: Remote (Global Team) Our lean team is distributed across the SF Bay Area, Tokyo, Singapore, Auckland, and Colombo. While this is a remote position, we offer access to a workspace in Palo Alto, CA, for those in the area. Employment Type: Paid Internship (Part-time) About Chiptip Technology Chiptip Technology is an agile, early-stage startup at the forefront of cloud computing. We're a small, globally-distributed team with a huge vision: to fundamentally change how high-performance computing is accessed by integrating Virtual FPGA technology with Kubernetes. As a lean team, every member's contribution directly shapes our product, our culture, and our c...

The engineer should be well versed in Verilog/VHDL RTL coding, experienced in using Mentor DfT tools and Cadence tools. The engineer needs to have hands-on experience in scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/SDF. Candidate with LBIST and Mixed Signal Radar IC experience is highly desirable Must be proactive, collaborative and detail-oriented capable of exercising independent judgment The engineer with experience on debug and root cause the problem in simulation failures Self-motivation, flexibility, with strong interpersonal skills. Effective communication skills, oral and written skills. Mandatory Key Skills JTAG,ATPG DRC,LBIST,RTL coding,VHDL,DF...

Responsibilities & Achievements: Reduced post-silicon bug escapes through early software-driven validation in emulation environments. (Accelerated Verification) Cut SoC bring-up time by 50% by architecting a unified simulation-to-emulation testbench with reusable transactors. Spearheaded the Accelerated verification plan for a next-gen ADAS SoC including use cases like Start Up, BOOTROM, Complex data path, Negative tests Enabled 80% reuse of verification components across simulation, emulation, and prototype platforms through modular UVM design. Successfully led a AV verification team of engineers across DV, emulation *Mandatory Key Skills ADAS SoC,BOOTROM,simulation,team leadership,Synopsys...

We are looking for a highly skilled and experienced Lead Engineer to join our team and contribute to the verification of mixes Signal. The ideal candidate should have a deep understanding of the Cadence, AMS along with expertise in system-level development and debugging What You Will Do Proficient in Verilog-AMS, System Verilog, and UVM methodologies Experience with Cadence Spectre or similar AMS simulation tools Strong understanding of analog circuit design principles (op-amps, transistors, etc.) What You Need to Be Successful Proficient in Verilog-AMS, System Verilog, and UVM methodologies Bonus Points if You Have Experience with Cadence Spectre or similar AMS simulation tools Strong under...

Analog: functional spec understanding of standard power management blocks, clock circuits and data converters. Loop analysis Job Description In your new role you will: Behavioral modeling: Verilog, Wreal or SV-RNM -Full AMS Verification for SoC or IPs -Full Test plan preparation as per the dynamics of product specifications - Full Dealing challenges with AMS methodologies of Cadence: irun/xrun or Synopsys: XA-VCS or Mentor Eldo ADMS -partial Testcase Debug & proposing new scenarios - Partial Handling project dynamics on scope, schedule and effort coming up with alternative verification plans, Mentoring Junior engineer Partial Ability to lead MSV projects independently Drive enhancements in k...

Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced groundbreaking devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create The Role: As a Senior RTL Design Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for defining the micro-architecture and implementing the corresponding RTL for advanced functional blocks. You will participate in the...

Principal Staff Verification Engineer (VLSI Verification + AV +AI Expertise) Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. Thu, Aug 21 at 4:49 PM Job Description – Staff Verification Engineer (VLSI Verification + AV +AI Expertise) Position: Staff Verification Engineer – VLSI Verification Lead Location: Hyderabad Experience: 12+ years in Functional Verification Key Protocol Experience: MIPI DSI, DisplayPort, HDMI Role Overview We are seeking a highly skilled Staff Verification Engineer with strong expertise in VL...

Cadence is looking for Principal Design Engineer to join our dynamic team and embark on a rewarding career journey Health and Safety Compliance: Ensure that construction projects comply with health and safety regulations, guidelines, and industry standards Risk Assessment: Identify and assess potential health and safety risks associated with the project's design, construction methods, and materials Design Coordination: Collaborate with architects, engineers, project managers, and other stakeholders to integrate health and safety principles into the project's design and planning Hazard Identification: Identify and document potential hazards related to the project, including those arising from...

Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate shoul...

Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate shoul...

Main job Location: Primary: Hyderabad R&D Center Travel: Frequent travel to client sites (e.g., DRDO, BEL, ECIL, private sector labs) Working Mode: Fulltime Timings: Shift timings are applicable (9am -6:30pm , 2pm 11pm) Role Overview: We are seeking a proactive and skilled Application Test Engineer in the VLSI domain who can contribute to IP validation, system-level testing, and client-side integration. The role requires working closely with design and verification teams during development and deploying/debugging FPGA-based and HDL-coded systems at field/customer locations. Key Responsibilities: At R&D Center: Develop test benches and test cases for digital IPs using Verilog/VHDL. Perform fu...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Minimum Qualifications 2-4 years (with Btech) or 1-2 years (with Mtech) of experience in Post-Silicon Physical Layer Electrical Validation Deep Physical Layer electrical validation experience on AT LEAST ONE High speed SERDES protocol like PCIe, USB, DP, ethernet, SRIO, JESD204, DDRIO etc Strong hands on Experience in using lab equipment such as Oscilloscopes, Network Analyzer, Bit Error Rate Tester (BERT) etc Preferred Qualifications Experience managing small teams (at least 2 members and above) Experience leading the complete post silicon validation efforts for at least one full pr...