2321 Verilog Jobs - Page 40

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: THE ROLE: AMD is looking for a senior software engineer to join our growing team. As a key contributor you will be part of a leading team to drive and enhance AMD’s abilities to deliver the highest quality, industry-leading technologies to market. THE PERSON: The ideal candidate possesses an innovative and problem-solving mindset, has a keen eye for Software engineering development, and is diligent and passionate about Technology. A successful candidate will need to employ strong knowledge in computer technologies, leadership skills in technical areas, and SW engineering expertise as well as a strong ability to compete effectively in a fast-paced, relevant environment while working with different teams of engineers and collaborators. KEY RESPONSIBILITIES: Develop and drive execution of comprehensive, highly effective software for sophisticated new technology and new product introduction projects Validate new SW features before releasing them to customers Contribute to a high-functioning feature team Collaborate closely with multiple teams to deliver key planning solutions and the technology to support them Help contribute to the design and implementation of future architecture for a highly scalable, durable, and innovative system Work very closely with dev teams and Project Managers to drive results PREFERRED EXPERIENCE: Strong digital design and simulations basics RTL (VHDL, Verilog & System Verilog) coding skills Understanding of FPGA design flow and tools (Synthesis, Simulation and implementation) ASIC/FPGA verification experience – VHDL and Verilog Xilinx Vivado Design Suite experience Hands on experience on simulators like XSIM, Questa, Modelsim, VCS etc. Advanced Debug skills in software environment or strong problem-solving skills Hands on experience with scripting preferably tcl, pearl and python ACADEMIC CREDENTIALS: Bachelor’s or Master’s degree in Computer/Software Engineering, Computer Science, or related technical discipline #LI-NR1 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

DFT Sr. Silicon Design Engineer New Dehli, India Engineering 66819 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ AECG ASIC DFx - SE NIOR SILICON DESIGN ENGINEER THE ROLE : AECG SSD ASIC is a centralized ASIC design group within AMD’s Adaptive and Embedded Computing Organization. The group consists of design teams located in several AMD locations in North America and Asia. It is primarily responsible for architecture, design, and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for cutting edge AMD products. We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Develop RTL for ASIC design-for-test (DFT) features as per architectural or design flow automation specifications Perform DFT RTL design integration, insertion, synthesis, equivalency checking, timing analysis and defining constraints, verification of DFx logic at RTL and GLS, ATPG and Scan GLS Work with multi-functional teams and handling schedules The successful candidate may also be responsible of: Debugging and verifying block-/chip-level DFT/DFX features Porting or creating the DFT/DFX verification environment Block/Chip test plan creation and development Stimulus writing and debug, and regression clean-up Generating high quality manufacturing test patterns for stuck-at, transition fault models and using on-chip test compression techniques Stimulating and verifying the ATPG and LBIST patterns Working with the product engineering teams on the delivery of manufacturing test patterns Provide technical support to other teams PREFERRED EXPERIENCE: Minimum 5 years of DFT or related domains experience, leading DFT efforts for large processor and/or SOC designs is a plus. Knowledge of DFT techniques such as JTAG/IEEE standards, Scan and ATPG, memory BIST/repair or Logic BIST Good working knowledge of UNIX/Linux and scripting languages (e.g. TCL, c-shell, Perl) Familiar with Verilog design language, Verilog simulator and waveform debugging tools Knowledge of EDA tools/methodology, such as synthesis, equivalency checking, static timing analysis is a plus. Strong problem-solving skills. Team player with strong communication skills. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-RP1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

An FPGA Design Engineer is responsible for designing, developing, and testing digital circuits using Field-Programmable Gate Arrays (FPGAs). This role involves translating system requirements into hardware implementations, coding in hardware description languages (HDLs) like VHDL or Verilog, and verifying the design through simulation and testing. They work with various tools and technologies to optimize performance, power consumption, and area of the FPGA designs. Key Responsibilities: Design and Implementation: Developing digital circuits and systems using FPGAs, including coding in VHDL or Verilog. Verification and Testing: Simulating and testing FPGA designs to ensure functionality and performance meet specifications. Hardware Optimization: Optimizing FPGA designs for performance, power consumption, and area. Collaboration: Working closely with other engineers, including hardware and software teams, to integrate FPGA designs into larger systems. Documentation: Creating and maintaining design documentation, including specifications, test plans, and implementation details. Required Skills: Technical Skills: Proficiency in VHDL or Verilog, and FPGA synthesis tools like Xilinx Vivado or Intel Quartus. Strong understanding of digital logic design, circuit design, and hardware architecture. Knowledge of FPGA debugging techniques and simulation tools. Familiarity with high-speed digital design, communication protocols (like PCIe or Ethernet), and embedded systems programming. Understanding of power analysis and optimization, and error detection and correction techniques. Soft Skills: Strong problem-solving and analytical skills. Ability to work effectively in a team environment. Excellent communication and documentation skills. Ability to adapt to new technologies and learn new skills. Education and Experience: A bachelor's or master's degree in Electrical Engineering, Computer Science, or a related field is typically required. Experience in FPGA design and development is essential. Experience with specific FPGA families and development tools is often preferred. Tamil candidates only Job Types: Full-time, Permanent Pay: ₹473,534.17 - ₹1,879,777.73 per year Benefits: Work from home Schedule: Day shift Monday to Friday Supplemental Pay: Yearly bonus Work Location: In person

🔍 We’re Hiring | Analog Design Engineer 📍 Location:Noida 💼 Experience: 5+ Years in Semiconductor & Analog Design 🔧 What You’ll Bring: B.E./B.Tech or M.E./M.Tech in Electrical/Electronics Engineering or Physics 5+ years of hands-on experience in analog circuit design and EDA tools Strong command over circuit simulation , layout porting , and analog front-end development Excellent communication & coordination skills Bonus: Exposure to Verilog-A or C programming 🚀 What You’ll Do: Develop and support new design/technology porting flows Collaborate with PDK , Modeling , and Device teams Enable and validate schematic layout porting , set up analog simulations, and ensure performance accuracy Drive tool improvements and optimize existing migration workflows Join a dynamic, international team where technology meets innovation . Let’s shape the future of analog design together! 📩 Interested? Drop your resume at: aayushi.sharm@saracasolutions.com 🔗 Or DM me for more details.

Role & responsibilities Please interested candidate send me cv :galeiah.g@honeybeetechsolutions.com call me :7995220108. Client Name: Proxelera Industry: SEMICON Position Name RTL Design Lead/uArch/Design Engineer Position type: Permanent Total Exp: 10-15 years HBTS Budget: Open Notice Period: Immediate to 15days Work Location: Bangalore Job Description Must have: We're looking for a highly skilled RTL Design Lead to lead our digital design team. The successful candidate will be responsible for designing, developing, and verifying complex digital circuits using RTL design methodologies. The RTL Design Lead will work closely with cross-functional teams to ensure seamless integration of digital design blocks into larger systems. Key Responsibilities: 1. Lead a team of RTL designers to design, develop, and verify complex digital circuits. 2. Develop and maintain RTL design methodologies, standards, and best practices. 3. Collaborate with architects to define and implement digital architecture. 4. Work closely with verification teams to ensure seamless integration of digital design blocks. 5. Participate in design reviews, provide feedback, and ensure design quality. 6. Develop and manage project schedules, resource allocation, and budgets. 7. Mentor and train junior designers to improve team capabilities. Requirements: 1. Bachelor's/Master's degree in Electrical Engineering, Computer Science, or related field. 2. 10+ years of experience in RTL design, with at least 3 years in a RTL design/uArch leadership role. 3. Strong expertise in digital design principles, RTL design methodologies, and verification techniques. 4. Proficiency in HDLs (Verilog/SystemVerilog/VHDL), design tools (e.g., Synopsys, Cadence), and scripting languages (e.g., Perl, Python). 5. Excellent leadership, communication, and project management skills. 6. Strong problem-solving skills, with the ability to analyze complex design issues. Nice to Have: 1. Experience with ASIC/FPGA design flows. 2. Knowledge of computer architecture, microprocessors, and embedded systems. 3. Familiarity with industry-standard design methodologies (e.g., OVM, UVM). 4. Certification in RTL design or related field. AMD (Dont Share AMD Profiles) Preferred candidate profile

SMTS SILICON DESIGN ENGINEER T HE ROLE : As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior silicon design engineer s . The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. K EY RESPONSIBLITIES : Implementation and verification of DFT architecture and features Scan insertion and ATPG pattern generation ATPG patterns verification with gate-level simulation Test coverage and test cost reduction analysis Post silicon support to ensure successful bring up and enhance yield learning P REFERRED EXPERIENCE : Understanding of Design for Test methodologies and DFT verification experience ( eg. IEEE1500, JTAG 1149.x, Scan, memory BIST etc .) Experience with Mentor testkompress and/or Synopsys Tetramax /DFTMAX Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance .

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description Selected Candidate is responsible for RTL Design & Integration. Need to work closely with Architects and Verification team. Responsible to achieve required design quality by doing Lint and CDC checks and adhering to release checklists. Skillset/ Requirements BTech/ MTech in Engineering with 3 to 6 years of actual work experience in RTL Design. The ideal candidate should have thorough understanding of end-to-end Digital design flow. Verilog / System-Verilog RTL logic design, debug, and functional verification support. Understanding of proper handling of multiple asynchronous clock domains and their crossings Understanding of Lint checks and proper resolution of errors Working experience on APB and AXI protocols. Working experience on micro-controller based designs and its associated logic is a Strong plus. Experience in Digital microarchitecture definition and documentation is a plus Experience in synthesis timing constraints, static timing analysis and constraint development is a plus Experience with FPGA and/or emulation platform is a plus. Exhibit excellent communication skills and be self-motivated and well organized. We’re doing work that matters. Help us solve what others can’t.

What You’ll Do: – Identify and generate new leads for business growth. – Build and maintain strong client relationships. – Present and promote our services to prospective customers. – Meet or exceed sales targets and contribute to the company’s success. – Excellent communication and interpersonal skills. – A proactive and self-motivated attitude. – Strong negotiation and presentation abilities. – Prior sales experience is preferred but not mandatory – we value potential and willingness to learn!

Job Title: Trainee Engineer Location: Onsite at Hyderabad, Telangana, India Roles and Responsibilities: Design and develop FPGA-based systems utilizing VLSI technology and programming languages like VHDL and Verilog. Collaborate with a cross-functional team of software developers, hardware engineers, and system architects to deliver robust solutions. Conduct system-level design and simulation to ensure performance meets specifications and requirements. Perform verification and validation of FPGA designs through simulation and testing to ensure product reliability and efficiency. Participate in the entire product lifecycle from concept stage to deployment, including design, coding, testing, and documentation. Optimize FPGA designs for improved performance, power efficiency, and resource utilization. Identify and resolve technical challenges related to FPGA designs and VLSI implementations. Maintain up-to-date knowledge of industry best practices, emerging technologies, and regulatory requirements for FPGA and VLSI. Required Qualifications: B. Tech (ECE) Proven experience in FPGA design, preferably with exposure to VLSI technology. Strong proficiency in VHDL and Verilog for system design and implementation. Hands-on experience with FPGA development tools and simulation software. Solid understanding of digital design principles and hardware description languages. Excellent problem-solving skills and ability to troubleshoot design and implementation issues effectively. Strong communication skills for effective collaboration with team members and stakeholders. Experience in working onsite in a fast-paced engineering environment. Key Responsibilities: Lead the design and optimization of FPGA and VLSI systems to enhance performance, efficiency, and integration. Work closely with project managers and customers to align FPGA solutions with project goals and customer specifications. Create detailed design documentation and technical reports to support project deliverables and stakeholder engagement. Contribute to continuous improvements in the engineering team by sharing knowledge, best practices, and driving innovation. Support the testing and prototyping of systems to validate hardware functionality in tandem with software applications. Ensure compliance with safety and industry standards during design, development, and deployment processes. Mentor junior engineers and provide guidance on FPGA and VLSI topics to promote team development. Job Type: Permanent Pay: ₹25,000.00 per month Schedule: Day shift Ability to commute/relocate: Secunderabad H.O, Hyderabad, Telangana: Reliably commute or planning to relocate before starting work (Required) Education: Bachelor's (Preferred) Experience: VLSI: 1 year (Preferred) FPGA: 1 year (Preferred) RFSoC & EDK Software: 1 year (Preferred) Work Location: In person

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description: Selected Candidate is responsible for RTL Design & Integration. Need to work closely with Architects and Verification team. Responsible to achieve required design quality by doing Lint and CDC checks and adhering to release checklists. Skillset/ Requirements: BTech/ MTech in Engineering with 3 to 6 years of actual work experience in RTL Design. The ideal candidate should have thorough understanding of end-to-end Digital design flow. Verilog / System-Verilog RTL logic design, debug, and functional verification support. Understanding of proper handling of multiple asynchronous clock domains and their crossings Understanding of Lint checks and proper resolution of errors Working experience on APB and AXI protocols. Working experience on micro-controller based designs and its associated logic is a Strong plus. Experience in Digital microarchitecture definition and documentation is a plus Experience in synthesis timing constraints, static timing analysis and constraint development is a plus Experience with FPGA and/or emulation platform is a plus. Exhibit excellent communication skills and be self-motivated and well organized. We’re doing work that matters. Help us solve what others can’t.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G, ushering in an age of rapid acceleration in connectivity and new possibilities. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform its potential into world-changing technologies and products. In the role of GPU Functional Verification Engineer , your project responsibilities will include the following, Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Strategize, brainstorm, and propose a DV environment, develop test bench, own test plan, debug all RTL artefacts, and achieve all signoff matrices Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality Collaborate with worldwide architecture, design, and systems teams to achieve all project goals Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Currently, we are looking for candidates who can match one or more of the profiles listed below, Strong knowledge of UVM based System Verilog TB Knowledge of GPU pipeline design is a plus, not mandatory Proficiency with formal tools – working knowledge of Property based FV is a plus, not mandatory Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver Experience Minimum 3 years of Design verification experience Senior positions will be offered to candidates with suitable years of experience and proven expertise matching the profiles listed above Education Requirements BE/ME/M.Sc. in Electrical, Electronics, VLSI, Microelectronics, or equivalent courses from reputed universities Selected candidates will be part of the GPU HW team which is passionate about developing and delivering the best GPU Cores for all Qualcomm Snapdragon SOC products. Qualcomm GPU is an industry-leading solution which is driving the benchmarks in mobile computing industry and the future of mobile AR/VR. The pre-Si verification team in Bangalore is currently heavily involved in the following UVM/SV based constrained random test bench for functional verification Subsystem level TB for complete GPU workload analysis and compliance Emulation platforms to analyze performance and pipeline bottlenecks Formal tools – both for reduced time to bug & property based FV sign-off Power Aware & Gate level simulations to deliver a high-quality GPU implementation Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Name : ASIC Design Engineer Location : Onsite in Bangalore Experience: 4+Years Requirement: The ideal candidate will be required to work on both IP development and integration into SoCs. You will work in RTL design and SoC integration/porting-related tasks. ​ Desired Skills Engineering experience with exposure to front end ASIC tool flows In depth knowledge of AHB and bus infrastructures like matrix and fabrics Good understanding of ARM based SoC Architecture Exposure to ARM Cortex A/M integration or support Hands-on experience with ASIC tools Lint, CDC etc. System Verilog/Verilog RTL coding Power aware RTL coding/design knowledge Understanding of Clock-Structures/Scheme Good Communication Skills. Interested Apply Here: nandika.sharma@swediumglobal.com Job Type: Full-time Pay: From ₹2,000,000.00 per year Schedule: Day shift Work Location: In person

Greetings from Swedium Global Services! About Us: Swedium Global Services is the growing System Engineering and Solution Company, offers services like Semiconductor Engineering R&D Services, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing Services, Consultancy and Outsourcing services to our clients across the globe for an onsite and offshore business model. Swedium Global is having presence in Sweden, Finland, Poland, Czech Republic and in India. Job Details: Job Name: Senior ASIC Verification Engineer Location: Onsite in Bangalore Job Overview: We are seeking a proficient SoC Verification Engineer with a strong background in ARM-based system designs and verification methodologies. The ideal candidate will be experienced in verifying complex SoC architectures, utilizing languages such as C, System Verilog (SV), and Universal Verification Methodology (UVM). This role involves close collaboration with design teams to ensure that all aspects of the SoC are thoroughly validated, from architectural design to implementation. The candidate will also contribute to the development of verification plans, testbenches, and methodologies to enhance overall product quality. Key Responsibilities: Develop and implement verification testbenches and components for ARM-based SoC designs. Execute thorough verification processes, including the development of test plans and test cases using C, SV, and UVM. Collaborate closely with design teams to understand and validate the various features of the SoC. Focus on stress testing, bug identification, and overall quality improvement of SoC IPs. Provide clear communication on project planning, status updates, and expectations. Contribute to the enhancement of verification tools and methodologies to improve efficiency. Mentor and guide junior engineers in verification processes and best practices. Required Skills and Experience: 4+ years in SoC verification. Proficient in ARM architecture and ARM-based system design. Extensive experience with C, System Verilog (SV), and UVM. Skilled in developing and executing verification test plans and testbenches. Expertise in verification tasks such as interrupts, memory map, RAS, and boot processes. Strong SoC-level and ARM debugging capabilities. Familiarity with microprocessor and SoC architecture, especially ARM processors. Nice to Have Skills and Experience: Experience with power-aware verification methodologies. Familiarity with hierarchical memory systems and their verification. Strong understanding of CPU microarchitecture Interested can share me your Resume to akshatha.b@swediumglobal.com Job Types: Full-time, Permanent Pay: From ₹3,000,000.00 per year Schedule: Day shift Application Question(s): Where exactly in bangalore? How soon you can join us? Experience: Verification: 4 years (Preferred) Location: Banglore, Karnataka (Preferred) Work Location: In person

Planning, developing and implementing AI (Artificial Intelligence), ML (Machine Learning) algorithms for various medical imaging and signal processing applications using MATLAB/Python/Verilog languages. Writing/Editing/Proof reading/Journal support - Research Documents. Job Type: Full-time Pay: From ₹5,000.00 per month Benefits: Flexible schedule Paid sick time Work from home Schedule: Day shift Supplemental Pay: Performance bonus Work Location: In person

Responsibilities: Interface camera modules (e.g., OV7670, OV5640) with FPGA boards Write and simulate System Verilog code for image data acquisition Use MATLAB or Python for processing and visualization of image data Test and debug the camera pipeline from hardware to software Document technical workflow and results Collaborate with team members on weekly progress updates Requirements: Strong understanding of Digital Logic Design Knowledge of FPGA development tools (Vivado, Quartus, etc.) Experience with System Verilog / Verilog HDL Familiarity with MATLAB or Python for data handling and plotting Ability to read camera datasheets and timing specifications Good problem-solving and debugging skills Preferred Qualifications: Final-year or pre-final year students from ECE / EE / CSE Previous experience with image processing or embedded projects is a plus What You’ll Gain: Real-world experience in FPGA-based camera interfacing Exposure to hardware-software integration Certificate, Letter of Recommendation & Portfolio project Potential pathway to long-term roles or R&D positions Job Type: Full-time Pay: From ₹3,000.00 per month Benefits: Flexible schedule Paid sick time Work from home Schedule: Day shift Supplemental Pay: Performance bonus Work Location: In person

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ The Role AMD is looking for a senior software engineer to join our growing team. As a key contributor you will be part of a leading team to drive and enhance AMD’s abilities to deliver the highest quality, industry-leading technologies to market. The Person The ideal candidate possesses an innovative and problem-solving mindset, has a keen eye for Software engineering development, and is diligent and passionate about Technology. A successful candidate will need to employ strong knowledge in computer technologies, leadership skills in technical areas, and SW engineering expertise as well as a strong ability to compete effectively in a fast-paced, relevant environment while working with different teams of engineers and collaborators. Key Responsibilities Develop and drive execution of comprehensive, highly effective software for sophisticated new technology and new product introduction projects Validate new SW features before releasing them to customers Contribute to a high-functioning feature team Collaborate closely with multiple teams to deliver key planning solutions and the technology to support them Help contribute to the design and implementation of future architecture for a highly scalable, durable, and innovative system Work very closely with dev teams and Project Managers to drive results Preferred Experience Strong digital design and simulations basics RTL (VHDL, Verilog & System Verilog) coding skills Understanding of FPGA design flow and tools (Synthesis, Simulation and implementation) ASIC/FPGA verification experience - VHDL and Verilog Xilinx Vivado Design Suite experience Hands on experience on simulators like XSIM, Questa, Modelsim, VCS etc. Advanced Debug skills in software environment or strong problem-solving skills Hands on experience with scripting preferably tcl, pearl and python Academic Credentials Bachelor’s or Master’s degree in Computer/Software Engineering, Computer Science, or related technical discipline Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Min 10 yrs of R&D experience in FPGA development (Altera, Xilinx) Experience of RTL languages - VHDL or Verilog Xilinx FPGA Tools Design Flow - Vivado, Chipscope, Quartus. EDA Functional Simulation tools – Synopsys or Mentor or Cadence.

1+ Yrs Experience working on modern front-end web technologies, including: React, JS(ES6+) TypeScript, Next.js, HTML5, CSS3 and Less/Sass ability to write mixins, partials, functions, etc developing highly-optimized applications using React and Redux Required Candidate profile Experience interning in the E-Commerce Experience with the standard tooling Webpack, Babel, Linting, JS Typing, and Prettier. Experience in Caching

Greetings from Swedium Global Services! About Us: Swedium Global Services is the growing System Engineering and Solution Company, offers services like Semiconductor Engineering R&D Services, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing Services, Consultancy and Outsourcing services to our clients across the globe for an onsite and offshore business model. Swedium Global is having presence in Sweden, Finland, Poland, Czech Republic and in India. Job Details: Job Name: Senior ASIC Verification Engineer Location: Onsite in Bangalore Job Overview: We are seeking a proficient SoC Verification Engineer with a strong background in ARM-based system designs and verification methodologies. The ideal candidate will be experienced in verifying complex SoC architectures, utilizing languages such as C, System Verilog (SV), and Universal Verification Methodology (UVM). This role involves close collaboration with design teams to ensure that all aspects of the SoC are thoroughly validated, from architectural design to implementation. The candidate will also contribute to the development of verification plans, testbenches, and methodologies to enhance overall product quality. Key Responsibilities: Develop and implement verification testbenches and components for ARM-based SoC designs. Execute thorough verification processes, including the development of test plans and test cases using C, SV, and UVM. Collaborate closely with design teams to understand and validate the various features of the SoC. Focus on stress testing, bug identification, and overall quality improvement of SoC IPs. Provide clear communication on project planning, status updates, and expectations. Contribute to the enhancement of verification tools and methodologies to improve efficiency. Mentor and guide junior engineers in verification processes and best practices. Required Skills and Experience: 4+ years in SoC verification. Proficient in ARM architecture and ARM-based system design. Extensive experience with C, System Verilog (SV), and UVM. Skilled in developing and executing verification test plans and testbenches. Expertise in verification tasks such as interrupts, memory map, RAS, and boot processes. Strong SoC-level and ARM debugging capabilities. Familiarity with microprocessor and SoC architecture, especially ARM processors. Nice to Have Skills and Experience: Experience with power-aware verification methodologies. Familiarity with hierarchical memory systems and their verification. Strong understanding of CPU microarchitecture Interested can share me your Resume to akshatha.b@swediumglobal.com Job Types: Full-time, Permanent Pay: From ₹3,000,000.00 per year Schedule: Day shift Application Question(s): Where exactly in bangalore? How soon you can join us? Experience: Verification: 4 years (Preferred) Location: Banglore, Karnataka (Preferred) Work Location: In person

We are looking for an experienced and detail-oriented Pre-Silicon Validation Engineer. In this role, you will be responsible for verifying the functionality and performance of complex digital designs before they are sent for fabrication. You’ll work closely with architects, RTL designers, and verification teams to ensure first-silicon success. If you have a strong engineering background and a passion for working on cutting-edge SoC and IP validation, this is your opportunity to make a meaningful impact in a dynamic and collaborative environment. Key Responsibilities: Define and execute verification plans for SoC/IP-level functional and performance validation. Develop constrained-random and directed testbenches using System Verilog/UVM. Build and maintain verification environments to support simulation, formal, and coverage-driven validation. Collaborate closely with RTL designers and architects to understand specifications and define corner cases. Debug test failures, identify root causes, and work with design teams to resolve issues. Analyze code and functional coverage to ensure thorough validation and identify gaps. Document test plans, validation results, and contribute to post-mortem analysis and lessons learned. Support regression infrastructure and continuous integration for design verification.

😊Greetings of the day😊!!! This is regarding a Job opportunity with eInfochips as we are having a position of ASIC/FPGA RTL DESIGN ENGINEERS Experience- 4 to 9 Years Location- Noida Job Description: Experience in RTL design Verilog/VHDL Simulation tools, Modeslim/VCS etc. Basic protocols, I2C, UART, PCIe, SPI etc. Micro-Architecture experience is a plus CDC/Lint tools Timing analysys CDC design ISO26262 is plus SOC integration Interested candidates share resume at medha.gaur@einfochips.com

Job Title: Trainee Engineer Location: Onsite at Hyderabad, Telangana, India Roles and Responsibilities: Design and develop FPGA-based systems utilizing VLSI technology and programming languages like VHDL and Verilog. Collaborate with a cross-functional team of software developers, hardware engineers, and system architects to deliver robust solutions. Conduct system-level design and simulation to ensure performance meets specifications and requirements. Perform verification and validation of FPGA designs through simulation and testing to ensure product reliability and efficiency. Participate in the entire product lifecycle from concept stage to deployment, including design, coding, testing, and documentation. Optimize FPGA designs for improved performance, power efficiency, and resource utilization. Identify and resolve technical challenges related to FPGA designs and VLSI implementations. Maintain up-to-date knowledge of industry best practices, emerging technologies, and regulatory requirements for FPGA and VLSI. Required Qualifications: B. Tech (ECE) Proven experience in FPGA design, preferably with exposure to VLSI technology. Strong proficiency in VHDL and Verilog for system design and implementation. Hands-on experience with FPGA development tools and simulation software. Solid understanding of digital design principles and hardware description languages. Excellent problem-solving skills and ability to troubleshoot design and implementation issues effectively. Strong communication skills for effective collaboration with team members and stakeholders. Experience in working onsite in a fast-paced engineering environment. Key Responsibilities: Lead the design and optimization of FPGA and VLSI systems to enhance performance, efficiency, and integration. Work closely with project managers and customers to align FPGA solutions with project goals and customer specifications. Create detailed design documentation and technical reports to support project deliverables and stakeholder engagement. Contribute to continuous improvements in the engineering team by sharing knowledge, best practices, and driving innovation. Support the testing and prototyping of systems to validate hardware functionality in tandem with software applications. Ensure compliance with safety and industry standards during design, development, and deployment processes. Mentor junior engineers and provide guidance on FPGA and VLSI topics to promote team development. Job Type: Permanent Pay: ₹25,000.00 per month Schedule: Day shift Ability to commute/relocate: Secunderabad H.O, Hyderabad, Telangana: Reliably commute or planning to relocate before starting work (Required) Education: Bachelor's (Preferred) Experience: VLSI: 1 year (Preferred) FPGA: 1 year (Preferred) RFSoC & EDK Software: 1 year (Preferred) Work Location: In person

Looking for a high-performance individual to work on the Synopsys next generation emulation solutions encompassing Virtual and Physical interface solutions on for PCIE, CXL, USB, Ethernet. The selected candidate will work on product verification and product engineering of these products ensuring all system level scenarios in the concerned product/solution are exhaustively verified and gets deployed at hyperscale customers. The person is required to be motivated and self-driven and would work among a knowledgeable and experienced set of people, adding to his/her learning. Academic Qualification/Skills required: B.E / M.E. in Electronic & Communication / Computer Science Engineering High performance individual to work on Synopsys next generation emulation solutions for PCIe, USB, Ethernet protocols Good knowledge of one of peripheral protocols primarily PCIe, USB, Ethernet Knowledge of System Level verification and validation, and digital design concepts Knowledge of languages such as Verilog, System Verilog, C/C++, and scripting languages- Perl/TCL/Shell, Python Knowledge of emulation and prototyping domains an added advantage 6-8 Years of experience in protocols/design verification and validation, scripting, and automation Good communication skills and team player

Experience: 6 - 15 years Responsibilities: Verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/DDRx/LPDDRx/AI accelarator integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing C based software tests, SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. Working with project management and leads on planning tasks, schedules, and reporting progress Collaborate with engineers from other teams including architecture, design, implementation, modelling, performance analysis, silicon validation, FPGA and board development Required Skills and Experience Proven understanding of digital hardware verification language Verilog/Systemverilog HDL Experience in SoC verification using Embedded Low-level programming including C/C++ tests and assembly language(preferably ARM) Experienced in SoC verification using Experienced in one or more of various verification methodologies UVM/OVM, formal, power aware verification, emulation Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support Good Problem Solving and Debugging skills. Knowledge of SoC Verification Flow and strategy. Experience with ARM-based designs and/or ARM System Architectures, SoC Boot flow, Cache coherency Porting peripheral driver software for SoC tests Clock Domain Crossing verification Experienced in GLS, DFT/DFD, Experienced in UPF Power Aware verification Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.)

Lattice is seeking candidates for the position of Staff Software Development Engineer in FPGA place and route. This is a full-time position located in Pune, India. The successful candidate will join a team designing and developing Lattice FPGA implementation software tools. The candidate will contribute to delivering software solution for Lattice FPGA development with emphasis on Lattice synthesis mapper tool. The candidate is expected to be an expert in FPGA synthesis core engine and technological mapping with knowledge on how to achieve optimal solution for a given architecture and be able to support next generation FPGA with best result in Fmax, Area, Runtime as we'll as memory utilization The candidate will team up with other synthesis/mapper developers and develop synthesis mapping engine for various FPGA products. The responsibility also includes customer support, new software feature support as we'll as QoR improvement. The candidate is expected to maintain existing software products and interact with other teams to facilitate a value-added solution too. Accountabilities: Develop logic synthesis/mapper tool for Lattice FPGA products. Synthesize logic designs from Verilog/VHDL RTL to structural netlist. Improve synthesis/mapper engine QoR. Create test designs with test benches to verify implementation and ensure high quality. Qualifications: BS/MS/PhD in Electrical Engineering or Computer Science or Computer Engineering. Proficient with C/C++, Verilog/VHDL, logic design, Tcl and shell scripts. Strong background and experience in data structures and algorithms. Experience of logic design and EDA software is a must. Experience of logic optimization and technology mapping development is required. Experience of FPGA tool development is preferred. Strong written and verbal communication skills, and collaboration skill. Experience of multi-processing development is a plus. Solid understanding in FPGA architectures is a plus. 10+ years of experience in logic synthesis development in FPGA or ASIC domains