3614 Verilog Jobs - Page 41

Eximietas Hiring Senior Design Verification Engineers/Leads (PCIE) Experience - 10+ Yrs. Location - Hyderabad Job Description: Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. Develop and implement comprehensive verification strategies , including test plans, testbenches, and coverage analysis, for both high-speed and low-speed peripherals (e.g., I2C, SPI, UART, GPIO, QSPI) as well as high-speed protocols (e.g., PCIe, Ethernet, CXL, MIPI, DDR, HBM ). Conduct Gate-level simulations and power-aware verification using tools like Xprop and UPF . Collaborate closely with cross-functional teams, including architects, designers , and pr...

Eximietas Hiring Senior Design Verification Engineers/Leads (PCIE) Experience - 10+ Yrs. Location - Visakhapatnam. Job Description: Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. Develop and implement comprehensive verification strategies , including test plans, testbenches, and coverage analysis, for both high-speed and low-speed peripherals (e.g., I2C, SPI, UART, GPIO, QSPI) as well as high-speed protocols (e.g., PCIe, Ethernet, CXL, MIPI, DDR, HBM ). Conduct Gate-level simulations and power-aware verification using tools like Xprop and UPF . Collaborate closely with cross-functional teams, including architects, designers , a...

Eximietas Hiring: ASIC SOC RTL Micro Architect Experience: 8+ years Location: Visakhapatnam Job Description: Eximietas Design is seeking an experienced and highly skilled RTL Micro Architect to join our growing team. As a key contributor, you will play a critical role in defining and implementing the microarchitecture of cutting-edge semiconductor designs. You will work on complex RTL design challenges, collaborate with cross-functional teams, and contribute to the delivery of high-performance, power-efficient, and innovative solutions. Key Responsibilities: Define and develop microarchitecture specifications for complex SoC designs. Lead RTL design and implementation using Verilog/System Ve...

Hi All, Greetings' from Eximietas Design....! We are Hiring ASIC SOC RTL Design Engineer/Leads. Job Title: ASIC SOC RTL Design Engineer/Leads ..! Experience: 8+ Years. Location: Visakhapatnam or Bangalore. Job Description: Eximietas Design is seeking an experienced and highly skilled ASIC SOC RTL Design to join our growing team. As a key contributor, you will play a critical role in defining and implementing the microarchitecture of cutting-edge semiconductor designs. You will work on complex RTL design challenges, collaborate with cross-functional teams, and contribute to the delivery of high-performance, power-efficient, and innovative solutions. Key Responsibilities: Define and develop mi...

Bangalore, India • Full Time Meta Infrastructure Engineering Hardware Meta is hiring Application-Specific Integrated Circuit (ASIC) Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer, you will be part of a team working with the best in the industry, focused on developing ASIC solutions for Meta’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based testbench development to verification closure. Along with traditional s...

Design Verification Engineer (Senior Level - 5+ years’ experience) Company: HCL Tech Job Summary: We are seeking a highly accomplished Design Verification Engineer (DV) to join our elite team and lead the verification efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of verification methodologies and the ability to drive the development and execution of comprehensive verification plans. You will be responsible for ensuring the functional integrity and quality of our next-generation integrated circuits through innovative verification strategies. Responsibilities: Lead and define the overall verification strategy for assigned projects, leveraging...

We are seeking a Senior R&D Engineers to join our world-class Synthesis team in Noida, which supports a range of EDA products. Does this sound like a good role for you? Senior/Lead R&D Engineer (C/C++, Data structures, Algorithms) Location: Noida Experience: 4yrs to 12yrs Strong hands-on experience in C/C++ based software development . Strong background in Design Patterns, Data Structure, Algorithms, and programming concepts. Familiarity with multi-threaded and distributed code development & ASIC design flow and the EDA tools and methodologies used therein. Good knowledge of Verilog, System Verilog & VHDL HDL Well versed with Software Engineering and development processes Experience of produ...

Design Verification Engineer (6+ years’ experience)/Limited Walkin interview (Physical Drive) on 23rd of Aug'25, Saturday Job Summary: We are seeking a highly skilled Design Verification Engineer (DV) to join our growing team and play a vital role in ensuring the quality and functionality of our advanced ASICs and SoCs. This position requires a strong foundation in verification methodologies and the ability to handle complex verification tasks. You will be instrumental in developing robust verification plans and environments to guarantee the success of our next-generation integrated circuits. Responsibilities: Develop and implement comprehensive verification plans utilizing industry-leading ...

Design Verification Manager We need an experienced DV lead/manager to verify IP/SoC using System Verilog/UVM Exposure to various interface IP like I2C/SPI/UART/USB/NVM/PCIe; Buses AXI/AHB/APB; ARM based SoC designs is needed. Skills: Overall 7+ years industry experience with 5+ years in Design Verification using System-Verilog/C/UVM. Generic knowhow on Digital Design and Verification methodologies. Experience in System Verilog/UVM based IP/SoC verification using advanced technologies. Good understanding of Constraint based Random verification; VIP coding; Test Plan design; Test cases coding; Coverage strategies and measurement Proficient in EDA tools used for Design Verification (e.g. Cadenc...

Job Description Quick learner with strong critical thinking and creative problem-solving skills. Solid knowledge in ASIC design process, computer architecture, digital design and UVM-based design verification methodologies. Proficient on using design and verification languages: UVM, Verilog, System Verilog, and System Verilog Assertions (SVA). Proficient on Design Verification tools and techniques, including test bench development, simulation, debugging and coverage closure, etc. Proficient on Design Verification development process, from specification to test plan, to configurable test bench, drivers and checkers setup, to test suite building to meet functional and code coverage goals, and ...

Job Description Summary Lead FPGA Engineer will be responsible for leading/executing complex FPGA design projects and solutions. You will work in a global environment with skilled team of engineers creating and improving a state-of-the-art platform for use in every kind of power generation application Job Description Essential Responsibilities Select the FPGA, CPLD family and chip suitable for the application. Develop FPGA design requirements based on system requirements document. Define FPGA interfaces with other circuitry along with hardware design engineer. Do FPGA programming, synthesis and simulation, timing analysis and optimization. Validate system along with the hardware and firmware...

Job Description In your new role you will: Will be part of a team that handles Verification for complex SoCs and close the Verification to the challenging milestones. SoC Verification: Full-chip VR creation as per the chip requirements and UVM/OVM Test benches creation Support in building verification infrastructure at the chip level asper the requirements Capable of handling multiple areas of SoC Verification: RTL, Power Aware and Gate Level Verification Your Profile You are best equipped for this task if you have: Bachelor's - 6 to 7 years’ experience, Master’s - 5 to 6 years’experience Good understanding of ASIC verification concepts and techniques. Very good knowledge of Verilog/System V...

Job Description Change the world. Love your job. TI is seeking a candidate for the role of Analog and Mixed Signal Design Verification Engineer. About The Team The Voltage Reference and Supervisors team in the TI-Analog Power Products vertical is engaged in development of cutting age products in the domain of voltage references and supervisor IC’s. The products developed by the team are used in wide variety of end-equipment’s ranging from test and measurement – bench equipment’s like DMMs, DAQ systems, channel cards in ATE, to solar inverters and automotive subsystems for ICE/HEV/EV vehicles. The product mix ranges from highest precision products (ppm grade accuracy) to highest voltage (1000...

Job Description Change the world. Love your job. Texas Instruments is seeking Design Verification Engineer. In this role you will confirm the accuracy of designs for analog and mixed signal electronic parts, components, or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems before pattern generation/mask development. The role will require working independently from the product development team who designed the devices to confirm adherence to known design rules, procedures, and best practices. Additional job functions include analyzing equipment to establish operating data and conducting experimental tests and evaluating results to confirm the devi...

Staff / SR. Staff Digital Design Engineer, Interface IP Description & Requirements We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An enthusiastic and detail-oriented ASIC Digital Design Engineer with a passion for cutting-edge technology and a penchant for solving complex problems. You thrive in a collaborative environment and...

PROXELERA Hiring an experienced Lead SoC / NoC Verification Engineer 10+yrs of experience in Bangalore to drive the verification of high-performance SoC / NoC Interconnect Architectures This role demands a blend of technical depth, leadership and a strong strategic mindset Title: Lead SoC / NoC Verification Engineer Bangalore, India Responsibilities Lead verification projects for complex SoC and NoC Subsystems. Develop scalable and reusable System Verilog / UVM-based environments Define and implement test plans for functional coverage performance and corner-case analysis Collaborate with design teams to debug and resolve challenging logic and protocol-level issues Work with high-speed interc...

Qualcomm India Private Limited is seeking talented engineers for CPU RTL development targeted at high-performance, low-power devices. As a CPU Micro-architecture and RTL Design Engineer, you will collaborate with chip architects to conceptualize the micro-architecture and contribute to architecture/product definition early in the product life-cycle. Your responsibilities will include performance exploration, microarchitecture development and specification, RTL ownership to achieve power, performance, area, and timing goals, functional verification support, performance verification support, and design delivery in coordination with a multi-functional engineering team. To excel in this role, yo...

As an ASIC Verification Engineer at our game-changing AI solutions company, you will be responsible for developing verification environments for modules, subsystems, top level, and FPGA. You will build models, checkers, and random test frameworks using SystemVerilog and UVM. Additionally, you will participate in Low power analysis (UPF), power estimation, and C modeling. Your role will also involve performing lint, CDC, code coverage, and functional coverage, as well as formal verification of modules using SVA assertions. To excel in this role, you should have experience in verifying complex subsystems and ASICs. You should be adept at building scalable verification environments from scratch...

At Atos, we are a global leader in digital transformation, employing around 78,000 individuals and generating an annual revenue of approximately 10 billion. As the top cybersecurity, cloud, and high-performance computing provider in Europe, we offer customized end-to-end solutions to various industries across 68 countries. We are at the forefront of decarbonization services and products, dedicated to providing our clients with secure and sustainable digital solutions. Atos operates as a SE (Societas Europaea) and is listed on Euronext Paris. Our mission at Atos is to shape the future of the information space. Through our expertise and services, we facilitate the advancement of knowledge, edu...

You will be responsible for designing and implementing DFT IP using Verilog/SystemVerilog and/or VHDL. This includes designing and implementing RTL for DFT IP, including POST and IST. Additionally, you will be developing synthesis automation for DFT IP, which involves synthesis and timing constraints, RTL insertion, and verification. Your role will also involve owning, maintaining, extending, and enhancing existing DFT IP like LBIST. At Cadence, we are focused on hiring and developing leaders and innovators who are passionate about making an impact on the world of technology. Join us in our mission to solve challenges that others cannot.,

Principal / Staff Design Verification Engineer Bangalore Our client can be described as "Developing Foundational Technologies for Chiplet Based Semiconductor Design". They are an early-stage startup, pioneering technologies for the emerging multi-chiplet system-on-package paradigm. Their mission is to enable the next wave of growth in the semiconductor space, and they're looking for passionate individuals to join a seasoned and dynamic team. Positions Available in Bengaluru, India/fully onsite Principal Design Verification engineer Responsibilities​: Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet sy...

Principal IP/RTL Design Engineer for Ethernet Switch Hyderabad / Bangalore Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Position Overview IP/RTL Design Engineer for Ethernet Switch Position Overview We are seeking an experienced IP/RTL Design Engineer with over 10 years of experience to join our team in designing and developing intellectual property (IP) and RTL for Ethernet switches tailored for AI datacenter backend networks. The ideal candidate will have a strong background in digital design, ASIC/FPGA development, Ethernet protocols, and experience with high-performance interconnect protocols ...

AI Centre Ethernet Switching Architect India-remote. person could be based anywhere in India - Remote work will be considered for exceptional profiles Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore AI Centre Ethernet Switching Architect Position Overview We are seeking a top-notch specialist Architect with over 20 years of experience to join our team in designing and developing Ethernet switches tailored for AI datacenter backend networks. The ideal candidate will have a strong background in digital design, ASIC/FPGA development, Ethernet/TCP/IP protocols, and experience with high-performance interc...

Wafer Space is looking for expert DFT engineers for development, support, maintenance, Implementation and Testing of complex components of an ASIC/SOC/FPGA/Board. Desired Skills And Experience- 3 - 7 year's experience in DFT Good experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan. DFT logic integration and verification. Experience in debugging low coverage and DRC fixes Gate Level ATPG simulation with and without timing. Pattern generation, verification, and delivery to ATE team. Post silicon debug and support on failing patterns. Good experience with tools from Mentor/Synopsis/Cadence. LBIST experience is plus. DFT mode STA and timing closure support. Familiarity ...

The ideal candidate will be required to work on both IP development and integration into SoCs catering to various markets and tech nodes. Job will involve RTL design, front end tools flow and SoC integration/ porting related tasks. Desired Skills And Experience- 8 years of Experience Engineering experience with exposure to front end ASIC tool flows Should be self-driven and independent in tracking and closing tasks with respective owners In depth knowledge of AHB and bus infrastructures like matrix and fabrics Good understanding of ARM based SoC Architecture Exposure to ARM Cortex A/M integration or support Good understanding of SoC DV methodology Good experience in Low-Power design methodol...