2321 Verilog Jobs - Page 45

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: You will be working with our DFT team from Hyderabad/Work from Home as required to develop DFT tests. These tests are intended to catch manufacturing defects in targeted IPs inside FPGA/SoC. In this role you will have an opportunity to understand in depth FPGA/SoC silicon architectures, ATPG, MBIST Verification at full chip level, DFT/Testability hooks in Silicon, methods and principles to develop ATPG/Functional test vectors, simulate, debug and generate patterns for production tests. You will work closely with Architects, Design engineers, Verification engineers and Software engineers across the globe to ensure FPGA division deploys new products with the highest quality and shortest time to market. Skills will be developed to work on multiple projects supporting key functions within the organization. Good communication and presentation skills are required. Requirements/Qualifications: Understanding basics of DFT structures (OCC, SSN, SIB, WBRs, compression engine), ATPG(Intest/Extest) , MBIST, Boundary Scan (IEEE 1149.1) Tap Controller, Generating, verifying and debugging test patterns at block and chip-level retargeting to test the designs and firmware for new FPGA families. Improving, extending and porting existing manufacturing test designs to all FPGA family members. Test specification, plan, and documentation Hands on experience with industry standard ATPG tools, MBIST, pattern simulation and debugging skills at block and chip-level. Hands-on experience with Verilog behavioral RTL and Gate level netlist. Comfortable with Unix, Perl and/or Shell scripting and familiar with Revision Control (CVS, SVN, …) Strong analytical and problem-solving skills Excellent communication, documentation and presentation skills. Must have strong self-learning ability and enjoy working in teams spread across globe. Good programming skill/Firmware development skills with C, C++/assembly will be a big plus. Exposure to ASIC/FPGA design flow and methodology is a plus (HDL, synthesis, static timing analysis, constraining, Place & Route) BS or MS in EE with 5 to 6 years of experience of working in DFT Travel Time: 0% - 25% To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Define and develop verification environments Write verification plans, and documentation Generate test bench and automatic regression plans Be responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designs Complete block-level verification and chip level verification Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges Able to work mostly independently and handle complex SoC Verification platform. Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities Requirements/Qualifications: Minimum of 8 years related proven silicon design or verification work experience Hands on project experience with leading edge verification methodologies like OVM/UVM One of the Protocol knowledges AXI/AHB/DDR/PCIe is must Hands on project experience in coverage/assertion driven verification Knowledge of IC chip design, development flow, process, and methodology Knowledge of CMOS logic design, circuit design, and circuit analysis Proficient in HDL languages System Verilog, Verilog and VHDL Good knowledge of UNIX shell scripting, Perl and TCL scripting. Good knowledge and understanding of CMOS device operation and characteristics Proven experience in writing verification plans and test bench development, simulation, and debugging Proficient with UNIX environment, and CAE/CAD tools such as schematic capture, simulation, design verification Must be able to learn new technology Good analytical and problem-solving skills Excellent written and verbal communication in English. Experience dealing with and communicating at different levels of the organization Travel Time: 0% - 25% To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Should have hands on verification experience on Processor based subsystem, RISV-V knowledge is an added advantage Should have hands on verification experience on AMBA protocol Scripting experience is an added advantage Must have strong SV UVM skill Strong analytical and problem-solving skills Should be able to work independently Requirements/Qualifications: 6 years related proven silicon design or verification work experience Hands on project experience with leading edge verification methodologies like OVM/UVM Worked at system level verification/validation Hands on experience on C-based verification Hands on project experience in coverage/assertion driven verification Knowledge of IC chip design, development flow, process, and methodology Proficient in HDL languages SystemVerilog, Verilog and VHDL Good knowledge of UNIX shell scripting, Perl and TCL scripting. Proven experience in writing verification plans and test bench development , simulation, and debugging Proficient with UNIX environment, and CAE/CAD tools such as schematic capture, simulation, design verification Good analytical and problem solving skills Excellent written and verbal communication in English Travel Time: 0% - 25% To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? Position Overview Siemens EDA is looking for a highly motivated Product Engineer to help define, promote, and deploy hardware assisted acceleration with Veloce emulation and prototyping solutions at leading edge semiconductor and systems customers. As a hardware-assisted verification solutions expert you will be part of the world-wide Veloce experts team working with emulation and prototyping solutions for pre and post silicon validation, verification and software bring-up of industry’s most complex SoC and FPGA designs using the latest advances in co-emulation technologies with Veloce Transactor Layer (VTL) transactors and testbenches. Key responsibilities Assist applications engineers (AEs) and customers with integration and debug of verification solutions to enable Testbench acceleration in a hardware-assisted verification environment Support PCIe, AMBA-based, UART, and serial protocol (SPI, I2C, …) transactors targeting emulation and prototype platforms. Build or support example designs for solutions that use SystemC or UVM transactors. Drive Veloce technology at various customers using hands-on technical expertise. Requires working directly with customers to ensure technical results are met. Promote technical customer service to build and improve customer relationships, ensuring long term customer happiness. Work closely with the sales team in a focused strategy to expand our business. Provide feedback and product ideas to our solutions product development teams. Troubleshoot and remove technical obstacles. Work very closely with all team member to ensure full customer happiness. Develop and deliver technical presentations/trainings on new features and product updates. Communicate customers' technical requirements to product marketing. Develop a network of technical relationships at a peer-to-peer level with our customers. Use complex design and tooling tasks involving multiple design environments. Cogently communicate software problems to product development. Assists other specialists in the design, development, and implementation of large-scale solutions on multiple software products and hardware platforms. Provides business and technical feedback to software and hardware vendors. Use advanced data exchange methodologies to facilitate effective data sharing between dissimilar systems or applications that span across engineering disciplines. Responsible for in-depth technical papers and presentations to customer management or at technical conferences. Guide junior engineers. Work with minimal direction on complex projects with latitude for independent judgment and discretion. Well skilled with broad proficiency. Required Qualifications We seek a graduate (Bachelor's) with 5+ years of related experience or post graduate (Master's) with 3+ years of proven track record. Familiarity with Verilog/SystemVerilog or SystemC and UVM Must have experience with emulation of large scale CPU, GPU or Systems-on-Chip (MPSoC) designs, emulation technologies, usages and industry approaches. Prior experience in a customer facing function such as application engineer from an emulation or prototype systems provider a plus! We've got a lot to offer, how about you? We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #LI-EDA #LI-HYBRID

Lead the architecture and RTL design of complex digital blocks and subsystems for ASICs or SoCs Develop RTL using Verilog/SystemVerilog to meet functional and performance specifications Review micro-architecture and provide design solutions optimized for power, performance, and area Work closely with the verification team to ensure thorough test coverage and efficient debugging Collaborate with synthesis, STA, and physical design teams for design closure

Desired Profile : You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. Academic Credentials : MS or BS in Computer Engineering/ Computer Science with 5+ years working experience in ASIC RTL design. Key Responsibilities : 1. Develop micro-architecture and design for high-speed IO controller blocks based on architectural requirement 2. Conduct design reviews of designs in technical presentations to peers and management. 3. Develop RTL code for high-speed IO controller blocks in Verilog HDL and make sure functional correct and reusable for different configuration. 4. Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure. 5. Work with Design Verification team to ensure quality for architecture definition and design implementation. 6. Provide guidance and leadership to the team members. Preferred Experience : 1. Strong knowledge in computer architecture and interconnects. 2. Strong experience in high speed IO controller design (e.g. USB, PCIe, SATA, Thunderbolt). USB and/or Thunderbolt a strong plus. 3. Experience in full ASIC design cycle: requirements definition, architectural and micro-architectural specification, RTL, design verification, floor-planning, synthesis, timing closure, post-silicon validation. 4. Expert on Verilog RTL design and has experience of large digital ASIC project. 5. Familiar with front-end EDA tools and flows. 6. Familiar with Unix/Linux and scripts (tcl, perl, ruby and etc.) 7. Preferred candidates with valid work permit (Green Card / US Citizen / H1B)

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description You will be working with our DFT team from Hyderabad/Work from Home as required to develop DFT tests. These tests are intended to catch manufacturing defects in targeted IPs inside FPGA/SoC. In this role you will have an opportunity to understand in depth FPGA/SoC silicon architectures, ATPG, MBIST Verification at full chip level, DFT/Testability hooks in Silicon, methods and principles to develop ATPG/Functional test vectors, simulate, debug and generate patterns for production tests. You will work closely with Architects, Design engineers, Verification engineers and Software engineers across the globe to ensure FPGA division deploys new products with the highest quality and shortest time to market. Skills will be developed to work on multiple projects supporting key functions within the organization. Good communication and presentation skills are required. Requirements/Qualifications Understanding basics of DFT structures (OCC, SSN, SIB, WBRs, compression engine), ATPG(Intest/Extest) , MBIST, Boundary Scan (IEEE 1149.1) Tap Controller, Generating, verifying and debugging test patterns at block and chip-level retargeting to test the designs and firmware for new FPGA families. Improving, extending and porting existing manufacturing test designs to all FPGA family members. Test specification, plan, and documentation Hands on experience with industry standard ATPG tools, MBIST, pattern simulation and debugging skills at block and chip-level. Hands-on experience with Verilog behavioral RTL and Gate level netlist. Comfortable with Unix, Perl and/or Shell scripting and familiar with Revision Control (CVS, SVN, …) Strong analytical and problem-solving skills Excellent communication, documentation and presentation skills. Must have strong self-learning ability and enjoy working in teams spread across globe. Good programming skill/Firmware development skills with C, C++/assembly will be a big plus. Exposure to ASIC/FPGA design flow and methodology is a plus (HDL, synthesis, static timing analysis, constraining, Place & Route) BS or MS in EE with 5 to 6 years of experience of working in DFT Travel Time 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description Should have hands on verification experience on Processor based subsystem, RISV-V knowledge is an added advantage Should have hands on verification experience on AMBA protocol Scripting experience is an added advantage Must have strong SV UVM skill Strong analytical and problem-solving skills Should be able to work independently Requirements/Qualifications 6 years related proven silicon design or verification work experience Hands on project experience with leading edge verification methodologies like OVM/UVM Worked at system level verification/validation Hands on experience on C-based verification Hands on project experience in coverage/assertion driven verification Knowledge of IC chip design, development flow, process, and methodology Proficient in HDL languages SystemVerilog, Verilog and VHDL Good knowledge of UNIX shell scripting, Perl and TCL scripting. Proven experience in writing verification plans and test bench development , simulation, and debugging Proficient with UNIX environment, and CAE/CAD tools such as schematic capture, simulation, design verification Good analytical and problem solving skills Excellent written and verbal communication in English Travel Time 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description We are seeking a diligent Verification leader to join our team at Renesas. The Verification engineer will be responsible for performing various verification tasks including Test Plan creation, Testcase creation, Coverage closure, Requirements traceability and Gate Level Simulation. They will also review system requirements and track quality assurance metrics. Ultimately, the role of the Verification Engineer is to ensure that our products, applications, and systems work correctly, safely & securely. Responsibilities Drive Verification R&D team driving technical execution and best in class methodologies used in the design of advanced microcontrollers and microprocessors. Work closely with system architects to understand high level specifications to be able to verify them. Work with various EDA vendors to deploy next generation tools Build strong collaboration with other R&D teams such as RTL, DFT, digital IP, PD, Design Enablement, Emulation, and Validation to achieve project milestones Promote continuous improvement to design techniques to ensure ‘Zero Defect’ chips Collaborate with SME’s and key leaders in architecture, systems, emulation, SoC design, software, physical design, and IP teams developing key technical networks to influence overall design improvements and verification methodologies Responsible for developing detailed Technical SoC verification execution plans, progress reports and tracking milestones, managing technical risks, and providing mitigations to meet schedule quality and costs commitments. Communicate across technical teas as well as provide executive level presentations Complete ownership for SoC verification quality sign-offs ensuring all deliverables for team hand-offs. Drive best in class verification methodologies collaborating with global internal and external SME’s and developing adoption and compliance processes. Including, driving key innovation strategies which significantly impact efficiency and quality for overall R&D and ROI. Qualifications Degree in Electrical/Electronic Engineering, Computer Engineering or Computer Science At least 10 years of experience in SoC Verification domains and have working knowledge of industry standard EDA toolkits. Proven experience in testbench design and development using UVM methodology for IP/Subsystem and SOC. Experience in Microcontroller and Microprocessor architecture & Interconnect Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR5/5x) and memory controllers. Advanced knowledge of Verilog, System Verilog, C/C++, Shell. Good knowledge in scripting like Perl, TCL or Python is a plus High proficiency in Metric Driven Verification concepts, functional and code coverage. Expertise in directed and constrained random methodologies. Good knowledge of formal verification methodologies and assertions. Experience with debugging of designs pre- and post-silicon, in simulation and on the bench. Excellent written and verbal communication skill. Must have worked on complex, multi-core SoC’s with extensive interconnects and a large range of peripherals. Fair domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must. Any of following experience would be a plus: High Speed Peripherals like DDR, PCIe, UCIe, Ethernet, GPU, VPU (Video Processing Unit); NIC/Flex NOC interconnect; Flash memory subsystems. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

The SoC and 3D-IC design construction CAD team provides automated environments for industry leading technologies and complex 3D stack products across the AMD portfolio The flows provide end-to-end automation for users across design planning, implementation, and analysis Experience with Verilog, clock and power distributions, high-performance bus implementation, and timing budgeting is preferred The role will be a part of a global team working in concert with project design teams from North America, China, and India You will work directly with the global CAD organization and project teams to understand the design requirements and deliver innovative solutions using EDA tools and custom in-house capabilities Individuals should have a strong silicon hardware design background and be proficient in software and scripting development 3D die-stack planning, integration, and routing Chip-to-chip and chip-to-package interface planning and implementation Bump/bond and TSV planning and layout Connectivity and DRC verification Design for signal integrity and thermal robustness Routing techniques for die-to-die communication protocols such as HBM and UCIe THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills, eager to learn, and ready to take on problems. KEY RESPONSIBILITIES: Work closely with CAD implementation members to deliver high quality tools and flows that meet all the key metrics of QoR: Manufacturability, Reliability, Timing, Area, and Performance. Regress methodology and develop capabilities to improve quality. Develop the strategy and key initiatives to ensure the CAD flows meet the future design needs and the most advances technologies. PREFERRED EXPERIENCE: 3-5 years experience in Silicon design or CAD/EDA development Understanding of EDA tools from Synopsys and Cadence Synopsys 3DIC Compiler experience is a plus Proficient in programming with Python and Linux Familiar in automating workflows in a distributed compute environment. Excellent communication skills (both written and oral). ACADEMIC CREDENTIALS: Bachelors or Masters degree in Computer Engineering/Electrical Engineering

DDR Analog Design Architect Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development. Play Video Job Description Category Engineering Hire Type Employee Job ID 10294 Remote Eligible No Date Posted 02/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced, innovative, and passionate Analog Design Engineer with a deep understanding of transistor-level circuit design and practical experience in developing high-speed analog and mixed-signal integrated circuits. With over a decade of experience in the field, you are well-versed in the latest FinFET technologies and possess a sound knowledge of CMOS design fundamentals. You thrive in a collaborative environment, working alongside cross-functional teams of analog and digital designers to push the boundaries of what is possible in the semiconductor industry. Your expertise extends to various DDR or SerDes sub-circuits, and you have a keen eye for detail, ensuring that designs meet optimal power, area, and performance targets. Your excellent communication and documentation skills enable you to present complex simulation data clearly and consult on the electrical characterization of circuits within the IP product. You are a problem-solver, continuously seeking innovative solutions to minimize parasitic effects, device stress, and process variation. Ultimately, you are driven by a passion for innovation and a commitment to excellence in analog IC design. What You ll Be Doing: Reviewing JEDEC standards to develop analog and mixed-signal sub-block specifications. Identifying and refining circuit architectures to achieve optimal power, area, and performance targets. Proposing design and verification strategies that efficiently use simulator features to ensure the highest quality design. Overseeing physical layout to minimize the effect of parasitic, device stress, process variation, and ESD/Latch-Up protection. Presenting simulation data for peer and customer review. Documenting design features and test plans. Consulting on the electrical characterization of your circuit within the IP product. The Impact You Will Have: Driving innovation in high-speed analog and mixed-signal integrated circuit design. Ensuring Synopsys IP solutions meet and exceed industry standards and customer expectations. Contributing to the development of cutting-edge technologies that power the future of computing and connectivity. Enhancing the performance and reliability of our IP products through meticulous design and verification processes. Collaborating with a diverse team of experts to push the boundaries of what is possible in analog IC design. Supporting the continuous improvement of our design environment and tools, ensuring they remain best-in-class. What You ll Need: PhD with 12+ years, or MSc with 15+ years of analog IC design experience. In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals. Experience with FinFET technologies. Detailed design experience with at least one, and familiarity with several other DDR or SerDes sub-circuits. Knowledge of design for reliability, including EM, IR, and aging. Experience with tools for schematic entry, physical layout, and design verification. Hands-on experience with physical layout of high-speed circuits is a plus. Knowledge of SPICE simulators and simulation methods. Proficiency in Verilog-A for analog behavioral modeling and simulation-control / data-capture. Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB. Who You Are: You are a dedicated and innovative engineer with strong analytical skills and a passion for analog IC design. Your excellent communication and collaboration abilities allow you to work effectively within a diverse team. You are detail-oriented, with a commitment to delivering high-quality designs. Your problem-solving skills and ability to think critically enable you to overcome complex challenges and drive technological advancements. The Team You ll Be A Part Of: You will be part of an R&D team developing high-speed analog and mixed-signal integrated circuits for DDR/LPDDR PHY, High Bandwidth Memory (HBM) PHY, Universal Chiplet Interconnect Express (UCIe) PHY, and Mobile Storage PHY IPs. Our team is composed of talented analog and digital designers from diverse backgrounds, working together in a collaborative and innovative environment. We utilize a full suite of IC design tools, supplemented by custom in-house tools, and supported by an experienced software/CAD team. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply As an applicant your resume, skills, and experience are being reviewed for consideration. Phone Screen Once your resume has been selected a recruiter and/or hiring manager will reach out to learn more about you and share more about the role. Interview You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via Zoom. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

DIGITAL & FPGA design engineer shall provide technical support in the domains of design and development, realizing & testing of signal conditioning, digital interfaces, control electronics, handling and implementation of signal processing and communication system design as well as implementing designs on FPGAs through automatic HDL code generation and verification techniques. Design Development digital designs/ FPGA programming to implement algorithms for image capture, data processing /analysis and data transmission in an embedded real-time control environment utilizing the latest FPGA technologies. Good understanding of digital, analog or radio frequency circuits, components, and subsystems Designs, knowledge of Performing preliminary and detailed analyses/simulations on Analog & Digital or mixed signal Interfaces. Responsibilities include specification generations, architecture/micro-architecture definition hands-on implementation work for every aspect of ASIC/FPGA design, working closely with the system engineers and ASIC/FPGA design implementations and verification. Delivery of expert level technical support in the resolution of FPGA application issues at all levels of realization of designs, The proactive aspects of the position will require participation in development projects, possibly as part of an international, cross organizational team and may include the generation of collateral and reference designs. Ownership of all aspects of the design verification of the FPGA chips and/or its functional blocks,design tools and its verification equipment. Should Support the design, development and testing, including upgrades, parts reliability requirements, failure analysis/corrective action investigations, special laboratory tests, performance evaluations, and design audits of in-house. Intend to work closely with FW and SW Engineers to test and verify electrical interfaces and protocols between the FPGA and embedded system devices Working knowledge in System Verilog/UVM environment platforms and be responsible for generating FPGA verification plan, verification matrix and coming up with verification environments for test and verification of flight FPGA code/modules. Relevant Bachelors or Masters Degree in Electronics Design, Embedded Electronics, Electronics & communication Engineering, Electrical Engineering.

The selected candidate will be responsible for implementing high speed high volume data processing requirements on high density FPGA based hardware. These subsystems are the hearts of satellites and store data gathered on the eternal sojourns of satellites in orbits and send the data down interactively with ground commands. Azista is engaged in the making of state-of-the-art spaceborne payloads for high performance applications in indigenous private sector satellites in India. The work typically may involve, but not necessarily be limited to, the following activities: Understanding onboard image data processing, encryption and packetization (CCSDS) needs and the nuances of indexing, annotating, and storing data and evolving efficient architectures for implementing such functions in FPGA code. Be responsible for coding the above functionalities, porting the successful code and complete the in-situ validation process for the subsystems for flight readiness Be a team contributor, code for parts of a larger functionality and seamless integrate and test the integrated firmware Partake in the full development cycle and not just design or verification, and be responsible for subsystem level outcome in an integrated system Prepare documents necessary at different stages and be able to interact with QA/QC guidelines and facilitate assurance of code compliance to a given standard As a general rule, Azista requires that all engineers take enthusiastic part in whatever activity they are required to contribute to in order to make the missions and the company successful. The knowledge base required in the candidate will in general be a clear understanding of the fundamentals of Coding for FPGA environment, a significant experience profile of doing this. Excellent familiarity and skill in VHDL (or Verilog) and with MATLAB, and porting from it Knowledge of the architectures of modern high-density FPGAs and SoC Devices from Xilinx (Now AMD) or Actel (Now Microchip) FPGAs and familiarity with the use of these Excellent familiarity with the development environments for these devices and the simulation and pre-burn performance validation tools Very good experience of actually porting developed code into the hardware platforms and test the same for target performance characteristics, and the skill in spotting problems and be able to relate observations in tests back to necessary refinements in code Exposure to safe coding practices and high reliability engineering Specific successful design experience with at least two of the following: Encryption, AES standards; desirable exposure to custom encryption with significantly longer keys Data compression techniques, especially image data CCSDS standards for data handling The successful candidate is likely to have An electronics degree, masters preferred but not necessary A consistent career in FPGA based firmware design and coding (6 to 10 years at least) with exposure to high density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully in high volume data handling including Encryption/Compression/CCSDS etc Good experience in debugging systems, including the ability to probe hardware and make sense of the time domain / frequency domain observations A good knowledge of how to estimate rough-order-of-magnitude power consumption figures of FPGA designs even before a full design is evolved Note: Interviews are likely to be multi-level very detailed. Please who do not check most of the points above may not be suitable at all. A consistent career in FPGA based firmware design and coding (6 to 10 years at least) with exposure to high density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs FPGA Firmware Designer (FFW-004) Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

The selected candidate will be responsible for implementing high-speed high-volume data generation and handling requirements on FPGA-based hardware, including storage in and playback from SSDs/SSRs and high-speed serial (SERDES, going to several Gbps) / Parallel (LVDS exceeding a hundred MHz). The subsystems are for use in state-of-the-art spaceborne payloads for high-performance applications in indigenous private-sector satellites in India. The work typically may involve, but not necessarily be limited to, the following activities: Understanding hardware component/environment capabilities, requirements and limitations and evolving firmware architectures and coding for required performance goals. Be a team contributor, code for parts of a larger functionality and seamlessly integrate and test the integrated firmware Partake in the full development cycle and not just design or verification, and be responsible for subsystem level outcomes in an integrated system Prepare documents necessary at different stages and be able to interact with QA/QC guidelines and facilitate assurance of code compliance to a given standard As a general rule, Azista requires that all engineers take an enthusiastic part in whatever activity they are required to contribute to in order to make the missions and the company successful. The knowledge base required in the candidate will in general be a clear understanding of the fundamentals of Coding for FPGA environment, a significant experience profile of doing this. Excellent familiarity and skill in VHDL (or Verilog) Knowledge of the architectures of modern high-density FPGAs and SoC Devices from Xilinx (Now AMD) or Actel (Now Microchip) FPGAs and familiarity with the use of these Excellent familiarity with the development environments for these devices and the simulation and pre-burn performance validation tools Very good experience in actually porting developed code into the hardware platforms and testing the same for target performance characteristics, and the skill in spotting problems and be able to relate observations in tests back to necessary refinements in code Exposure to safe coding practices and high-reliability engineering Specific successful design experience with at least one of the following: Implementation of high-speed SERDES data links going to several Gbps and testing for the same Implementation of SSD interfaces and familiarity with modern SSD interface standards Implementation of gigabit ethernet solutions in FPGA environments and testing for the same The successful candidate is likely to have An electronics degree, masters preferred but not necessary A consistent career in FPGA-based firmware design and coding (6 to 10 years at least) with exposure to high-density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully Good experience in debugging systems, including the ability to probe hardware and make sense of the time domain/frequency domain observations A good knowledge of how to estimate rough-order-of-magnitude power consumption figures even before a full design is evolved Note: Interviews are likely to be multi-level and very detailed. Please who do not check most of the points above may not be suitable at all. A consistent career in FPGA-based firmware design and coding (6 to 10 years at least) with exposure to high-density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

FPGA design engineer will take part in the design domains of signal processing and data processing, image processing, other high-speed and control applications, implementing these functions on high-density state of the art FPGAs. Work may include specifying, architecture/microarchitecture definition and hands-on implementation work for every aspect of FPGA design, working closely with the system, software, and FPGA design and verification, guide and mentor juniors in the areas and Delivery of expert level technical support in the resolution of FPGA application issues at programming level. In addition to the FPGA implementation, the engineers are expected to understand subsystem/algorithm level behaviour of such designs and be able infer the necessary hardware design/resources necessary for a given subsystem level specification. Work may involve HDL level coding/verification/testing and/or System C coding levels and taking ownership of all aspects of the design verification of the FPGA chips and/or its functional blocks. Examples of possible micro streams of work: CCD/CMOS Image array readout at high speeds Formatting such data and serial or parallel transmission of the same to other subsystems Implementation of complex image or signal processing algorithms Implementation of i/o rich control functions to interface a large number of subsystems to central controllers. Working closely with microcontroller programmers, instantiation of controllers with sequential code inside FPGAs etc mapping algorithms and standards (PCIe, NVMe, SATA,USB, Ethernet, TCP/IP, TCP/IP off load engine (TOE), SERDES, LVDS, and Memory Controllers DDR2/DDR3 ) to hardware and architecture/system design trade-offs standard bus protocols, including I2C, SPI, USB, PCIe. Candidates should preferably have good quantitative aptitude and understand analy Content coding like Verilog/VHDL, or System C or equivalent, exposure to complex/high density FPGAs and FPGA-SoCs Familiarity with Matlab and Simulink Vitis Unified Software Platform - Xilinx or similar Bachelors in Electronics or equivalent stream and a minimum of 10 years experience or Masters Degree in a related specialization with a minimum of 8 years experience in Electronics Design/Embedded Electronics, out of which the most recent 6 years must have been in state of the art high density FPGA environments. FPGA Design Engineer Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

Job description Electronics Circuit design engineer shall provide high-level analysis for on-chip circuit architectures and assessing trade-offs to ensure specification compliance constrained power and area. Abilities Required: Design and develop circuits for embedded electronics applications. Verify functionality and robustness of electrical design. Develop and maintain design, analysis, test plan and test result documentation. Take designs through productization and be involved in all stages of development. Work with cross functional teams to optimize the designs. Be the interface to the customer in technical interactions, feasibility analysis, design reviews, parameter estimations (like Power/Area). Apply knowledge of broad engineering principles and collaborate with other engineering disciplines to meet all product requirements. Organize design effort on technically challenging designs to meet cost and schedule requirements. Proficient in all aspects of circuit design for custom digital blocks including schematic entry, functional verification, static timing analysis, Noise analysis, Reliability Verification Qualification: Experience with circuit design and worst-case circuit analysis / simulation Experience using schematic-capture tools and circuit simulation tools. Familiarity with Electromagnetic Compatibility issues associated with board layout and circuit design. Experience with thermal constraints of circuit design and fundamentals of heat transfer Proficient in both analytical skills and hands-on work Familiarity with electronics manufacturing technologies (at the board level) Knowledge of electronic circuits and components Knowledge of microcontrollers, power supply circuits, and inverter circuits Minimum of 2 years experience work on digital and analog circuit design, computer architecture, data structures in any programming language. Education Relevant Masters and bachelor s degree in Electronics Design Engineering, Electrical Engineering, Electronics Engineering. Desired experience for circuit design engineer includes: Broad circuit design and implementation knowledge with significant depth. Knowledge of package substrate, board design and power delivery. Working knowledge of Cadence custom design tools, various circuit simulators like Hspice, XA, FineSim, Spectre Working knowledge of Verilog, Nanotime, Matlab Hands on with Lab test and measurement equipment Requires strong fundamental understanding of transistor level analog design designs in deep submicron process. Apply for a Electronics Circuit Design Engineer Position Full name Contact number Email address Qualification Working experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Good knowledge of Tcl/Perl Scripting Strong problem-solving skills and good communication skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 1-3 yrs years of experience in Physical Design/Implementation

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for candidates between 3 to 13 years of experience. Worked on coverage driven module verification. Strong in System Verilog, UVM Sound experience in testbench (stimulus, agent, monitor, checker) development. Failure debugging with Verdi & log file. Worked in the verification having c based reference model inside the testbench Experience with assertion development. Familiar with the EDA tools IUS, VCS, Verdi etc. Exposure in scripting(perl, Python). Good team player. Need to interact with the designers and other verification engineers proactively. Prior experience with video pipeline is added advantage. Knowledge of tensilica Worked with sub-system verification with tensilica Experience in C based system modelling. Debug with C based reference model. Have exposure to the other verification tasks gate level simulation, Power aware simulation, formal verification, sub-system verification and emulation. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Verification & Validation team is currently looking for self-motivated engineers who will perform ARM or DSP based SOC Pre-Si and Post Si validation including system level validation and debug. The ideal candidate should leverage his knowledge and experience to provide leadership, technical guidance, and execution of silicon validation of ARM or DSP based multiple SOC projects and platforms Experience in SoC pre/post silicon validation. ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug. Perform system level validation and debug Debug experience with Lauterbach Trace32 environment. Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers. Embedded software development of low level hardware drivers in C language. Working experience related to one or more of the following is required. ARM/DSP Processors/USB/PCIE, Ethernet Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 2-6yrs experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for candidates between 3 to 13 years of experience. Worked on coverage driven module verification. Strong in System Verilog, UVM Sound experience in testbench (stimulus, agent, monitor, checker) development. Failure debugging with Verdi & log file. Worked in the verification having c based reference model inside the testbench Experience with assertion development. Familiar with the EDA tools IUS, VCS, Verdi etc. Exposure in scripting(perl, Python). Good team player. Need to interact with the designers and other verification engineers proactively. Prior experience with video pipeline is added advantage. Knowledge of tensilica Worked with sub-system verification with tensilica Experience in C based system modelling. Debug with C based reference model. Have exposure to the other verification tasks gate level simulation, Power aware simulation, formal verification, sub-system verification and emulation. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Company: Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Minimum Qualifications: Bachelor's degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 2+ years of experience with ASIC design and verification 2+ years of experience with low-power ASIC optimization Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.* Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Preferred Qualifications: Master's or PhD degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 3+ years of experience with advanced CPU/GPU architecture/microarchitecture design development 5+ years of experience with VLSI design and verification 5+ years of experience with low-power ASIC design techniques Experience with industry tools such as PrimeTime PX and Power Artist Experience with Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development Experience with GPU driver and compiler development Skills: C/C++ Programming Language, Scripting (Python/Perl), Assembly, Verilog/SystemVerilog, Design Verification

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Qualcomm is looking for an experienced Chipset Power System Engineer who is passionate in solving power challenges and develop innovative solutions for optimizing power for next generation Snapdragon chipsets of various platforms in applicator processor, modem, automotive, AR/XR, compute and machine learning. The engineer is expected to work with cross-functional engineering teams to model SOC/chipset power and come up with innovative solutions to optimize hardware and software to enhance SOC and chipset and achieve world-class chipset low power consumption. In this position, the engineer will support the existing tools and methodologies while defining the long term strategy in the areas below. Power Modeling and Methodology Drive the engineering process to gather requirements, design, prioritize and track derived tasks, test, and deliver tools and methodologies to the power community Maintain existing power modeling tools and methodology. Define and deliver API's to the power community as required. Create block-level and system-level power models as required. Integrate and port power models from IP teams into the existing framework. This involves working closely with contributing teams and aligning power modeling requirements and negotiating power model deliverables for framework integration. Drive and participate in cross-functional power modeling collaborations which includes hardware, systems, architecture, software, and post-silicon teams Track technology changes with the enhancement to the power modeling methodology by incorporating new low power techniques, algorithms, power management schemes, etc. Power Analysis Collaborate to assess use case power impact in areas such as thermal and formfactor variance, architecture changes, IP changes, low power techniques Understand and perform block & chip-level power analysis and ensure methodologies satisfies the requirements to enable these activities Enable other teams to leverage the tools and methodologies and perform technology specific power analysis. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 5+ years Hardware Engineering experience or related work experience. 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Summary: Position for 5-8 years of experience in design verification of complex Qualcomm propriety DSP/NPU IP DSP team is responsible for delivering high-performance DSP/NPU cores which are at the heart of Qualcomm's multi-tier SoC roadmap targeted for mobile space, AI, Automotive and more. Qualcomm is one of the largest fabless semiconductor design companies in the world, generating over $35 Billion in annual revenues from chipsets and royalties from intellectual property. Job Responsibilities: Drive design verification of DSP IP by working with a global DSP design team involving architecture, implementation, power, post silicon and back-end teams. Implement and improve System Verilog/UVM Testbench Architecture. Develop and deploy new verification methodologies, automation to continuously improve quality and efficiency. Develop design corresponding test plans, architect and develop verification environments, and meet coverage goals. Hands-on simulations and ability to debug not only IP level, but Subsystem and SoC level fails and bugs. Complete all required verification activities at IP level and ensure high quality commercial success of our products. Assertions, simulation, formal verification (static property checking), HW-SW co-verification, constraint/HVL-based verification, simulation acceleration, emulation are all tools you will use on a daily basis. Responsible gate level simulation bring-up, gate level verification with timing simulations. Responsible for power aware RTL verification and gate level simulation. Skillset/Experience: 5-8 years experience in processor/ASIC design verification Solid background and understanding of Digital Design, Processor Architecture , Processor Verification and Power aware verification. Expertise in System Verilog Testbench Architecture and implementation. Experience in writing C based and assembly level testcases is preferred. Exposure to power aware implementation and verification using UPF is a plus. Experience with advanced verification techniques such as formal and assertions is a plus. Gate-Level Simulation and Debug — 0-delay, timing annotated and power aware. Experience in System Verilog/UVM, and with simulators from Synopsys/Mentor/Cadence . Scripting/Automation Skills — Perl, Python, Shell, Make file TCI . Solid analytical and debugging skills, strong knowledge of digital design and good understanding of Object Oriented Programming (OOP) concepts. Experience in Hardware verification languages (HVL) such as SystemVerilog testbench (OVM/UVM) and SystemC and Hardware description languages (HDL) such as Verilog, SystemVerilog is preferred. Experience in verification of Processor subsystems is preferred. Experience in creating validation suite and building automation. Should have excellent inter-personal and communication skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. : Would be working on Qualcomm SoC System level Power and Performance in bare-metal validation environment. Develop comprehensive testplan for power and performance validation of the SoC both from a usecase requirement as well as design delta motivated. Determine Key Performance Indicator for the performance study by working closely with the respective IP teams in Design, DV and validation. Validation of System Low Power Modes, SoC shared rail power collapse validation Responsible for driving deep dive analysis on performance issues, bottlenecks and validating fixes or workarounds on subsystem and related SOC Modules. The ideal candidate would have a strong SoC architecture background along with good embedded system concepts on modern ARM/X86 based chipsets. Interface with subsystem validation, debug tools and SW teams during debugs. Develop low-level custom code on ARM and Hexagon Q6 processors using C/C++ and validate functionality and performance KPIs using debug trace dump Job : Bachelor's degree in Engineering, Computer Science, Electronics/Electrical Engineering or related field and 5+ years of full time experience ORMasters's degree in Engineering, Computer Science, Electronics/Electrical Engineering or related field and 3+ years of full time experience Familiar with CPU and SoC Architecture and micro-architecture, preferably ARM or ARM processor-based systems, clocking schemes, hierarchical memory systems, cache configurations and coherency issues in multi-core systems. Fundamental understanding of Static, Leakage and Dynamic power in a semiconductor design Experience with workload performance characterization, bandwidth and latency analysis, and driving microarchitecture investigations on CPU/GPU/Multimedia Systems with relevant performance metrics. Logical thinking and problem-solving ability with focus on performance centric validation Familiar with pre-silicon validation environments with Emulation and Virtual Bring-Up, etc. Basic statistics and data analysis skills to identify performance trends from large data sets and the technical bent to investigate anomalies (Good to have) Strong programming experience in at least one languageC,C++, Python (Must have) Good communication, English speaking/writing and team work attitude