Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-7 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-7 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus.

We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 12 + years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities: We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA * Development responsibilities will include core algorithmic advances and software design/architecture. * You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. * Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: * B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-8 years of experience. * Strong knowledge of C/C++, algorithms, and data structures. * Familiarity with compiler concepts and optimizations. * Experience with UNIX and/or LINUX platforms is essential. * Excellent problem-solving and analytical skills. * Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: * Strong understanding of basic digital electronics concepts. * Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. * Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. * Experience with parallel algorithms and job distribution techniques. * Exposure to simulation or formal verification methodologies is a plus.

We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrows idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more efficiently. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. Responsibilities: We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to create new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards chipping in to your success. We Are Not Looking for Superheroes, Just Super Minds! Weve got quite a lot to offer. How about you? Required Experience: We seek a graduate with at least 2 years of relevant working experience with B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. Proficiency of C/C++, algorithm and data structures. Compiler Concepts and Optimizations. Experience with UNIX and / or LINUX platforms is vital. Basic Digital Electronics Concepts We value your knowledge of Verilog, System Verilog, VHDL Experience in parallel algorithms, job distribution. Understanding of ML/AI algorithms and their implementation in data-driven tasks Exposure to Simulation or Formal based verification methodologies would be a plus! The person should be self-motivated and can work independently. Should be able to guide others, towards project completion. Good problem solving and analytical skills

We make real what matters. This is your role. At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We're excited to be working on the next-generation RTL-to-GDSII solution, and we want YOU to be a part of this innovative journey! This is the Role Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis. Guide and lead others toward successful project completion by innovating and implementing powerful solutions. Collaborate with a hardworking team of experts. Must-Have Requirements B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college with 5-8 years of experience in software development. Validated understanding of C/C++, algorithms, and data structures. Demonstrate excellent problem-solving and analytical skills. Lead and encourage the team with your expertise. Great to Have Experience in: You will have the opportunity to develop RTL synthesis tools and work with System Verilog, VHDL, DFT, formal verification, and Dynamic Power. Additionally, you will design C or RTL IPs and optimize RTL & gate level logic, area, timing, and power. Your experience in developing parallel algorithms and job distribution strategies will be highly valued, as well as your proficiency in using scripting languages like Python and Tcl.

Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-8 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus.

Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-8 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus.

As a Design Verification Engineer, you will work with a highly innovative and motivated design team using state of the art memory technologies to develop the most advanced DRAM and Emerging memory products. You will be challenged by the complexity and difficulty of verifying high density memory chips (up to 32Gb) with huge scale of circuit capability (over 4M transistors), ultra-high-speed designs, complex functionality which includes next Generation DDR/LPDDR (ex: DDR5, LPDDR5) and advanced low power and power management technologies. You will need to have the ability to work as a Design Verification Engineer, to evaluate Full chip or block level functionality and provide solutions to help delivery of functionally correct design. You will work closely with Micron's various design and verification teams all over the world to contribute to the success of the design projects by applying verification tools and techniques, providing verification status and summaries to specific designs as needed. Responsibilities will include, but not limited to: Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. • Good knowledge of Basic Analog/Digital concepts. • Good knowledge of Verilog/SV concepts. • Experience in using spice simulation and digital simulation tools like Virtuoso, primesim, Finseim, Hspice, Xcellium, Simvision, Waveview. • Experience in understanding Spice simulation environment/Digital simulation environment, able to debug analog/digital design related issues. • Work experience in co-sim simulation designs is a plus. • Good scripting skills using perl, python is a plus. • Must possess good communication skills and ability to work well in a team. Bachelor's with 2+ years of work experience or Post Graduate Degree in Electronics Engineering or related engineering field with 1-2 years of working experience is required.

SOURCERIGHT TECHNOLOGIES (INDIA) PRIVATE LIMITED is looking for FPGA RTL Design Engineer to join our dynamic team and embark on a rewarding career journey. Research and draft blueprints, engineering plans, and graphics. Develop test prototypes. Identify solutions to improve production efficiency. Use design software to develop models and drawings of new products. Maintain existing engineering records and designs. Assess all engineering prototypes to determine issues or risks. Estimate cost limits and budgets for new designs. Supervise the manufacturing process of all designs. Coordinate with other engineers, management, and the creative department.

Job Overview: The Program Manager for Chip Design will oversee the entire lifecycle of semiconductor design projects, from initial concept through to tape-out and GDSII handoff. The ideal candidate will ensure project deliverables meet time, cost, and quality objectives by coordinating cross-functional teams, managing resources, and aligning internal and external stakeholders. This role involves close collaboration with engineering, operations, and customer-facing teams, requiring both technical expertise and leadership abilities.

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred technical and professional experience Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES andPHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3 + years of experience in Functional Verification of Processors or ASICs. Minimum 2+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Multi-processor cache coherency, Memory subsystem, IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc Madhu to update ASICs specific skills Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Preferred technical and professional experience Verify the different functions/components in a PCI Express Controller & high speed SERDES (PHY). Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

Role & Responsibilities : As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Lead the development of the verification plans, environment, testbenches and writing testcases to verify Cache structures & protocols in processor. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. . Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Required Professional and Technical Expertise : 9 + years of experience in Functional Verification of processors or ASICs. 3+ years of experience in the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor Cache (L2/L3) Coherency, Memory Hierarchy Verification Minimum one full life cycle leadership experience of a processor/SoC verification flow with focus on Cache Coherency Verification Developed test-plans and test strategies for IP/unit/block level verification of Cache Coherency structures in processor/SoC Good object-oriented programming skills in C++/SV, scripting languages like Python/Perl. Knowledge of functional verification methodology like UVM/OVM Knowledge of HDLs (VHDL/Verilog) Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenarios, debugging and triaging fails Experience in driving verification coverage closure. Preferred technical and professional experience Additional skill Stress testing and ability to identify corner case scenarios.

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Owning and Driving execution of subunits/unit level Verification Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Work with logic and development teams to identify test scenarios, create test plans and execute the scenarios. Work with IBM Verification community to improve Verification methodology. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 12 + years of experience in Functional Verification of processors or ASICs. Minimum 9+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading teams Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred technical and professional experience Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification. Good understanding of the Server System

• 8+ years of strong experience in RTL design • Expertise in RTL coding of complex designs with multiple clock domains • Familiar with UPF and power domain crossing • Experience in Synthesis, Logical Equivalence checks, RTL and Netlist CLP • Familiarity with various bus protocols like AHB, AXI, SPMI, I2C, SPI • Experience in Spyglass Lint/CDC checks and waiver creation • Experience in formal verification with Cadence LEC • Expertise in Perl/TCL/Python language • Excellent oral and written communications skills to ensure effective interaction with Engineering Management and team members. • Team player, self-motivated, should be able to work with minimal supervision. Interested share resume or references to Shubhanshi@incise.in

Responsibilities for this role include: We are working on the next generation RTL-to-GDSII solution. You should be able to completely own and drive the design and development of various pieces of the RTL synthesis technology, logic optimizations and low power synthesis. Experience and Qualifications: 8-12 years of proven experience in software development. B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. Good knowledge of C/C++, algorithm and data structures. Good problem solving and analytical skills. Ability to guide and lead others, towards project completion. Desirable: We are looking for an individual with previous experience in RTL synthesis tool development. Knowledge of Verilog, VHDL, and formal verification. Expertise in RTL and gate-level logic, area, timing, and power optimizations. Familiarity with parallel algorithms and job distribution techniques. Proficiency in scripting languages like Python and Tcl. Communication Proficiency in English with strong interpersonal and excellent oral and written communication skills. Ability to collaborate as part of globally distributed team. Also, Self-motivated and able to work independently. We thrive on building a multi-functional team environment, and we look for individuals who are eager to contribute and grow with us!

Responsibilities for this role include: We are working on the next generation RTL-to-GDSII solution. You should be able to completely own and drive the design and development of various pieces of the RTL synthesis technology, logic optimizations and low power synthesis. Experience and Qualifications: 5-8 years of proven experience in software development. B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. Good knowledge of C/C++, algorithm and data structures. Good problem solving and analytical skills. Ability to guide and lead others, towards project completion. Desirable: We are looking for an individual with previous experience in RTL synthesis tool development. Knowledge of Verilog, VHDL, and formal verification. Expertise in RTL and gate-level logic, area, timing, and power optimizations. Familiarity with parallel algorithms and job distribution techniques. Proficiency in scripting languages like Python and Tcl. Communication Proficiency in English with strong interpersonal and excellent oral and written communication skills. Ability to collaborate as part of globally distributed team. Also, Self-motivated and able to work independently. We thrive on building a multi-functional team environment, and we look for individuals who are eager to contribute and grow with us!

Looking for Siemens EDA ambassadors: Lead Member Technical Staff The electronics industry is evolving at an ever-accelerating pace. At Siemens EDA, we are dedicated to empowering customers to bring life-changing innovations to market faster and achieve leadership in their industries. We achieve this by providing the most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services worldwide . Key Responsibilities: In this role, you will be at the forefront of designing, developing, and implementing software solutions for both internal and external products, ensuring that we consistently exceed customer expectations and uphold the highest quality standards. You will be pivotal in ensuring the functional excellence of released products across multiple platforms, tackling complex challenges head-on. Moreover, youll be responsible for creating and implementing software designs that often span multiple product areas, collaborating seamlessly with multi-functional teams to drive efficiency, optimize performance, and elevate our solutions! Job Qualifications: We bring together a dynamic team of individuals with a B.E./B.Tech./M.Tech. in Computer Science, Electrical Engineering, Electronics & Communication, Instrumentation & Control, or related fields. Do you have 3-5 years of experience in software development, specifically specializing in FPGA synthesis solutions?W We possess a strong understanding of digital design fundamentals and are proficient in C/C++ and Object-Oriented Programming (OOP). Our team excels in algorithm analysis, development, and optimization of data structures, and we continuously strive for excellence through open and constructive feedback! Good to Have: Familiarity with synthesis, simulation, and verification methodologies is a definite plus. A basic understanding of at least one Hardware Description Language (HDL) such as Verilog, SystemVerilog, VHDL, or SystemC is highly advantageous.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more efficiently. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Job Duties: We are seeking a motivated and quick-to-learn Software Engineer to join the Electronic Design Automation (EDA) field, specifically to advance the Questa formal verification product family. In this multifaceted role, you will be involved in the entire project lifecycle, from writing functional specifications to designing algorithms, coding, and creating test plans. Collaboration with a team of talented engineers and supporting top-tier industry customers will be essential. The ideal candidate will have extensive software development experience, particularly in developing and customizing components around graph-based formal models, with hands-on programming and expertise in crafting efficient netlist representation models for formal applications. Our primary responsibilities will include crafting and developing new features, customizing existing solutions, and improving software components for formal verification, ensuring quality, scalability, modifiability, and testability. You will collaborate with other engineering teams, take ownership of specific components, and drive them to excellence. Additionally, you will help drive the best software practices within the team and mentor other specialists as needed, all while contributing to the businesss overall needs. Job Qualifications: We require candidates to have a BE/B-Tech/M.Tech in CSE/ECE from a reputed engineering college. We are looking for candidates with 5-10 years of software experience, preferably in the Design and Verification domain. Expert in C++ , design patterns, and algorithms. Strong understanding of data structures and algorithm complexities . Proficient in advanced data structures and their applications. Expert in one of the following hardware description languages: Verilog , System Verilog , or VHDL . Knowledge of scripting languages like Perl , Python , Bash , or Tcl . Proficient with development tools such as Makefile , gdb , valgrind , perforce/git , gcov , editors , and IDEs . Strong problem-solving and analytical skills . Experienced in the development and delivery of multi-man-month projects from start to finish. Familiarity with Linux platforms . Exposure to formal-based verification methodologies (model checking, equivalence checking, automated reasoning) is a plus. Soft Skills: Self-motivated and committed to work. Strong team player with the ability to work independently. Hardworking, sincere, and open to constructive feedback. Able to work in challenging environments and collaborate effectively with multi-cultural technical teams. Good to Have: Exposure to Synthesis, Simulation, and other verification methodologies like Assertion, Coverage, etc. Strong presentation, listening, and communication skills for effective team interactions.

This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 8 - 15 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus.

Design Verification Engineer (5+ years) ASIC/SoC/FPGA Design Verification (Bangalore, Chennai and Hyderabad) Design Verification with planning, architecture, development, maintenance, and execution on complex IPs and/or SOCs. Strong knowledge of digital design principles and computer architecture. Proficiency in verification languages like Verilog or SystemVerilog. Experience with UVM (Universal Verification Methodology).

Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Ciscos core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Ciscos ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Your Impact Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs. Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL. Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows. Your team will participate in the creation of Innovative Hardware DFT physical design aspects for new silicon device models, bare die stacked die, driving re-usable test and debug strategies. The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship. Minimum Qualifications: Bachelors or a Master s Degree in Electrical or Computer Engineering required with at least 10 years of experience. Knowledge of the latest innovative trends in DFT, test and silicon engineering. Background with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan. Background with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design Knowledge of the latest innovative trends in DFT, test and silicon engineering. Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan. Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime Prior experience working with Gate level simulation, debugging with VCS and other simulators. Prior experience with Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687 Prior experience with Scripting skills: Tcl, Python/Perl. Preferred Qualifications: Verilog design experience - developing custom DFT logic IP integration; familiarity with functional verification DFT CAD development - Test Architecture, Methodology and Infrastructure Background in Test Static Timing Analysis Past experience with Post silicon validation using DFT patterns. Why Cisco #WeAreCisco, where each person is unique, but we bring our talents to work as a team and make a difference powering an inclusive future for all. We embrace digital, and help our customers implement change in their digital businesses. Some may think we re "old" (36 years strong) and only about hardware, but we re also a software company. And a security company. We even invented an intuitive network that adapts, predicts, learns and protects. No other company can do what we do - you can t put us in a box! But "Digital Transformation" is an empty buzz phrase without a culture that allows for innovation, creativity, and yes, even failure (if you learn from it). Day to day, we focus on the give and take. We give our best, give our egos a break, and give of ourselves (because giving back is built into our DNA.) We take accountability, bold steps, and take difference to heart. Because without diversity of thought and a dedication to equality for all, there is no moving forward. So, you have colorful hairDon t care. TattoosShow off your ink. Like polka dotsThat s cool. Pop culture geekMany of us are. Passion for technology and world changingBe you, with us!

Understanding of IP/SS/SoC Power Management(PM) techniques. Converting PM Specification to UPF Perform low power quality checks VSI/VCLP Debugging experience on Power aware simulation (NLP sim) Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC Work in partnership with SOC teams to support the IP at SOC level, including UPF, verification, Power sequence, and post-silicon bring-up Need to understand clocking, reset and soc top level topology changes to make connectivity as per the topology across Ips. Need to understand the requirements of power domain(power architecture) to write UPFs. Collaborate with architects, DV and PD engineers to understand the new features to group the logic into tiles based on functionality as well as PD FP requirements. Must have been expert with RTL coding and other Debug capabilities. Preferred Experience: 7+ years full-time experience in IP/SOC hardware design Experience doing ECOs Experience with power aware CDC runs Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs Experience with RTL Quality Checks - Verilog lint tools (Spyglass), verilog simulation tools (VCS) and Clock domain crossing (CDC) tools Proficient in IP level ASIC or SoC level RTL integration work and verification Good understanding and hands-on experience in the Timing, UPF, CDC, RDC and other quality check concepts Proficient in debugging RTL code using quality check and simulation tools. Outstanding interaction skills while communicating both written and verbally Ability to work with multi-level functional teams across various geographies Outstanding problem-solving and analytical skills Exposure to leadership or mentorship is an asset. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering