Posted:3 weeks ago|
Platform:
On-site
Full Time
Job description
Physical Design Engineer – Memory Layout (TSMC)
Location: Bangalore, India
Industry: Semiconductor
Experience: 2+ years
About the Role
We are seeking a skilled Physical Design Engineer specializing in advanced memory layouts within leading TSMC process technologies (7nm and below – including 5nm, 3nm, and 2nm). The ideal candidate will have hands-on experience in developing, optimizing, and validating memory layouts with a focus on performance, area, and power efficiency. This role offers the opportunity to work with cutting-edge technology nodes and collaborate with global teams.
Key Responsibilities
Key Skills & Requirements
Preferred Skills
Job Types: Full-time, Permanent
Work Location: In person
Org Linked
Upload Resume
Drag or click to upload
Your data is secure with us, protected by advanced encryption.
Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.
We have sent an OTP to your contact. Please enter it below to verify.
3.0 - 7.0 Lacs P.A.
3.0 - 7.0 Lacs P.A.