Physical Design Engineer – Memory Layout (TSMC)

2 years

3 - 7 Lacs

Posted:3 weeks ago| Platform: GlassDoor logo

Apply

Work Mode

On-site

Job Type

Full Time

Job Description

Job description

Physical Design Engineer – Memory Layout (TSMC)

Location: Bangalore, India
Industry: Semiconductor
Experience: 2+ years

About the Role

We are seeking a skilled Physical Design Engineer specializing in advanced memory layouts within leading TSMC process technologies (7nm and below – including 5nm, 3nm, and 2nm). The ideal candidate will have hands-on experience in developing, optimizing, and validating memory layouts with a focus on performance, area, and power efficiency. This role offers the opportunity to work with cutting-edge technology nodes and collaborate with global teams.

Key Responsibilities

  • Design and development of memory layouts (SRAM, ROM, Register Files, etc.) in advanced process nodes (TSMC 7nm, 5nm, 3nm, 2nm).
  • Perform layout implementation including floorplanning, placement, routing, and parasitic extraction.
  • Collaborate with circuit designers to ensure proper layout functionality, performance, and reliability.
  • Conduct DRC, LVS, and EM/IR checks to ensure design integrity and compliance with foundry requirements.
  • Work closely with foundry teams (TSMC) to resolve layout-related issues and optimize for manufacturability.
  • Provide support for tape-out and post-silicon validation.

Key Skills & Requirements

  • 2+ years of experience in memory layout design for advanced nodes.
  • Strong expertise in TSMC technologies (7nm and lower – 5nm, 3nm, 2nm).
  • Proficiency with industry-standard EDA tools (Cadence Virtuoso, Synopsys, Mentor, etc.).
  • Solid understanding of DRC/LVS/PEX verification methodologies.
  • Experience in memory IP development (SRAM, ROM, cache, etc.).
  • Knowledge of power, performance, and area (PPA) optimization techniques.
  • Strong problem-solving skills and attention to detail.
  • Good communication and teamwork abilities.

Preferred Skills

  • Experience with M31 IP or similar semiconductor IP vendors.
  • Knowledge of reliability checks such as EM/IR and ESD considerations.
  • Familiarity with lower geometry challenges (multi-patterning, EUV, etc.).

Job Types: Full-time, Permanent

Work Location: In person

Mock Interview

Practice Video Interview with JobPe AI

Start Job-Specific Interview
cta

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.

Job Application AI Bot

Job Application AI Bot

Apply to 20+ Portals in one click

Download Now

Download the Mobile App

Instantly access job listings, apply easily, and track applications.

coding practice

Enhance Your Skills

Practice coding challenges to boost your skills

Start Practicing Now

RecommendedJobs for You