We are seeking a skilled and motivated Driver Developer with expertise in embedded systems and Real-Time Operating Systems (RTOS). As a key member of our team, you will be responsible for designing, implementing, and maintaining Windows/Linux drivers and DSP firmware, ensuring seamless integration with embedded systems and RTOS environments. The ideal candidate will have a strong background in low-level programming, kernel-mode development, and a deep understanding of hardware interactions. Join us if you are passionate about pushing the boundaries of technology and thrive in a dynamic, collaborative environment. Requirements : - Bachelor's or higher degree in Computer Science or Electronics & Communication with 4 + years of relevant experience - In-depth knowledge of kernel-mode programming in both Windows internals. - Strong C/C++ programming skills and familiarity with assembly language. - Proven experience in Windows driver development and embedded systems. - Strong knowledge on the embedded system. - Proficiency in Windows driver frameworks (WDM/WDF) and understanding of Windows-specific DMA protocols. - experience in Windows PCIe and USB kernel and/or userspace drivers. - Expertise in kernel space debugging using tools like WinDbg, dbgview, Visual Studio, or similar. - Familiarity with MCDM is a plus. Responsibilities : - Develop and maintain Windows/Linux drivers and RTOS for various requirement. - Collaborate with cross-functional teams to integrate drivers into embedded systems. - Design and develop PCIe and USB drivers for AI chipsets, ensuring performance and reliability - Optimize driver performance and ensure compatibility with evolving Windows environments. - Optimize data path efficiency and minimize latency Minimum Qualifications : - Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience.

Responsibilities : As Validation Engineer, you will drive the planning, test cases creation by reading multiple technical specifications, validation, and debug of various hardware IPs (Intellectual Property) as well as supporting the debug experiments and functional tests with next generation hardware IPs for Intel. The Pre-Si validation will happen on standard FPGA based HW platform while Post-Si validation will happen on Intel Test Chips and Intel HW platforms. Qualifications Preferred Experience & Skill set: Experience in Pre (+Post) Si functional validation Strong programming (C/C++) skills and Automation scripting (Python, Perl) expertise Extensive protocol knowledge of CAN/TSN/Ethernet/I2C/SPI/UART and any one of HSIO (PCIe/USB/DDR) Extensive experience with board/platform-level (Hardware & Software) debug Extensive experience with HW debug techniques and methodologies (FPGA and ASIC) Extensive experience with common lab equipment debug tools including JTAG, Logic Analyzer, Oscilloscope, etc. Responsibilities include: Reading, Defining, documenting, executing and reporting the overall functional test plan and verification strategy for IPs Supporting the debug of IP functional failure found during Pre and Post-Silicon validation, bring-up and production phases of Silicon programs Lab-based silicon bring-up and validation focused on the functionality In-Depth testing of IP features using troubleshooting methods, software tools, protocol/logic analyzers, oscilloscopes and other test equipment Engaging in system-level debug/triage efforts Leading collaborative technical discussions to drive resolution on technical issues and roll out technical initiatives Continuous improvement and developing knowledge of system architecture/debug of IPs Supporting debug effort for defects found on customer platforms as requested by customer support teams Driving technical innovation to enhance capabilities in IP functional validation, including tool and script development, and organization level technical initiatives Python expertise and FPGA Prototyping knowledge Minimum Qualifications: Masters or B.E / B.tech in Computer Architect/VLSIRequirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

About The Role Defines, develops, and executes platformbased validation environments, test suites, and plans and drives characterization and yield enhancements to ensure testability, manufacturability, and production of integrated circuits. Develops debug test methodologies, complex software programs for new device features, and design validation vectors. Evaluates components to ensure performance meets specifications and delivers optimal match of component requirements with production equipment capability. Applies knowledge of platform level tools and techniques to conduct root cause analysis, failure analysis, troubleshoot, and debug crossdiscipline and complex integration issues of the platform. Documents test results, analyzes test data, communicates results while continually improving test methods. Conducts integrated platform level validation, verifies that the product meets quality and/or reliability attributes and complies with applicable specifications. Drives product requirements as needed by customers to ensure necessary capabilities for platform validation activities. Collaborates with multiple teams across board design, power, platform design, development, and debug to ensure all features are validated and optimized timely. Works with product development engineers and end customers as first points of contact to support debug, root cause analysis, and customer platform issues. Qualifications The scope of the deliverable will vary based on the target platform and specific features of platform and SoC alike. Hence the candidate must have a solid big picture across the System.Minimum Requirements:Candidate must possess a Master's or Bachelor's degree in Electronics Engineering, Computer Engineering or a related discipline10+ years of Post-silicon or Pre-Silicon validation experience.Server or Client Computing Architecture knowledge (x86, ARM)Strong knowledge in any of domains like High-Speed Serial IO interfaces like PCIe, CXL (preferred), RAS, Manageability, Memory technologies, Reset flow.Experience with any of the debug tools like Lecroy/Keysight Protocol Analyzers, Logic Analyzers, JTAG, Kernel debuggersExperience in OS debug, kernel, or driver knowledge with Windows and/or Linux. Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies"”spanning software, processors, storage, I/O, and networking solutions"”that fuel cloud, communications, enterprise, and government data centers around the world. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intels offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements. Working Model This role will require an on-site presence. *

• In depth knowledge and extensive experience with deeply embedded firmware development and debugging • Demonstrated good analytical and problem solving skills. Hands on debug and usage of debug tools and Lab tools (LA, Scope) • Experience in Handling LAB Equipment like Oscilloscopes, Chambers and Controller samples • FW/SW integration on a micro-controller (ARM, ARC). Good understanding of a microcontroller architecture. • Experience with C/C++ and assembly programming is a plus • Experience in scripting languages, programming tools and environment • Experience of the storage industry, in SSD, HDD, storage systems or a related technology • You have a deep understanding of storage interfaces that may include PCIe/NVMe, AHCI, SATA, SAS, UFS, eMMC. SSD / NAND Domain (SLC, MLC, TLC, QLC), experience with sophisticated NAND flash and other non-volatile storage knowledge is a plus • Experience on Debugging and Failure/Root-Cause Analysis • Experience: 3-5 years of experience

As a Software Principal Engineer, you will be responsible for developing sophisticated systems and software based on the customer s business goals, needs and general business environment creating software solutions. You will: Contribute to the design and architecture of high-quality, complex systems and software/storage environments Prepare, review and evaluate software/storage specifications for products and systems Contribute to the development and implementation of test strategies for complex software products and systems/for storage products and systems Take the first step towards your dream career Every Dell Technologies team member brings something unique to the table. Here s what we are looking for with this role: Essential Requirements A BE/ME degree in ECE, CE, CS with 8-12 years of industry experience in System Management software development Strong firmware / System development background with strong C/C++ development/debug skills and Strong in Embedded Linux programming, OS Internals, memory management, IPC, thread programming and embedded application software development. Strong experience in IPMI, DMTF, RedFish, CIM, CIMOM, Linux. Solid understanding of SNMP, IPMI protocols. Experience/exposure to I2C, MCTP, NCSI, PLDM, uEFI protocol is a plus. Working experience with peripheral hardware devices like PCIe Switch, NIC, GPU, FPGA, Memory controller etc. is a plus. Desirable Requirements Very good server system architecture understanding along with Power and Thermal domain expertise.

Be the Product Development Team Lead - guiding a multi-functional product development engineering team to deliver SSD products aligned with a product delivery roadmap and schedule. Act as the Technical authority in the program guiding the Engineering teams and providing updates on development progress and technical issue resolution to the upper management. Be the Technical interface to the outside team, Marketing, FAE, and End customers. Work with the Technical Program Manager in generating schedules for product delivery by coordinating the delivery of new product features with functional team delivery schedules to generate and maintain an overall program schedule Responsible on Requirements and Product features closure with the SBU Accountable of the Program schedule, the Master Test Plan for the program is managed by the TPM. Responsible to Deliver the product to the BU that meets TSM objectives and manufacturing guidelines Conduct Lessons Learned, FMEA s, and Design reviews during product development. Responsible for generating and updating design process and product design documents Works with Business Unit Core Team, and Product Development, Engineering interface for technical customer issues and questions Qualification and Skills : 15+years of experience preferably with NAND Products. Ability to plan, schedule and prioritize projects Ability to lead and direct engineering resources Ability to mentor and guide Knowledge of NAND/SSD along with some protocol experience like PCIe & NVME. Full comprehension of product storage interface specifications, and their implementation. The ability to drive engineering efforts through all aspects of new product development and system level debug Ability to work with and maintain good collaborations functional teams, internal customers and external customers. Outstanding social skills with multi-functional development teams and external customers

We are seeking an exceptional Senior ASIC Verification Engineer to join our innovative semiconductor team. You will lead verification initiatives for complex ASIC designs and drive technical excellence across projects. About the Role : You will be responsible for developing advanced verification environments, leading cross-functional technical initiatives, and mentoring team members while ensuring the highest quality standards in our ASIC designs. What You'll Do : - Design and implement advanced System Verilog/UVM verification infrastructures - Lead verification planning and execution for complex ASIC projects - Develop comprehensive test strategies ensuring thorough design validation - Drive debug resolution through collaboration with cross-functional teams - Mentor and provide technical guidance to verification team members - Enhance and optimize verification methodologies - Own end-to-end SOC verification environments Required Skills & Experience : - BS/MS in Electrical/Computer Engineering - 2+ years of hands-on ASIC verification experience - Expert-level SystemVerilog, UVM, and object-oriented programming skills - Strong proficiency with industry tools like VCS, Xcelium, QuestaSim - Advanced debugging and problem-solving capabilities - Excellent communication and collaboration abilities - CLP and GLS - Python/Perl scripting expertise Nice to Have : - Experience with PCIe, DDR, USB, C2C - Knowledge of on-chip interconnects and processor subsystems - Background in formal verification methods - Prior experience on Emulators

About Marvell Marvell s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Custom Compute Storage - CCS BU has been at the forefront of developing and delivering leading-edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast growing product lines, Marvell technology is powering the next generation data processing and workload acceleration platforms for the Carrier, Cloud/Enterprise and Automotive Compute market segments. The team focusses on the Custom ASIC business, Cloud AI solutions Enterprise/Career solutions including the CXL product line. What You Can Expect As a Senior Director, you ll be responsible for collaborating with various teams to develop strategies, pushing the IP roadmap, and supporting multiple SOCs. This starts at the product definition phase with architecture and marketing then continues through execution of all efforts required including supporting productization. You ll provide leadership in the development of highest value-add IP, subsystem SoC plans and strategies with cutting edge process, speed and performance designs. The planning and execution need to be rationalized with budget and market timing requirements. Experience and judgement in determining the value of the tasks defined and executed by the team is important. This is a fast-paced, intellectually challenging position, and you ll work with thought leaders in multiple technology looking for ways to improve the value and quality of the effort while keeping cost in budget. Manage and continue to build a team of complex sub-system, co-processors, accelerator and SoC engineers. The managed team includes design, verification, and collaborating with the Physical Design, DFT Validation teams. Develop methodologies and infrastructure with evolving technology challenges including cutting edge semiconductor process, I/O s, networking bandwidth, embedded cores, and co-processors. Work with architecture, SoCs, software, firmware, program management and post-silicon design teams for plan development and execution. Provide technical mentoring for team members. Actively engage in efforts to find improvements in methodologies, techniques, and automation Own schedules and reporting of progress metrics What Were Looking For 25 years of relevant industry experience in Semiconductor design development Demonstrated ability to lead a multi-disciplinary team, show initiative, collaborate and communicate effectively with team members across functions cultures. Experience in all phases of design from concept through productization. Understand appreciate the complexity of data centers, server class or networking chipsets prior experience with successful first silicon success. Ability to recruit and retain engineering talent. Demonstrated mentoring of junior staff. BS degree or higher in EE or CE or CS with 25+ years or more of RTL and/or verification experience 10 + years of experience managing a Design/DV/Emulation related teams. Preferred Qualifications: Experience with Full chip design, development emulation of complex designs targeting Datacenters, Servers, Enterprise/Networking domain. Expert in developing IP, subsystem, Chiplets and SOCs Experience with one or more high-speed IO technologies: DDR, PCIe, CXL, Ethernet Management of cross-site teams Knowledge of industry standard SOC components (bus fabrics, I/O devices, processors) Knowledge of HW-SW co-development and silicon validation cycle Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-AB3

Overview Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our powerful, award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. Diversity, equity inclusion are integral parts of our culture and drivers of innovation at Keysight. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers. Responsibilities DP-COE (Digital Photonics Center of Excellence), being part of Keysight Technologies has the responsibility for developing innovative products in the crucial portfolio segment of Oscilloscopes, Photonics, AWG (Arbitrary Waveform Generator), BERT (Bit Error Rate Tester), Digitizer, Logic Analysis, Protocol Analysis which provide fast, extensive insight and enable engineering teams to do their job faster, with higher quality. We serve our customers in the Computer, Semiconductor, Wireless, Automotive, Storage and Communication, Quantum industries with leading edge products and solutions. Keysight Solution teams work closely with DP-COE to provide required solutions to these industries. As an RD SW Engineer - Advanced, you will be working on our Infiniium (High Performance Scope) Software Development in a highly collaborative, fast-paced environment with international teams. You will be responsible to design develop highly complex Software for Infiniium Scope which would require breadth of knowledge from Low Level Software (HW integration), up to GUI/Application Software. You will work closely with RD Project Manager, Product Planners, Product Architects, Solution Teams, FPGA HW developers, Software engineers and Other Stakeholders to develop new product offerings and improve existing ones. The candidate should be a strong team worker and should be able and willing to collaborate with other design teams located in US Europe Malaysia. Qualifications Essential: Bachelor s or Master s degree in Computer Science, Computer Engineering, Electrical Engineering (or equivalent) with strong software Engineering skills. 3 to 5 years of RD experience in product development Experience in developing a significant software application Experience in modern C++ (e.g. C++14 and later) and objected-oriented programming Worked with Common Communication protocols: I2C, UART, SPI, Ethernet Advanced and broad knowledge of contemporary software design methodologies and programming techniques. Working experience in Hardware Software integration. Strong written and verbal communication skills Excellent team player, responsive and accountable Self-starter. Willing and able to quickly learn new applications and technologies Experience in international collaboration (US, Europe, Malaysia) Preferred: Basic knowledge in C# and .Net framework Experience with Keysight instruments like Oscilloscope Experience with analog and digital circuits Experience of working or have understanding of various layers of High-speed protocols like PCIe, USB. MS Visual Studio and VisualGDB experience Embedded Linux experience (Basic shell command) Experience of working with micro controllers Experience with Version Control tool (Git) and working with CI/CD pipelines (Jenkins) Experience with QT or other widget toolkits for GUIs Atlassian tool experience - bitbucket, Confluence, Jira Experience programming hardware devices over a peripheral interface Test driven development experience Scrum agile software development process background Knowledge of performance profiling tools (e.g., Valgrind, gprof, or perf). DP-COE (Digital Photonics Center of Excellence), being part of Keysight Technologies has the responsibility for developing innovative products in the crucial portfolio segment of Oscilloscopes, Photonics, AWG (Arbitrary Waveform Generator), BERT (Bit Error Rate Tester), Digitizer, Logic Analysis, Protocol Analysis which provide fast, extensive insight and enable engineering teams to do their job faster, with higher quality. We serve our customers in the Computer, Semiconductor, Wireless, Automotive, Storage and Communication, Quantum industries with leading edge products and solutions. Keysight Solution teams work closely with DP-COE to provide required solutions to these industries. As an RD SW Engineer - Advanced, you will be working on our Infiniium (High Performance Scope) Software Development in a highly collaborative, fast-paced environment with international teams. You will be responsible to design develop highly complex Software for Infiniium Scope which would require breadth of knowledge from Low Level Software (HW integration), up to GUI/Application Software. You will work closely with RD Project Manager, Product Planners, Product Architects, Solution Teams, FPGA HW developers, Software engineers and Other Stakeholders to develop new product offerings and improve existing ones. The candidate should be a strong team worker and should be able and willing to collaborate with other design teams located in US Europe Malaysia.

- Must have hands on designed/implemented/Integrated DDR controller or DDR Phy design for a project(ASIC or FPGA). - Should be excellent in DDR protocol knowledge. - Must be an expert in micro architecture and RTL coding. Skill set needed - Verilog, SoC & Sub-system RTL Integration, knowledge of industry known standards Interfaces (AXI, AMBA, NOC, Fabric, UCIE, PCIE, SATA, DDR etc. etc.) Scripting : (Shell, python, ruby, perl etc.), CDC & LINT Checkers, Synthesis, LEC, Constraints/SDC understanding, Clocking, UPF, Register roll up. What You'll Do: - You will be responsible for pre-sales support, proposing architecture to customers based on their requirements. - You will work with team to come up with architecture and micro-architecture and work with cross functional team to ensure delivery - You will manage the design / RTL team to achieve the project goals - You will work with customer, provide technical support and provide collaterals agreed upon - You will work with team to achieve flow, methodology improvements to achieve high reuse - You will work with IP vendors to generate / get right configurations of the IP - You will manage team work allocation, schedule, risk mitigation and deliverables from design team. What You'll Need: - 4+ Years of experience in understanding of ARM based architecture, CPU subsystems, interconnect, boot process, memory subsystem, knowledge of Interface IP blocks like PCIe or USB or Ethernet or DDRx controller, QSPI, DMA, or other similar blocks - Good understanding of IPs, integration/application requirement, work with RTL team/vendors to achieve architecture goals - Should have designed one or more ARM based ASIC/SoC and used one or more of PCIe, DDRx, USB, SATA, . - Should have good knowledge of multiple flavors of AMBA bus protocols & interconnect solutions available - Should have good understanding of process / flow to achieve power & performance goals - Should understand and work on all aspects of VLSI development from SoC architecture, micro architecture, RTL coding, RTL quality checks, silicon bring up. - Should have good understanding of requirements from physical design, FPGA, Software, DFT and verification team. - Should have handled a design from Spec to GDS-II - Track design progress, working with cross functional teams, delivering on agreed upon milestones. - Should provide mentoring and support to the team

Experience range from 4+ years. Hands-on experience in Protocol: PCIe, LPDDR4 Experience with TB development from scratch Experience range from 4+ years. Hands-on experience in Protocol: PCIe, LPDDR4 Experience with TB development from scratch" Develop and execute comprehensive verification plans and test benches from scratch. Perform functional verification of digital designs using SystemVerilog and UVM. Verify complex protocols, specifically PCIe and LPDDR4, ensuring compliance with industry standards. Develop and maintain test environments and scripts. Debug and analyze simulation failures to identify root causes. Collaborate with design and architecture teams to ensure design quality. Participate in code reviews and contribute to improving verification methodologies. Document verification results and maintain detailed reports.

Job Title: RTL Design Verification Lead & Manager Location: Bangalore Job Type: Full-Time Payroll: Direct Payroll Experience: 6 to 12 Years Work Mode: Work From Office Interview Mode: Virtual Interview Notice Period: 0-30 days preferred For Manager roles, a minimum of 8+ years of relevant RTL verification experience is required. Job Summary: We are looking for highly skilled RTL Verification Leads and Managers to join our motivated verification team. The selected candidates will play key roles in IP verification, with a focus on protocols such as UCIe, HBM, PCIe, AXI/ACE, Ethernet, DDR, and more. This position requires deep expertise in advanced verification methodologies and a strong background in RTL verification. Key Responsibilities: Lead and execute RTL verification tasks for IPs like UCIe, HBM, PCIe, and Bus Logic. Implement advanced verification methodologies such as UVM/OVM/VMM/SystemVerilog. Generate constrained random stimulus and perform assertion-based verification and functional coverage. Oversee register verification standards and manage NLP/GLS verification flows. Conduct IP and sub-system level verification for protocols including PCIe, UCIe, and HBM. Facilitate controller interoperability testing at the sub-system level. Qualifications: BE/ME/MTech/MS in Electrical Engineering or a related field. 6 to 12 years of RTL verification experience. Proficiency in UVM/OVM/VMM/SystemVerilog. Strong knowledge of constrained random stimulus generation, assertion-based verification, and functional coverage techniques. Experience with register verification standards and NLP/GLS verification flows. Hands-on experience in IP and sub-system level verification for protocols like PCIe, UCIe, and HBM is a strong plus. Prior experience in controller interoperability testing at the sub-system level is desirable. Note: Note: We are aiming to close this requirement soon so preference will be given to candidates who can join quickly.

"> AboutUs: AboutUs: iTriangle Infotech, headquartered in Bangalore, is a prominent player inVehicle Telematics, recognized as Indias largest manufacturer of VehicleTelematics Hardware. Specializing in comprehensive solutions for Transport,Logistics, Education, Healthcare, and the Automobile Industry, iTriangle excelswith its proprietary Remote Data Acquisition Platform (GSM-GPS-RFID-Sensors).This versatile solution encompasses Vehicle Tracking, Fleet Management,Personal Tracking, Safety, Diagnostics, and Prognostics. Boasting in-houseexpertise in Hardware, Firmware, and Web/Mobile app development, iTrianglefacilitates agile and customized deployments. As an ISO 9001:2008 certifiedcompany, it upholds the highest quality standards, establishing itself as apremier choice for cutting-edge technology and reliable tracking solutions. Joblocation: Bangalore Noof Vacancies: 2Nos Responsibilities: Design and developthe layout of printed circuit boards (PCBs) based on schematic diagrams andproject requirements. Interface designproficiency including DDR SDRAM, PCIe, and Ethernet. Contribute to HWschematic design, BOM preparation, and layout using tools such as Altium. Utilize common labequipment such as DMMs, Oscilloscopes, and Analyzers. Conduct boardbring-up tests, covering power/analog/digital, embedded controller, and powerelectronics circuitries. Requirements: Bachelor s degreeor Diploma in Electronics, Electrical Engineering, Computer Engineering, orrelated field. 1 to 8 years ofexperience as a PCB layout engineer. Tool expertise Altium. Setting PCB constraints, classes,differential pairs and groups rules definition; design based on DFM "SRERules . Knowledge of IPCstandards such as IPC7351, IPC2221, IPC22222, IPC-A-600, IPC-A-610. Experience creatingsymbols and libraries from datasheets and coordinating with the design team torectify schematic errors. Familiar in Fabrication Filesgeneration and (Gerber) Support for Manufacturing. Familiarity withgenerating 3D data and collaborating with the Mechanical team.

Being part of DCS group, candidate will be working on PCIe, CXL based Switches, Re-timers and flash controllers for data-centers. Responsibilites: Create Micro-Architecture Specification. Work with team members to design RTL and provide support to verification. Work on constraint development for CDC, RDC and synthesis. Review Test plans from Verification team. Support Emulation and Firmware team in bringup. Qualifications/Requirements Qualifications/Requirements Minimum B.Tech/M.Tech in Electronics or related field. 10+ years of experience in RTL Design and timing aspects of IC design, with leadership capability. Key Skills: Expertise in VLSI logic design, understanding architecture and design planning. Expertise in synthesis/debugging, and timing closure. Knowledge of protocols like PCIe, CXL, AXI, AHB, I3C etc. Proficiency in Tcl and Perl scripting. Power planning and implementation techniques. Proficiency in CDC, RDC and constraint development. Excellent debugging, analytical, and leadership skills. Strong communication skills and interpersonal abilities.

About The Role - Grade Specific Capgemini is hiring for below UEFI Developer Role, interested candidates please apply. Role & responsibilities Strong experience in C Programming. Hands on experience in UEFI/ BIOS Development. EDK2 Platform with any of the modules experiencePEIM, DXE Bare matel development of any of the communication protocol like, UART, SPI, I2C, ADC,DAC ... ToolsGit, JIRA, QEMU, Jenkins, etc. Notice Period15 Days/30 Days/60 Days LocationBangalore

About The Role - Grade Specific Capgemini is hiring for below Storage Driver Developer Role, interested candidates please apply. Responsibilities: Develop high and low level design, drivers and firmware for different HW blocks. Adopt of operating systems and embedded software for different processor architectures. Develop SW based on pre-silicon development vehicles. SW bring-up using pre-silicon vehicles and silicon based platforms. Upstreaming of open source code. Develop SW component level tests and enable in CI/CD system. Debug issues using standard HW/SW based debuggers and diagnosing equipments like Trace 32, JTAG, Lacroy-PCIe Analyzer etc. Skills : Excellent knowledge in Linux internals and different drivers. Strong knowledge in different standards protocol like NVMe, NVMeOF(NVMe over RDMA or TCP/IP), iSCSI, RAID, PCIe, RDMA-NIC, Ethernet , CXL etc. Good understanding of Hardware architectures if worked on above mentioned sstandards. Excellent understanding on SDLC (SW Development Life Cycle). Expert Level development & debug capabilities in the areas of Firmware BSP and device drivers. Complex Technical Problem solving in the area of system boot, UEFI and OS functionality. Can code to standards and integrate with existing solutions. Software development skills (C, C++,Python). Strong low level debugging skills that enable the root causing of issues at the firmware and hardware level and Operating System (OS) internals. Good understanding of various CPU architectures preferable IA, ARM and RISC V. Good understanding of the Pre Silicon Development environment. Education & Experience : BTech/MTech in Computers, Electronics or Electrical Engineering. Around 5 to 8 years of experience in embedded software development across different architectures

Coding hands on SV/UVM Can work independently on tasks such code UVM/SV based components/relevant logic, test case development Can debug test failures and root cause issues independently in complex design. Have exposure to PCIe and AXI Good reasoning and communication skills Must have strong knowledge in PCIe Gen1/3/4/5 (Logical PHY, LTSSM, DLL TL) Must have hands-on debugging skills with both log files and waveform. Prior experience on 3rd party test suites is an added advantage. Must have SV knowledge like writing Constraints, Assertions, Functional coverage etc.

As an integral member of this team, you will work with a team of seasoned engineers. You will have the opportunity to architect, design, and develop some of the world s most widely deployed Enterprise Switches that are continuously evolving towards enabling the support of newer and exciting customer business paradigms. You will be interacting and working closely with some of the finest talent pool in the industry - where you will find that work is both fun and challenging. Your Impact You will bring your unique talents to the group that works on Ciscos Switching technology, which large enterprises now consider to be the Networking Equipment of choice for mission-critical networks In your role as a Software Engineer, you will develop and integrate products that are deployed by some of the leading Enterprises in the world You will work with a BU-wide vibrant technical community, learning from experts and translating this learning into exciting opportunities for personal growth You will work on networking equipment that forms a crucial backbone of many offices, hospitals, educational and financial institutions You will learn about cutting-edge technologies and platforms while developing software for these equipment Experience the exhilaration of taking a product through development and integration Minimum Qualifications Good understanding of distributed/centralized hardware architectures of routers/switches. Experience in working with embedded platforms, various operating systems viz Linux, VxWorks , RTOS internals. Have worked on various Device drivers viz PCIE/I2C/eMMC/SDHC/MDIO/USBs and have worked on Storage devices - NAND/NOR with exposure to file system internals. Exposure to system infrastructure - Building and bringing up next generation complex Switches. Bachelors degree in CS/EE/EC or technical equivalent.

Expertise in the x86 BIOS / UEFI FSP / coreboot development Expertise with x86 CPU/APU architectures and associated compilation tools Expertise in C programming Expertise with platform bring-up Expertise with standard protocols like PCIe, SPI, eSPI, ACPI, SMM Expertise with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. Expertise on working with Intel FSP package source code and understanding of coreboot & FSP boot flow Expertise with different coreboot payloads like edk2, SeaBios, Tianocore etc Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required Good coreboot upstreaming exposure Familiar with coreboot boot stages, upds, memory map, FSP, devicetree concept, payloads to OS bootloader handoff Understanding of coreboot & FSP build tools and build processes Good understanding of UEFI framework concepts to port UEFI code to FSP\ Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of x86-64 architecture from BIOS developer s perspective. Good understanding of UEFI BIOS Boot flow. Basic understanding of Linux Kernel like software development concepts (Kconfig). Preferred resources with valid regional work permit

SoC Verification Engineers (10+ Years) Full Time Posted 6 months ago Job Summary: We are seeking an experienced SoC Verification Engineer with over 10 years in the field to manage and direct verification projects. The ideal candidate should have extensive knowledge of AXI, AHB, and high-speed protocols and expertise in UVM-SV and C-based test development. You will be responsible for managing a team, troubleshooting SoC test issues, and ensuring effective testbench operations. Strong leadership, problem-solving abilities, and clear communication are essential for this role. Skill Set Requirements: 1. Protocols: Strong knowledge in AXI know how s of AHB Experience in any one or more of the high-speed protocols (PCIe, USB, DDR, USB, Ethernet, CXL, UCIe, and AHB) is a must. 2. Experience in UVM-SV, C-based test case development. 3. SV-UVM Based Testbench Development. 4. Prior experience in SoC verification is required. 5. Should have managed a team of size 7+ as well as hands-on experience in project execution. 6. Good experience in Scripting(PERL or PYTHON) Responsibilities: a) Guiding the team in SOC verification using UVM-SV and C-based test flow. b) Crafting verification tests using both C and SystemVerilog (SV), including managing the communication and synchronization between these languages to ensure thorough feature verification. c) Should be able to debug the SoC test failures. d) Should be able to lead a team of a minimum of 7 in size. e) Should be ready to work with teams in different time zones. f) Exceptional problem-solving and teamwork skills, with excellent communication abilities both verbal and written, and the aptitude to rapidly adapt and become proficient. Benefits: Competitive salary and performance-based bonuses. Comprehensive health benefits package. Work on cutting-edge technologies and impactful projects. Opportunities for professional development and career growth. Flexible work hours and remote work options available based on client s policy.

Software Engineers [BSP Firmware] Roles & Responsibilities: Develop, test and integrate device drivers for various devices on our high-performance platforms including Ethernet, I2C, PCIe, SPI, USB, NAND devices Customize BSP, boot code and device drivers Work closely with hardware engineers in board bringup Work closely with manufacturing teams for qualification through diagnostics packages Develop software solutions for high availability and redundancy Lead and mentor a team of high-performance engineers Interact with customers to gather requirements, design firmware and ensure quality of deliverables Interact with cross functional team including product management, hardware engineering, manufacturing, sales teams to design high-performance, cost-effective solutions for storage and switching platforms Qualifications: 10+ years of work experience implementing device drivers and BSP Experience working with cross functional teams including hardware engineering, manufacturing Strong knowledge of real time operating system concepts, multithreading, SMP Strong knowledge of C, Linux driver programming and kernel architecture Knowledge of Python Outstanding software debugging skills Experience using a full range of hardware test equipment like JTAG debuggers, I2C analyzer etc. Solid understanding of Ethernet PHYs, PCIe, USB, SPI, NAND, I2C and SDRAM Knowledge of Intel x86 architecture and BIOS/UEFI is a plus Bachelors or Master degree in ECE, CS, IT or EEE Excellent verbal and written communication skills Strong interpersonal, multitasking and organizational skills Ability to work under pressure.

SoC Verification Engineers (3 to 5 Years) Copy Full Time Posted 1 month ago Job Summary : We are seeking an experienced Verification Engineer , whose role includes creating and debugging test plans for protocols such as AXI, AHB, PCIe, USB, and others. Strong problem-solving abilities, excellent communication, and the capacity to work independently across various time zones. Skill Set Requirements : 1. Protocols : Strong knowledge in AXI know how s of AHB Experience in any one of the high-speed protocols (PCIe, USB, DDR, USB, Ethernet, CXL, UCIe) 2. Experience in UVM-SV, C-based test case development 3. Prior experience in test plan development for all the protocols worked. 4 . Prior experience in SoC verification is Must 5. Expected to have good knowledge in SoC level testbench involving SV-UVM and C-based flows . Responsibilities: a) Develop tests for SOC verification using UVM-SV and C-based test flow. b) C rafting verification tests using both C and SystemVerilog (SV), including managing the communication and synchronization between these languages to ensure thorough feature verification. c) Should be able to debug the SoC test failures. d) Should be ready to work with teams in different time zones. f) Strong problem-solving and teamwork skills, and strong verbal and written communication skills Capable of quickly ramping up and working independently under guidance Educational Qualifications: Degree in BTech/MTech Benefits: Competitive salary and performance-based bonuses. Comprehensive health benefits package. Work on cutting-edge technologies and impactful projects. Opportunities for professional development and career growth. Flexible work hours and remote work options available based on client s policy.

SoC Verification Engineers (5 to 8 Years) Full Time Posted 6 months ago Job Summary: We are seeking an experienced Verification Engineer with 5+ years of expertise in AXI and high-speed protocol s whose role involves developing and executing SoC verification test plans using UVM-SV and C-based flows, debugging test failures, and ensuring comprehensive coverage closure. Skill Set Requirements : 1. Protocols: Expertise in AXI Expertise in any one or more of the high-speed protocols (PCIe, USB, DDR, USB, Ethernet, CXL, UCIe) 2. Expertise in UVM-SV, C-based test case and testbench development . 3. E xperience in SoC verification is a must . 4. Expected to have good knowledge in SoC level testbench involving SV-UVM and C-based flows ; should be able to make changes based on the requirements. 5 Good debugging skills . 6 Familiarity with scripting(PERL or Python) . 7 . Prior experience of test plan development for all the protocols worked. Responsibilities: a) Develop test-plans, tests for SOC verification using UVM-SV and C-Based test flow . b) C rafting verification tests using both C and SystemVerilog (SV), including managing the communication and synchronization between these languages to ensure thorough feature verification. c) Should be able to debug the SoC test failures . d) Functional Coverage Model development and assertions development . e) Coverage(Code and Functional) analysis and closure . f ) Should be ready to collaborate with teams in different time zones . g ) Strong problem-solving and teamwork skills, and strong verbal and written communication skills Capable of quickly ramping up . h) Should be able to mentor manage juniors in the team Benefits: Competitive salary and performance-based bonuses. Comprehensive health benefits package. Work on cutting-edge technologies and impactful projects. Opportunities for professional development and career growth. Flexible work hours and remote work options available based on client s policy.

About The Role About The Role :The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful.Your responsibilities will include but not limited to: Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development. Qualifications You must possess the below minimum qualifications to be initially considered for this position Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidatesMinimum QualificationsCandidate will have a Bachelors degree in Computer Engineering/ Computer Science or Electrical Engineering with 6+ years of experience -OR- a Masters degree in Computer Engineering Computer Science or Electrical Engineering with 4+ years of experience with C and Object Oriented Software design including algorithms and data structures. Knowledge of Software development practices and quality standards. Experience with Unix Windows based SW development tools. Experience developing bus functional models for unit level verification or Verification IP development. Preferred Qualifications:- Proficiency in System C SystemVerilog UVM and ESL modeling methodologies Proficiency in HW design and verification methodologies Working knowledge of highspeed HW protocols eg PCIe DDR Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies"”spanning software, processors, storage, I/O, and networking solutions"”that fuel cloud, communications, enterprise, and government data centers around the world.

Greetings From Dexcel Designs! We are inviting applications for FPGA Design and Verification Engineer Job Overview: We are seeking FPGA Design and Verification Engineers with 3-6 years of experience in RTL design, FPGA verification, and high-speed interface development . This role involves designing, implementing, and validating FPGA-based systems while working closely with cross-functional teams in hardware and embedded software development. Key Responsibilities: Develop and implement RTL designs for FPGA-based systems. Perform functional verification and validation of FPGA designs. Work on timing analysis, synthesis, and debugging of FPGA architectures. Collaborate with hardware, embedded software, and system architects to ensure seamless integration. Debug FPGA designs using industry-standard tools and methodologies . Technical Skills Required: Strong understanding of RTL design (Verilog/VHDL) and FPGA implementation. Experience with FPGA tools such as Vivado, Quartus, Synplify, ModelSim, and QuestaSim . Hands-on experience with at least one of the following high-speed interfaces : PCIe, SATA, USB, DisplayPort, JESD204B, SRIO MII/RMII/GMII/RGMII/SGMII/XAUI/RXAUI DDR/LPDDR/DDR2/DDR3, QDR memories Knowledge of FPGA debugging techniques, timing closure, and constraint handling . Preferred Skills: Experience in FPGA-based hardware design and testing . Exposure to SoC architectures and system-level integration . GFPGA Design and Verification Engineer ) and power integrity (PI) analysis .G