665 Pcie Jobs - Page 13

We are seeking an experienced AIX Graphics Device Driver Developer to design, implement, and maintain 2D and 3D graphic device drivers for the IBM AIX operating system. This role requires deep knowledge of AIX/Linux device driver architecture, graphics hardware interaction, and kernel programming on AIX. Key Responsibilities * Design, develop, and maintain graphics device drivers for AIX on IBM Power Systems. * Port and adapt open-source or proprietary graphics stacks (e.g., X11, GLX, OpenGL components) to AIX. * Integrate and debug graphics drivers across kernel and user-space interfaces. * Work with low-level graphics subsystems, including framebuffer, DRM (Direct Rendering Manager), and X Server extensions. * Enable and optimize support for GPU hardware * Analyze and resolve system-level issues, kernel crashes, or graphics anomalies reported by QA or customer support. * Participate in system bring-up, debugging graphics acceleration and mode setting issues. * Contribute to documentation and tooling to improve diagnostics and driver deployment on AIX. Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise * 5+years of experience in C programming and kernel-mode driver development. * Deep knowledge of AIX and Linux kernel internals, device driver framework, and ODM (Object Data Manager). * Experience with X Window System, X11 device driver model, Xorg, GLX, and OpenGL/Mesa stack. * Experience working with graphics hardware (e.g., Radeon, NVIDIA, or IBM graphics). * Familiarity with framebuffer, KMS (Kernel Mode Setting), and DRM subsystem concepts. * Strong debugging and profiling skills using kdb, truss, snap, crash, and errpt. * Comfortable with hardware programming concepts such as MMIO, PCIe, interrupt handling, and DMA. * Ability to read and interpret datasheets and hardware specs

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Software engineer II Work Location : Ahmedabad Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence One Team culture promotes collaboration within and across teams to ensure customer success. Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests. You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other every day Job Summary: Please send CV to K Madhu Prasad kmadhup@cadence. com We are looking for a candidate with excellent communication skills and ability to ramp up on new technologies quickly and independently. As part of this highly talented team, the candidate will develop verification environment and implement test features for Verification IP tools. This an excellent opportunity to work in a supportive and friendly work environment, where we are vested in each other s success, and are passionate about technology and innovation. Job responsibilities: Responsible for the design, development, and verification of VIP. Experience and Technical Skills required: 2 to 4 years or equivalent relevant experience Proficiency in functional verification using SV/UVM and strong debugging skills. Strong Digital Electronics and Programming fundamentals. Hands-on knowledge of C/C++/Scripting. Working experience on PHY Interface for the PCI Express (PIPE), USB4, PCIe, DisplayPort will be a strong plus. Self-motivated individuals with strong analytical and communication skills. Qualifications BE/BTech/ME/MS/MTech in Electrical/Electronic or equivalent Behavioral skills required. Must possess strong written, verbal and presentation skills. Ability to establish a close working relationship with both customer peers and management. Explore what s possible to get the job done, including creative use of unconventional solutions. Work effectively across functions and geographies. Push to raise the bar while always operating with integrity. K Madhu Prasad kmadhup@cadence. com We re doing work that matters. Help us solve what others can t.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Microchip Data Center Solutions(DCS) Group vision is to connect, manage and secure the worlds information by delivering innovative solutions for storage, memory & compute connectivity and end-point solutions aligned to market transitions. Our mission is to be the preferred partner for storage, memory, connectivity and end-point storage solutions for the worlds data centers including AI infrastructure. Microchip being one of the major suppliers of SAS/SATA Expanders and SAS/SATA/NVMe Storage controllers, is seeking for highly skilled and experienced firmware development engineer, who will be joining a team of professionals in developing software and Real-Time Firmware solutions for state-of-art System-on-Chip (SoC) devices with embedded MIPS processors. Successful applicant will report to Manager of Firmware Engineering and will collaborate with Cross Geo teams to design, develop, debug and support a wide variety of Storage controllers and expanders. Key Responsibilities: Your responsibilities will include, but are not limited to the following: Design and Develop firmware/device drivers/software for MIPS processor powered solutions using C and assembly language. Troubleshoot and resolve complex software problems in embedded real-time systems. Participate in detailed design and code reviews of implementations by team Participate as a senior technical member of the team in the technical analysis and designing of storage software solutions involving SAS/SATA expanders, SATA/SAS/NVMe RAID controller technologies and Network Storage architectures. Work in collaboration with other Microchip sites to design solutions and resolve customer issues Support current product and guide next generation product to production. Analyze software performance (cycle counts, cache utilization) of firmware. Write comprehensive engineering documentation. Present technical information to small teams of engineers and technical marketing personnel. Requirements/Qualifications: Bachelors degree or higher in Electronics/Computer Science Engineering or related technical majors 10+ years of firmware development experience in embedded systems. 8+ years of experience with one or more storage protocols such as NVMe and thorough knowledge of PCIe interface. 8+ years of experience in for Storage technologies or demonstrated comparable experience. Extensive working knowledge of storage firmware design and implementation. Demonstrated ability to conceive, design, implement and document complex firmware systems. Experience in developing device drivers for peripheral protocols like GPIO, I2C, SPI, etc Experience in GreenHills probe is added advantage. Demonstrated knowledge in use of protocol analyzers and debug tools. Exposure to Storage Security features (Encryption algorithms, SPDM, Hash algorithms) are added advantage Exposure to Network protocols are added advantage Effective communicator of technical ideas using verbal as well as written skills Effective Team Player Highly motivated, sets personal goals, and achieves goals without supervision. Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Microchip Data Center Solutions (DCS) Group vision is to connect, manage and secure the worlds information by delivering innovative solutions for storage, memory & compute connectivity and end-point solutions aligned to market transitions. Our mission is to be the preferred partner for storage, memory, connectivity and end-point storage solutions for the worlds data centers including AI infrastructure. Microchip, being one of the major suppliers of SAS/SATA Expanders and SAS/SATA/NVMe Storage controllers, is seeking highly skilled and experienced firmware development engineer, who will be joining a team of professionals in developing software and Real-Time Firmware solutions for state-of-art System-on-Chip (SoC) devices with embedded MIPS processors. Successful applicants will report to the Manager of Firmware Engineering and will collaborate with Cross Geo teams to design, develop, debug and support a wide variety of Storage controllers and expanders. Your responsibilities will include, but are not limited to the following: Develop firmware/device drivers/software for MIPS processor powered solutions using C Troubleshoot and resolve complex software problems in embedded real-time systems. Writing Unit test and validating the components you have developed adhering to the requirements Participate in detailed design and code reviews of implementations by team. Participate in technical analysis and designing of storage software solutions involving SAS/SATA expanders, SATA/SAS/NVMe RAID controller technologies and Network Storage architectures. Work with Apps/Marketing team to help customers in the development of their Storage solutions using Microchip devices and software/firmware components. Work in collaboration with other Microchip sites to design solutions and resolve customer issues Support current product and guide next generation product to production. Write comprehensive engineering documentation. Proactive approach to reaching out to stakeholders to drive your deliverables to closure Requirements/Qualifications: Bachelors or higher degree in Electronics/Computer Science Engineering or related technical majors 8+ years of strong firmware development experience in embedded systems using C programming and Assembly 3+ years of experience with one or more storage protocols such as SAS/SATA/NVMe and knowledge of PCIe. Knowledge of scripting languages, programming tools and environments Basic understanding of RAID Extensive experience of storage firmware design and implementation. Demonstrated ability to conceive, design, implement and document complex firmware systems. Demonstrated knowledge in use of protocol analyzers and debug tools. Exposure to Storage Security features (Encryptions, SPDM, Hash algorithms) are added advantage Exposure to Network protocols (TCP/IP, ARP, understanding of ethernet frame formats, basic understanding of network device drivers), are added advantage. Effective communicator of technical ideas using verbal as well as written skills Team Player Highly motivated, sets personal goals, and achieves goals without supervision. Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Strong in digital design. Skills in ASIC/FPGA verification(directed test or SV/UVM) A good knowledge of simulation flow. Good scripting knowledge Perl/python Share your Resume to mansoor@hisoltech.com

Project description This is a great opportunity to work as a part of a highly regarded team to deliver leading-edge solutions. We are looking for an experienced engineer for an exciting role to augment our Client's core Linux-embedded team to work on the latest platforms and software. The person will interact closely with key technical experts to ensure the best possible performance and results on the SoC platforms. Responsibilities Design, develop, and maintain x86 BIOS/UEFI firmware, ensuring robust and efficient solutions aligned with project specifications. Collaborate with hardware and software teams to support x86 CPU/APU architectures, optimizing performance through expert-level C programming. Work on UEFI bootloaders and applications, focusing on UEFI-based storage protocols such as AHCI, SATA, and NVMe. Perform platform hardware analysis and interpret processor specifications to support coreboot mainboard porting and integration. Integrate and customize BIOS code bases (AMI, Insyde, or Phoenix BIOS) to meet customer and platform requirements. Debug and resolve firmware-related issues, leveraging deep knowledge of UEFI framework concepts and storage protocols. Contribute to the development of Android UEFI-based bootloaders for x86 platforms, if applicable. Maintain code quality through rigorous testing, documentation, and adherence to best coding practices. Provide technical guidance and mentorship to junior developers, supporting knowledge sharing and team growth. Collaborate with cross-functional teams to ensure smooth firmware delivery, addressing technical challenges proactively. SkillsMust have 5-15 years of experience in the x86 BIOS/UEFI development Experience with x86 CPU/APU architectures and associated compilation tools Expert in C language Familiar with at least one BIOS code base (AMI, Insyde, or Phoenix BIOS) Experience working on UEFI bootloader or UEFI applications mainly involved in UEFI-based storage protocols AHCI, SATA, and NVMe. Will be good if have any experience in Android UEFI-based Bootloader for x86. Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required. Good understanding of UEFI framework concepts and Storage protocols. Nice to have Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of industry-standard protocols like SATA, NVMe, AHCI, PCIe, SPI, eSPI etc. Good understanding of specifications like ACPI, SMM. Good understanding of x86-64 architecture from BIOS developer's perspective. Good understanding of UEFI BIOS Boot flow. Bachelor's degree in computer science engineering from a reputed college Master's degree from a reputed university is a big plus

About Marvell . Your Team, Your Impact Marvell Data Centre Engineering (DCE) - Compute & Storage (CCS) BU has been at the forefront of developing and delivering leading-edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast growing product lines, Marvell technology is powering the next generation data processing and workload acceleration platforms for the Carrier, Cloud/Enterprise and Automotive Compute market segments. The team focusses on the Custom ASIC business, Cloud AI solutions & Enterprise/Career solutions including the CXL product line. What You Can Expect Job Responsibilities: SOC, Sub system & Block verification activities - should have participated in successful completion of SOC/Subsys projects across all phases from SOC/Subsys Specification to Silicon. Responsible for complete SOC/Subsys/Block verification activities like - develop verification architecture and verification plan, develop UVM based testbench, Integrate in-house verification components + complex VIP s ( ARM, Cadence, Synopsys, etc), develop test cases (UVM & assembly), verify and do coverage analysis in RTL and gate level design. Conduct reviews in all the SOC/Subsys verification phases, to achieve desired quality + on-schedule deliverables and drive SOC/Subsys verification process improvement. Mentor junior engineers and technically guide and monitor them on their day to day technical tasks. Work effectively with a global team and be self-motivated to manage deliverables Communicate clearly both verbally and in writing. What Were Looking For Technical Requirement s: Bachelor s degree in CS/EE with 14 18 years of relevant experience, or Master degree in CS/EE with 12 16 years of relevant experience Must Lead a team of 4-6 engineers Experience in SOC/Subsys level/Block verification of ARM-based SOCs; experience in ARM based boot environment preferred. Knowledgeable of ARM architecture and AMBA bus standards like AXI-4, CHI and ACE. Experience with industry standard interfaces such as DDR, eMMC, PCIE, Ethernet and USB. Experience in coding UVM SOC/Subsys level testbenches, BFM, scoreboards, monitors, etc. Proficient in writing and debugging tests in UVM as well as C. Exposure to Cadence, Synopsys, Mentor and/or ARM verification tools. Experience with assertion-based formal verification tools. Proficient in programming in scripting languages such as tcl and Perl. Understanding of hardware emulation support. Familiarity with TLMs in SystemC. Experience in Version tools like CVS, SVN, GIT etc. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

Hi all, We are hiring for the role ASIC Engineer HSIO Post-Silicon Electrical Validation Experience: 3 - 5 Years Location: Hyderabad Notice Period: Immediate - 15 Days Skills: We are seeking a skilled ASIC Engineer to join our High-Speed I/O (HSIO) Post-Silicon Electrical Validation team. The ideal candidate will possess hands-on experience with high-end lab equipment, proficiency in automation scripting, and a solid understanding of high-speed interfaces. This role involves validating and characterizing ASICs post-fabrication to ensure they meet performance, power, and reliability specifications Key Responsibilities Develop and execute detailed post-silicon validation plans for new ASICs. Design and implement test cases in Python, C++, LabView, or VBA for validating functionality, performance, and power metrics. Bring-up silicon in the lab and debug/resolve issues using high-end lab equipment such as oscilloscopes, JBERTs, and power supplies. Analyze and root-cause silicon failures, collaborating closely with design teams to drive resolution. Document validation results, prepare comprehensive reports, and communicate findings effectively to cross-functional teams. Required Qualifications Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. 35 years of experience in post-silicon validation, hardware bring-up, or related fields. Proficiency in scripting languages such as Python, C++, LabView, or VBA for automation purposes. Hands-on experience with high-end lab equipment, including oscilloscopes, JBERTs, and power supplies. Strong understanding of high-speed interfaces like PCIe, DDR, and USB. Excellent analytical and problem-solving skills. Effective communication skills and the ability to work collaboratively in a team environment. If you are interested drop your resume at saraswati.g@acesoftlabs.com

. Job Title: Software Engineer 3_ Platform Software Experience: 3+ Years Location: Bangalore About ACX Platform Software Team Our team in Juniper is responsible for driving technology leadership in the Juniper routing, access, and aggregation router developments for next-generation Metro and 5G networks, deployed in some of the world s largest service providers, data centers, enterprise, and metro ethernet networks. We are driving Juniper s growth in revenue and market share in service provider, data center, enterprise, access, and aggregation space, by delivering market-leading products with continuous innovation and relentless execution. These products (either modular or chassis-based) are based on either Juniper homegrown switching ASIC or based on merchant silicon. Who are we looking for? Upbeat and hardworking engineers with a can-do demeanor to become part of Junipers success story. Responsibilities You will be part of this platform team, responsible for developing platform software in the areas of: Board bring-up related experience. 10G, 40G, 100G, 400G, 800G interface related platform software like interface drivers, etc. Platform infrastructure-related software like Routing Engine Redundancy/High Availability, Chassis/line card, fabric, Optics, etc. Timing software in PTP, SYNCE & Grand Master You will be responsible for these product developments in the platform area in either JunOS or Junos evolved software architecture. In addition to the development activity, you are required to work closely with system and solution test teams to ensure products/solutions delivered are of the highest quality. You will be required to work closely with Juniper Technical Assistance Team for providing engineering assistance in supporting critical customer escalations for customer deployments. Requirements BTech / MTech in CS/CE or related field with proven experience. Good understanding of hardware-level details for Optics, PCIe, SPI, I2C, Retimers, FPGA, CPLD, MDIO, Flash Driver Proficiency with device drivers, system bring-up, FreeBSD/Linux internals. Understanding of Ethernet, OTN, SONET, etc. technologies. Strong technical, analytical, and problem-solving skills. Strong in C, C++ programming, OO analysis & design, data structures, and system debugging skills. Prior software development experience on networking products.

ESSENTIAL DUTIES AND RESPONSIBILITIES: Need experienced Validation engineers who understand embedded NAND system design and firmware algorithms in order to create a test validation plans and implement them in modern object oriented languages. Work closely with the system architects and the firmware team to develop Validation plans, test bench and test cases Develop an overall validation strategy including defining validation infrastructure and validation methodology Debug the firmware and expose design issues Define and design functional tests required to meet customer needs Review SanDisk UFS/eMMC embedded NAND validation requirements and influence future SanDisk product design for debug and test Work with customers to understand field bugs and to enhance the validation coverage Interface with all key stakeholders to ensure product validation meets customer expectations and needs Qualifications REQUIRED: Bachelor or Master in Computer Science, Computer/Electronics Engineering or equivalent required. Minimum 5+ years in storage related segme

Experience / Skills: 5-8 Years in Embedded Firmware Storage/SSD FTL or Frontend Firmware development Strong firmware design and debug experience using assembly and C programming. Knowledge of mass storage interface protocol PCIe/NVMe as needed, Understanding of storage interfaces including SATA, or SAS (optional) Knowledge in the use of scripting languages, programming tools and environments Experience in the storage industry in SSD, HDD, storage systems, or a related technology. Working knowledge of NAND flash and other non-volatile storage is optional but plus. Experience in test equipment such as oscilloscopes and logic/bus analyzers (Viavi or LeCroy - good to have). Ability to work independently with a minimum of day-to-day supervision. Ability to work in a multi-functional team and under the pressure of multiple priorities. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidates true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

We are seeking a Senior Engineer, who understand embedded NAND system design and firmware algorithms in order to create a test validation plans and implement them in modern object oriented languages. Work closely with the system architects and the firmware team to develop Validation plans, test bench and test cases Develop an overall validation strategy including defining validation infrastructure and validation methodology Debug the firmware and expose design issues Define and design functional tests required to meet customer needs Review SanDisk UFS/eMMC embedded NAND validation requirements and influence future SanDisk product design for debug and test Work with customers to understand field bugs and to enhance the validation coverage Interface with all key stakeholders to ensure product validation meets customer expectations and needs Qualifications Technical and analytical skills required In depth understanding of firmware algorithms used in any NAND Flash based storage devices (SSD, eMMC, UFS, SD, USB Flash drives) or other storage devices

Be part of the Development team that validated Sandisks flash devices. Learn and understand complex technical flash devices specifications and apply that knowledge to enhance test suite and test processes. Executed regression and end-to-end scenario test cases to validate business, system and operational requirements. Develop software tools to improve test processes. Proactively seize for test suite quality improvement plans with data analytic approach. Devise strategies for in-depth functionality and compatibility testing of complex drive features. Collaborate with Test Dev engineers, Firmware Engineers, Architects and other functional teams, independently in issue resolutions. Familiar with using Protocol Analyzers to understand and analyze traces for failure investigation. Review SanDisk UFS/eMMC embedded NAND validation requirements and influence future SanDisk product design for debug and test Work with customers to understand field bugs and to enhance the validation coverage Interface with all key stakeholders to ensure product validation meets customer expectations and needs Qualifications In depth understanding of firmware algorithms used in any NAND Flash based storage devices (SSD, eMMC, UFS, SD, USB Flash drives) or other storage devices Knowledge in any Host protocols like as UFS,

. Job Title: Software Engineer 4 - Platform Software, Device drivers, System bring-up Experience: 7+ Years Location: Bangalore About ACX Platform Software Team Our team in Juniper is responsible for driving technology leadership in the Juniper routing, access, and aggregation router developments for next-generation Metro and 5G networks, deployed in some of the world s largest service providers, data centers, enterprise, and metro ethernet networks. We are driving Juniper s growth in revenue and market share in service provider, data center, enterprise, access, and aggregation space, by delivering market-leading products with continuous innovation and relentless execution. These products (either modular or chassis-based) are based on either Juniper homegrown switching ASIC or based on merchant silicon. Who are we looking for? Upbeat and hardworking engineers with a can-do demeanor to become part of Junipers success story. Responsibilities You will be part of this platform team, responsible for developing platform software in the areas of: Board bring-up related experience. 10G, 40G, 100G, 400G, 800G interface related platform software like interface drivers, etc. Platform infrastructure-related software like Routing Engine Redundancy/High Availability, Chassis/line card, fabric, Optics, etc. Timing software in PTP, SYNCE & Grand Master You will be responsible for these product developments in the platform area in either JunOS or Junos evolved software architecture. In addition to the development activity, you are required to work closely with system and solution test teams to ensure products/solutions delivered are of the highest quality. You will be required to work closely with Juniper Technical Assistance Team for providing engineering assistance in supporting critical customer escalations for customer deployments. Requirements BTech / MTech in CS/CE or related field with proven experience. Good understanding of hardware-level details for Optics, PCIe, SPI, I2C, Retimers, FPGA, CPLD, MDIO, Flash Driver Proficiency with device drivers, system bring-up, FreeBSD/Linux internals. Understanding of Ethernet, OTN, SONET, etc. technologies. Strong technical, analytical, and problem-solving skills. Strong in C, C++ programming, OO analysis & design, data structures, and system debugging skills. Prior software development experience on networking products.

Pre-Post Silicon Embedded Engineer Position: Pre-Post Silicon Embedded Engineer Years of Experience: 10+ Years Location: Bengaluru, Karnataka Job Brief: Today, software is proliferating in every sector. Automotive, HPCs, Consumer electronics, etc. Name any domain, and you will notice huge lines of software code. It s fair to say that soon, software will rule the world. One of the big challenges for system and silicon companies is to verify and validate their SoCs as early in the product design cycle as possible. Product teams are achieving this by performing what is called a shift left . In the context of chip verification and validation, it is tantamount to having device drivers/software. Engineers work as part of silicon validation teams and develop driver software to test the SoC, all its critical data paths, performance et al during pre-silicon verification itself. Job Description: Vayavya Labs is closely working with an industry leader in the consumer electronics space for the development of a device driver and bare metal software to verify and validate the customer s cutting edge SoC. The job involves working with the pre- & Post silicon bringup teams. Understanding the SOC architecture (sub-systems like Camera / Display / GPU / memory / security modules, etc.) and developing the required test software. Ability and expertise in quickly understanding the sub-system architecture and the corresponding test plans is a must. The job also involves executing this software on emulation hardware and FPGAs in pre-silicon and the actual development board in post-silicon. You will be working with global teams, and this is an excellent opportunity to interact with the best in the world. You should be comfortable with C programming and scripting languages like Python and TCL. Must Have Skills: Deep understanding of PCIe Gen3/Gen4/Gen5 (and emerging Gen6) specifications, including transaction, data link, and physical layers. Proven experience in PCIe protocol-level validation, error injection, and compliance testing. Strong proficiency in C programming for embedded systems. Knowledge of ARM architecture and subsystems. Good to Have: Familiarity with ASIC verification methodologies and proven experience in verification processes. Experience with hardware emulators like Synopsys Zebu, Cadence Palladium, or Mentor Veloce. Knowledge of Pytest, TCL, and Bash scripting. Experience in consumer electronics, particularly in products involving displays and camera peripherals. Understanding of RTL-level verification techniques. Familiarity with FreeRTOS for real-time operating systems. Experience with Linux system programming (threads, mutexes) and ARM booting processes. Non-Technical Skills: Strong analytical and problem-solving skills. Excellent debugging and troubleshooting capabilities. Clear and effective verbal and written communication. Self-motivated with a strong ability to learn and adapt. Eager to take on new challenges and responsibilities.

. Job title: Software Engineer Staff - Platform Software, Device drivers, System bring-up Experience: 10+ Years Location: Bangalore About ACX Platform Software Team Our team in Juniper is responsible for driving technology leadership in the Juniper routing, access, and aggregation router developments for next-generation Metro and 5G networks, deployed in some of the world s largest service providers, data centers, enterprise, and metro ethernet networks. We are driving Juniper s growth in revenue and market share in service provider, data center, enterprise, access, and aggregation space, by delivering market-leading products with continuous innovation and relentless execution. These products (either modular or chassis-based) are based on either Juniper homegrown switching ASIC or based on merchant silicon. Who are we looking for? Upbeat and hardworking engineers with a can-do demeanor to become part of Junipers success story. Responsibilities You will be part of this platform team, responsible for developing platform software in the areas of: Board bring-up related experience. 10G, 40G, 100G, 400G, 800G interface related platform software like interface drivers, etc. Platform infrastructure-related software like Routing Engine Redundancy/High Availability, Chassis/line card, fabric, Optics, etc. Timing software in PTP, SYNCE & Grand Master You will be responsible for these product developments in the platform area in either JunOS or Junos evolved software architecture. In addition to the development activity, you are required to work closely with system and solution test teams to ensure products/solutions delivered are of the highest quality. You will be required to work closely with Juniper Technical Assistance Team for providing engineering assistance in supporting critical customer escalations for customer deployments. Requirements BTech / MTech in CS/CE or related field with proven experience. Good understanding of hardware-level details for Optics, PCIe, SPI, I2C, Retimers, FPGA, CPLD, MDIO, Flash Driver Proficiency with device drivers, system bring-up, FreeBSD/Linux internals. Understanding of Ethernet, OTN, SONET, etc. technologies. Strong technical, analytical, and problem-solving skills. Strong in C, C++ programming, OO analysis & design, data structures, and system debugging skills. Prior software development experience on networking products.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Microchip Data Center Solutions(DCS) Group vision is to connect, manage and secure the worlds information by delivering innovative solutions for storage, memory & compute connectivity and end-point solutions aligned to market transitions. Our mission is to be the preferred partner for storage, memory, connectivity and end-point storage solutions for the worlds data centers including AI infrastructure. Microchip being one of the major suppliers of SAS/SATA Expanders and SAS/SATA/NVMe Storage controllers, is seeking for highly skilled and experienced firmware architect, who will be leading designs and development of Storage firmware and Real-Time Firmware solutions for state-of-art System-on-Chip (SoC) devices with embedded MIPS processors. Successful applicant will collaborate with Cross Geo teams to design, develop and a wide variety of Storage controllers and expanders. Key Responsibilities: Your responsibilities will include, but are not limited to the following: Design and Develop firmware/device drivers/software for MIPS processor powered solutions using C and assembly language. Troubleshoot and resolve complex software problems in embedded real-time systems. Participate in detailed design and code reviews of implementations by team As a senior technical member of the team, participate in the technical analysis and designing of storage software solutions involving SAS/SATA expanders, SATA/SAS/NVMe RAID controller technologies and Network Storage architectures. Work with Apps/Marketing team to help customers in the development of their Storage solutions using Microchip devices and software/firmware components Understand customer requirements and drive them through the project management process Work in collaboration with other Microchip sites to design new features/solutions and support customer Analyze software performance (cycle counts, cache utilization) of firmware. Analyze IO performance and finding ways to make the products yield better performance Write comprehensive engineering documentation. Present technical information to small teams of engineers and technical marketing personnel. Requirements/Qualifications: Bachelors degree or higher in Electronics/Computer Science Engineering or related technical majors 15+ years of firmware development experience in embedded systems 10+ years of experience with one or more storage protocols such as SAS/SATA/NVMe and thorough knowledge of PCIe protocol. 10+ years of experience in Storage technologies or demonstrated comparable experience. Good Hands-on Experience in Firmware security and networking protocols is added advantage Extensive working experience of storage firmware design and implementation using C and ASM Experience in developing device drivers for peripheral protocols like GPIO, I2C, SPI, etc Experience in GreenHills probe is added advantage. Demonstrated ability to conceive, design, implement and document complex firmware systems. Demonstrated knowledge in use of protocol analyzers and debug tools. Exposure to Storage Security features (Encryptions, SPDM, Hash algorithms) are added advantage Effective communicator of technical ideas using verbal as well as written skills Team Player and proven leadership skills Highly motivated, sets personal goals, and achieves goals without supervision Debugging technique using GHS. Probe. Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Overview Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers. Responsibilities Strong knowledge of the Basic electronics and Hands on experience with Test & measurement instruments. Solid understanding of protocols like PCIE,DDR,USB and the ethernet technologies.Knowledge on Oscilloscope,BERT and optics.Knowledge on keysight products such as UXR,DSO9000 series scope and M8020A BERT s is added advantage. Strong organisational skills, ability to multi-task, prioritise and work well under pressure. Qualifications Bachelor and/or Master s degree in electronics & communications Technologies or science discipline. A strong level of English language required. Typically, 3-8 years relevant experience woring in Silicon validation,Test & measurement industry. Careers Privacy StatementKeysight is an Equal Opportunity Employer. Strong knowledge of the Basic electronics and Hands on experience with Test & measurement instruments. Solid understanding of protocols like PCIE,DDR,USB and the ethernet technologies.Knowledge on Oscilloscope,BERT and optics.Knowledge on keysight products such as UXR,DSO9000 series scope and M8020A BERT s is added advantage. Strong organisational skills, ability to multi-task, prioritise and work well under pressure.

NVIDIA s invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI the next era of computing with the GPU acting as the brain of computers, robots, and self-driving cars. Today, we are increasingly known as the AI computing company. We are actively looking to add the smartest brains to our company and usher in the next wave of computing. NVIDIA Silicon Solutions group is seeking a versatile engineer to be part of a High Speed SERDES IO validation team. You will dive into high-speed interconnects like PCIe, USB3, Ethernet, UFS, etc. - perform bringup, electrical validation, with strong emphasis on stability and efficiency. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from artificial intelligence, consumer graphics, self-driving cars, and more What Youll Be Doing: Lead the planning and electrical validation of PCIe/Ethernet/USB3/UFS interfaces for NVIDIA GPUs, CPUs, and SOCs. Engage proactively with multi-functional engineering teams, including system architects, mixed-signal design, software/firmware, hardware/software quality assurance, operations, and application engineering to facilitate the design, development, debugging, and release of upcoming products. Drive schedule, tuning guide, customer critical issues and design feedback. Investigate technically complicated HSIO bugs and help drive debug efforts across various teams. Coordinate with logic design, circuit design, board design, simulation, diagnostics, ATE, firmware, driver, and marketing teams to drive the chip into production. Develop new methodologies to improve the HSIO validation process from both quality and effort-efficiency point of view. What We Need to See: BS or MS in Electronics Engineering (or equivalent experience) and a minimum of 3 years of proven experience. Excellent knowledge of signal integrity concepts, silicon characteristics, and high-speed/SERDES electrical validation and related tuning. In-depth understanding of PCIe (or similar) protocol and related electrical concepts and hands-on on electrical validation. Good knowledge of lab equipment (DSOs, BERT, Protocol/Logic analyzers). Understanding of firmware/driver structures and their interaction with Hardware. Strong EE fundamentals, scripting languages (Perl, Python) to write direct test/debug programs for stress and failure analysis. Strong project management, problem-solving, collaboration, and interpersonal skills. #LI-Hybrid

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running.The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise Join Optical Networks division , where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, weve united two industry leaders to create an optical networking powerhousecombining cutting-edge technology with proven leadership to redefine the future of connectivity. Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group. As an FPGA Verification engineer, you will be responsible for designing verification plans, developing environment/testbench, creating test scenarios for running simulations, coverage analysis and lab support during board bring up to ensure first time right quality of Infinera product. Candidate should be capable of handling projects independently and have a strong will to drive for solutions. Must have 12 16 yearsof experience in developing System Verilog UVM based test environments, developing and implementing test plans at block, sub-chip and chip levels. Must have strong HVL coding skills for Verification and be hands-on with one or more Industry standard simulators such as VCS, NC, MTI used in Verification and waveform-based debugging tools. Exposure to UVM (or similar) verification methodologies is required. Familiarity with HDLs such as Verilog and scripting languages such as perl is highly desired. Working knowledge of RTL design is preferred. Should be conversant with technologies like the Ethernet, PCIe, I2C, SPI etc. Knowledge of telecom protocol is preferred. Structured and thorough with analytical and troubleshooting skills. Good written and oral communication skills are required. Flexible, innovative, self-driven and willing to take initiatives. Highly motivated team player with exceptional leadership capability. Develop and execute verification plans for high-complexity DWDM systems used in LH/ULH optical network applications. Design and implement simulation environments and testbenches to validate FPGA functionality and performance. Create and run functional and directed/random test scenarios to ensure comprehensive design coverage. Perform detailed coverage analysis and implement strategies to achieve full functional and code coverage. Collaborate closely with cross-functional R&D teams across multiple global locations throughout the product lifecycle. Provide lab support during board bring-up and assist in root cause analysis to ensure first-time-right product quality. Independently manage verification projects with a proactive and solution-driven approach to meet quality and timeline goals.

NVIDIA needs a Senior Custom SOC/IP Verification Engineer for next-gen solutions. Seeking hard-working individuals to build life-changing custom SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What youll be doing: Lead ASIC design verification for various processing blocks in a SOC, including planning, execution, Coverage and methodology development. Collaborate with multiple teams (Architecture, SW/FW, Design, Modeling, Emulation, Post-Silicon Validation) to ensure comprehensive verification plans. Support engineering teams in delivering solutions for purpose-built ASICs and collaborate with IP development teams for IP identification, selection, and licensing. Analyze SOC and IP architecture, develop verification plans, and establish performance metrics. Work with partners in a co-development environment during development, debug, and bringup. Plan tests, achieve coverage closure, and enable customer TB infrastructure. Validate use cases for power-on and boot requirements. What We Need To See: Proficient in design verification tools like Synopsys VCS, Cadence Xcelium Simulator, Verdi, JasperGold, and VC Formal. Consistent track record of first-pass success in ASIC Development. Holds a B. S. or M. S. degree in Computer Engineering or Electrical Engineering, with 7+ years of experience in ASIC, IP, or SoC design verification. Skilled in handling mixed language UVM and C++ testbenches, interpreting functional specs, and building comprehensive test plans. Experienced in developing tools and infrastructure using Perl or Python, with a strong background in AMBA protocols (AXI, ACE, CHI, ATB). Hands-on experience with subsystems in new technologies like ARM CPU, LPDDR, HBM, GPUs, DLA, PCIe, and Network on chip, including performance verification. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. #LI-Hybrid

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life s work , to amplify human creativity and intelligence. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! We are now looking for passionate, highly motivated and creative individuals to be part of our automotive verification team. As a verification owner, you will work on projects that will define the next generation of automotive chips and systems. You will get firsthand exposure to high performance CPU and Memory sub-systems, NOC based Interconnect Fabric, High speed IOs and many other leading technologies deployed in our Tegra chips. What you will be doing: You will be responsible for creation of "state of the art" UVM based verification test benches and methodologies to verify complex IPs and Sub-systems. You will also get to work on System level verification using C/C++. During the course of a project you would end up driving the following aspects of verification for your unit: Architect the testbenches and craft verification environment using UVM methodology Define test plans, tests and verification infrastructure for modules, clusters and system Build efficient and reusable bus functional models, monitors, checkers and scoreboards Implement functional coverage and own verification closure Work with architects, designers, FPGA and post-silicon teams to ensure that your unit is robust What we need to see: You should be BTech/MTech with 5+ years of experience in verification closure of complex Unit, Sub-system or SOC level verification. If you have experience in at least a few of the following domains, we will have an excellent match for our needs: CPU verification, Memory controller verification, Interconnect verification High Speed IO verification (UFS/PCIE/XUSB) 10G/1G Ethernet MAC and Switch Bus protocols (AXI/APB) System functions like Safety, Security, Virtualization and sensor processing Experience in the latest verification methodologies like UVM/VMM Exposure to industry standard verification tools for simulation and debug is a requirement Exposure to Formal verification would be excellent Good debugging and analytical skills. Good interpersonal skills, ability to work as an excellent teammate with e xcellent communication skills to collaborate with cross-cultural teams and work in a matrix organization With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If youre creative and independent, with a genuine real passion for technology, we want to hear from you. #LI-Hybrid

. Our team in Juniper is responsible for driving technology leadership in the Juniper routing, access, and aggregation router developments for next-generation Metro and 5G networks, deployed in some of the world s largest service providers, data centers, enterprise, and metro ethernet networks. We are driving Juniper s growth in revenue and market share in service provider, data center, enterprise, access, and aggregation space, by delivering market-leading products with continuous innovation and relentless execution. These products (either modular or chassis-based) are based on either Juniper homegrown switching ASIC or based on merchant silicon. Who are we looking for? Upbeat and hardworking engineers with a can-do demeanor to become part of Junipers success story. Responsibilities You will be part of this platform team, responsible for developing platform software in the areas of: Board bring-up related experience. 10G, 40G, 100G, 400G, 800G interface related platform software like interface drivers, etc. Platform infrastructure-related software like Routing Engine Redundancy/High Availability, Chassis/line card, fabric, Optics, etc. Timing software in PTP, SYNCE & Grand Master You will be responsible for these product developments in the platform area in either JunOS or Junos evolved software architecture. In addition to the development activity, you are required to work closely with system and solution test teams to ensure products/solutions delivered are of the highest quality. You will be required to work closely with Juniper Technical Assistance Team for providing engineering assistance in supporting critical customer escalations for customer deployments. Requirements BTech / MTech in CS/CE or related field with proven experience. Good understanding of hardware-level details for Optics, PCIe, SPI, I2C, Retimers, FPGA, CPLD, MDIO, Flash Driver Proficiency with device drivers, system bring-up, FreeBSD/Linux internals. Understanding of Ethernet, OTN, SONET, etc. technologies. Strong technical, analytical, and problem-solving skills. Strong in C, C++ programming, OO analysis & design, data structures, and system debugging skills. Prior software development experience on networking products.

Roles and Responsibility Network Developer - Bangalore Hands on experience on End-to-End Software project development in a network company environment will be added plus. Experienced in Linux kernel and hardware device drivers and modules. Solid experience in debugging platform issue with i2c, i2c trace analyzers , PCIe Solid experience with hardware and software debuggers, e.g Arium , BDI, GDB Basic knowledge of PPC, ARM and X86 assembly code. Knowledge of scripting (Shell Scripts and Python) to be able to design, create and run scripts for longevity tests for platform. Knowledge of or demonstrated experience with LAN/WAN communication interfaces, Ethernet layer 2, layer 3 technologies. Strong C programming skills and familiarity with large software development projects in an UNIX or IOS environment including experience with source code control systems, i.e. ability to search, navigate and handle extremely large code base. Motivated self-starter with good communication and organizational skills, with demonstrated ability to develop and deliver superior products in a cross-functional team environment under aggressive schedules. Some of the key areas of expertise in addition to Networking domain is platform/System Areas such as kernel bring up, kernel driver development, platform bring up/ management software and Cloud Networking Technologies.

MTS SILICON DESIGN ENGINEER THE ROLE: The verification team at AMD is looking for a Member of Technical Staff to lead and contribute on the verification of Network on Chip IPs and Subsystems. The individual will help architect, develop and use simulation and/or formal based verification environments, at block and subystem level, to prove the functional correctness of Network-On-Chip (NOC) IPs, subsystems and SOC designs. THE PERSON: You have a passion for modern, complex digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Lead and Plan verification of complex digital design blocks by fully understanding the architecture and design specifications Interact with architects and design engineers to create a comprehensive verification testplan Design and architect testbenches in System Verilog and UVM to complete verification of the design in an efficient manner Create and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools Debug tests with design engineers to deliver functionally correct design blocks Identify and write coverage measures for stimulus quality improvements Perform coverage analysis to identify verification holes and achieve closure on coverage metrics PREFERRED EXPERIENCE: Experienced with development of UVM, OVM, VMM and/or System Verilog, Verilog test benches and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test block level/full chip SOCs and FPGAs. Strong understanding of state of the art of verification techniques, including assertion and coverage-driven verification. Strong understanding of different phases of ASIC and/or full custom chip development is required. Experience in block level NOC (Net work on Chip) verification is a plus. Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high performance FPGAs, SOCs and/or VLSI designs is a plus. Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus. Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management is a plus. Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (VC-Formal, Magellan) is a plus. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering