Greetings from Dexcel Designs! Inviting applications for the Hardware Engineer Board Design / Circuit Design position Job Summary We are looking for a Hardware Design Engineer with 3-8 years of experience in designing embedded systems and high-performance electronics for defence, aerospace, and industrial applications . The role involves circuit design, PCB development, and system integration for platforms such as RFSoC, Agilex, Intel, TI, and AD processors/SOCs while working with industry-standard VPX, 3U, 6U, or custom form factors . Key Responsibilities Design and develop digital, analog, and power supply circuits for embedded systems. Work with high-speed and parallel interfaces including PCIe, JESD204B, Ethernet (1G/10G), USB, DDR3/DDR4, SPI, and I2C . Implement serial and parallel interfaces such as LVDS, SRIO, MIPI, and SATA/NVMe storage solutions . Develop schematics and PCB layouts , ensuring signal integrity, power integrity, and thermal efficiency . Design hardware using VPX, 3U, 6U, and custom form factors . Perform board bring-up, validation, and debugging using lab tools like oscilloscopes and logic analyzers. Ensure compliance with EMI/EMC standards, MIL-spec requirements, and ruggedized hardware designs . Collaborate with cross-functional teams including FPGA, Embedded Software, and System Engineers for seamless integration. Required Skills Strong understanding of PCB layout, power distribution, and high-speed signal design . Hands-on experience with schematic capture and PCB design tools (Allegro, Altium, or similar) . Knowledge of real-time embedded architectures and processor-based system design. Experience with board-level debugging, hardware validation, and compliance testing . Preferred Skills Experience with FPGA-based designs (Xilinx, Intel, Lattice) . Exposure to AI/ML accelerators, high-speed data converters, and RF front-end systems . Understanding of thermal management and ruggedized hardware design

About Marvell . Your Team, Your Impact Marvells Custom compute silicon engineering group is a leading provider of innovative storage technologies, including ultra fast read channels, high performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD), solid state drive (SSD) and accelerators electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems. What You Can Expect Design and execute post silicon validation tests for SSD Chipsets, during R&D processes. Develop, port and execute bare metal SW to validate Storage SoCs. Job will involve Pre and Post Si testing of the bare metal functionality of the Storage SoC, including performance, and power The candidate will also review and prepare test plans and test results documentation. Develop testing and benchmarking applications. Analyze the test results and generate professional validation reports. Provide technical support to Field Application Engineers who support customers. Provide technical support to Test Engineers who design tests for mass production. What Were Looking For Bachelor s or Master s degree in Electrical , Electronics or Computer Engineering, or a related field with 7+ years of experience. We are looking for hardware validation/applications engineer with experience in Solid States Drive. The candidate should have prior experience interacting with customers. Proficient in C/C++ , Arm Assembly , 64 bit Arm CPU architecture. Experience in Firmware Development under Bare Metal/Linux Environment and Debugging on SoCs for embedded Applications Understanding of SSD controller is preferred Experience in interfaces like NAND/PCIe/NVMe/DDR is a plus Good communication skills in English, written and spoken. Candidate should be flexible, proactive and have the ability to work in a team Should be able to work on a given task independently. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

About Marvell . Your Team, Your Impact Marvell is rapidly growing its compute business with innovative new controllers, adapters, accelerators, software development kits and full turnkey firmware offerings. We are an ambitious team within a multi-site, multi-cultural company. Marvell develops challenging products and a unique high tech environment that encourages continued learning and growth. As part of this growth, we are expanding our FW development teams in Pune. What You Can Expect As a senior member of the development team, you will collaborate with various teams, including SoC Design, SoC Validation, SQA, Field Application Engineers, and customers. Your responsibilities will encompass firmware design, implementation, qualification, and customer support, contributing as part of a global firmware team. Based in Pune, you will work closely with teams across different locations worldwide. What Were Looking For Education: BTech/MTech in Engineering with 8 to 16 years of relevant experience Technical Expertise: Strong background in software/firmware engineering. Experience in developing storage products. Hands-on experience with firmware development in an SoC environment. Proficiency in C programming and embedded firmware tools/techniques. Familiarity with C++ and Python is a plus. Key Skills & Competencies: Ability to work in a dynamic, fast-paced environment. Capability to technically lead the development of independent modules in a large firmware stack. Strong communication skills in English. Preferred Experience: Secure boot and related security firmware protocols. Firmware development for PCIe HBA products. Working with NVMe, PCIe, Security, and TCG/Opal. Agile development methodologies. Knowledge of processor architectures, such as ARM. Designing and supporting firmware for mass production. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-RS1

About The Role : Linux Kernel and Device Drivers, 6 to 10 years of hands on experience Role and Responsibilities 1. Responsible for the Linux Kernel and platform software, BSPs, Drivers (Yocto, Ubuntu, RedHat, CentOS), hypervisors, Boot Loaders, Diagnostics deliverable to the customer 2. Responsible for key Linux domains:Networking, GPU/Graphics, Multimedia. Experience and Skills 1. Should have prior experience in leading a team for Linux or Board Support Package delivery for ARM-Cortex or Intel x86 based SoC architectures and evaluation boards 2. Expert in ARM Cortex architecture or Intel x86 architecture based SoC architectures with a proven experience in Uboot based bootloader and Linux kernel and device drivers development and integration 3. Should have proven experience in technically leading mid-size team of 10-15 members 4. Should have experience in leading multi-disciplinary teams working on bootloaders, kernel development, device drivers integration, validation and verification and Linux OS bring-up 5. Prior hands-on experience in developing complex device drivers like PCIe Gen 4/5, USB 2.0, USB 3.0, Ethernet, SD and eMMC is an added advantage 6. Prior hands-on experience in kernel and device drivers debugging using gcc and gdb toolchain is preferred 8. Familiarity with GIT version control tool for software versioning and release packaging is required Do - Strategy Development and Deployment - Support development of overall practice charter for the organization - Achieve talent capability improvements by creating and deploying annual plan based on business strategy, requirement analysis and emerging business realities - Determine optimal structure and roles in the team for increased efficiency and effectiveness - Program / Intervention Design and Development - Address specific practice related challenges by working with business leaders to understand the problem, designing and deploying specific programs, processes or interventions. - Drive contextualization as per unit requirements, in programs deployed - Direct future capability building within the practice by developing new programs in consultation with business leaders, academia and external parties - Increase effectiveness of existing programs, policies or processes by commissioning and overseeing program redesign and refresh - Enhance the team design and delivery capabilities by devising and implementing frameworks for program effectiveness measurement - Team Management and Development - Provide overall direction and guidance to the team for program design and delivery - Complete all people processes for the team such as performance Nxt, WLQ etc. as applicable - Build team capability by reviewing team performance and recommending learning / development intervention in consultation with the concerned teams - Support & motivate the team by - - Coaching team members to build expertise and skill within the function - Driving focus in the team by aligning them with annual plans and performance goals - Encouraging team to undertake self-development and capability building.

Design Verification Engineer In-House ODC Project We are looking for an experienced Design Verification Engineer to be part of our in-house ODC project . The ideal candidate will be an individual contributor with expertise in SoC, Subsystem, or IP verification using high-speed serial protocols and advanced protocols . The candidate should have a strong command of SystemVerilog (SV) and UVM , including writing test cases, sequences, OOPs concepts, and UPF implementation . The role requires hands-on experience in scratch-level work , ensuring verification coverage from the ground up. Experience: 4 to 20+ years Location: Bangalore, Chennai, Pune Notice Period: Immediate to 30 days If you're ready to take on challenging verification tasks and contribute to cutting-edge projects, apply now!

Technical Expertise - Solid understanding of computer architecture and digital systems RTL code for IP, sub-systems, and SoCs. - Proficiency in hardware description languages (HDLs) such as Verilog or system Verilog -Experience in building emulation model builds from scratch for SoC components - Familiarity with emulation platforms and tools (e.g., Cadence Palladium, Mentor Graphics, Synopsys ZeBu). including model compilation, test execution, and debugging - Knowledge of FPGA (Field-Programmable Gate Array) technology, including synthesis, implementation, and debugging. - Experience in setting up and configuring emulation environments. - Ability to manage emulation servers, clusters, and resources effectively. - Knowledge of software tools used in conjunction with emulation (debuggers, performance analyzers, test automation frameworks). - Ability to develop and execute verification plans specific to emulation environments - Protocol knowledge of peripherals: Proficient in Arm CPU cores and PCIe Gen4/5, JTAG, SPI, UART, I2C, USB2.0, USB3.0, Display Port, HDMI, Ethernet 1G/2,5G/5G/10G - Experience in XTOR Integration and a hands on experience on Speedbridges and Vrtual Bridges is a plus. Scripting and Automation - Proficiency in scripting languages Unix, Python, Perl, Tcl for automation of emulation tasks, test case generation, and results analysis. - Experience in developing automated flows for regression testing and continuous integration (CI) pipelines.

Experience: - 5 to 12 years experience in hands on firmware development. - Strong with C language programming - Good understanding and experience with BIOS, power management and PCIe - Strong knowledge of UEFI BIOS, ACPI. AGESA knowledge is a big plus - Strong knowledge of platform BIOS development - Good knowledge SoC power management CPU/Device power states, hot-plug etc - Firmware development & release process understanding - Prior experience working with firmware design & development - OS/ Drivers/Software stack understanding is a plus - Excellent communication and articulation skills Academic credentials: - Bachelors degree in computer science engineering from reputed college - Masters degree from reputed university is a big plus.

Good experience and knowledge of Windows and Linux internals. Good experience and knowledge of Windows and Linux device drivers. Extensive and real-time experience with protocols such as USB, I2C, PCI, and PCIe. Proficient in testing and debugging firmware, BIOS, and BIOS stitching using various tools (Intel tool knowledge preferred). Strong experience and knowledge of low-power, high-power, and server system boot processes. Knowledge of SOC/CPU and PCH. Proficient in system log and driver log capture and analysis. Domain knowledge: Power Management, Graphics, SR-IOV, Camera/IPU, Audio, Firmware/BIOS, Debug and Trace, DPMO, and Stress and Stability. Proficient in debugging tools such as Trace32, PythonSV, ITP, Lauterbach, XDP, and DCI for system/SOC debugging. Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications. 1. Applies scientific methods to analyse and solve software engineering problems. 2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance. 3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers. 4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities. 5. The software engineer collaborates and acts as team player with other software engineers and stakeholders. Job Description - Grade Specific Is fully competent in it's own area and has a deep understanding of related programming concepts software design and software development principles. Works autonomously with minimal supervision. Able to act as a key contributor in a complex environment, lead the activities of a team for software design and software development. Acts proactively to understand internal/external client needs and offers advice even when not asked. Able to assess and adapt to project issues, formulate innovative solutions, work under pressure and drive team to succeed against its technical and commercial goals. Aware of profitability needs and may manage costs for specific project/work area. Explains difficult concepts to a variety of audiences to ensure meaning is understood. Motivates other team members and creates informal networks with key contacts outside own area. Skills (competencies) Verbal Communication

There is energy here energy you can feel crackling at any of our international locations. It s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on RD, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for.Responsibilities Skills Lattice Semiconductor is seeking a Principal to join the HW design team focused on IP design and full chip integration. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn, innovate and grow. Role specifics: This is a full-time Principal Engr position located in Pune, India. The role will focus on FPGA projects concentrated in Pune and similar time zones. The qualified candidate will lead the design and development of complex components of FPGA, ensuring they meet performance, power, and area targets The qualified candidate will be expert in driving Subsystem development and ensure design meets high standards of quality and reliability, conduct regular reviews and audits The role requires working closely with architecture team to define micro architect and design spec Serve as a technical expert in SoC design, providing guidance and support to other engineers. The successful candidate will be open and willing to both (a) teach best-known-methods to an existing FPGA team and (b) learn from the team about the complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and a open-minded student. Accountabilities: Serve as a key contributor to FPGA design efforts. Drive logic design of key FPGA system full chip and bring best-in-class methodologies to accelerate design time and improve design quality. Ensuring design quality throughout project development conducting regular reviews and audits Work with cross functional team including program management, package design, pre and post silicon validation to drive the program Develop strong relationships with worldwide teams. Drive continuous improvement initiatives, staying up-to-date with the latest industry trends and technologies Occasional travel as needed. Required Skills: BS/MS/PhD Electronics Engineering, Electrical Engineering, Computer Science or equivalent. 15+ years of experience in driving logic design across a multitude of silicon projects. Expertise in SoC integration, defining micro-architecture and experience of selecting 3rd party IP. Expertise in working with ARM processor, AXI, AMBA bus, ENET, PCIE, USB, safety and/or security protocols, debug architecture. Experience in leading the project through out design cycle and working with cross organization Familiarity with FPGA designs, use-cases, and design considerations is a plus. Proven ability to work with multiple groups across different sites and time zones. Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA , CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com . You can also follow us via Twitter , Facebook , or RSS . At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates. Lattice Feel the energy.

Design and develop cycle approximate/Loosly timed C++/SystemC models for Cadence s IPs like PCIe controller, etc for use in early SW development ,architectural exploration and performance analysis at different levels subsystem and SoC level. Design and develop protocol specific functional models for various Cadence s interface IPs like PCIe , UCIe , CXL , USB , Ethernet , UFS , DP , etc Interact with IP designers and architects to understand various IP design/implementation specification and behavior Participate in defining traffic patterns, tools and methodology based on the model to help identify functional issues and performance bottlenecks Documentation of design specifications, implementation details, FAQ s, application notes, etc For additional details and the most recent updates, hit Apply for job About Navigation Copyright 2013 2025 SMG | | Manage consent

Experience band:- 5 to 8 years. PCIe Protocol Expertise. Gen-6 Experience with PCIe gen 5 or 6 hardware and/or device drivers for Linux Very Strong C/C++ development skills in Linux and embedded environments Linux Kernel Development: Proficiency in Linux kernel internals, including writing and debugging kernel modules and drivers, especially for PCIe devices. Knowledge of PCIe bus link aggregation Experience with ARM and x86 processors in embedded Linux system design and development, including firmware development for PCIe devices.

UST Designation: Lead I - Semiconductor Product Validation Requirement name: Cluster Validation Engineer Role Proficiency: Independently handle test deliverables and deadline management coordinate with and build the team for a given project Outcomes: Work with customer to ensure there are no escalations Coordinate with the team effectively Conduct technical interview for the project requirements Perform validation and root cause analysis Perform escape analysis Isolate/ packetize the failures to correct component Attend customer meeting and communicate effectively on the requirements/ results. Locate the product failures and report it in test repository and bug tracker Learn technology business domain system domain individually and as recommended by the project/account Complete the certifications for the role (like ISTQB UST GAMMA certifications) Ensure the product and validation complies with the defined SLA Measures of Outcomes: Perform defect triaging Adherence to schedule and timelines Number of post delivery defects Number of non-compliance issues SLA turnaround of production bugs Define productivity standards for project Completion of all mandatory training requirements Outputs Expected: Manage Project: Manage task deliverables with quality and targeting completion timeframe. Estimate: Estimate time effort and resource dependence for ones own work and for others work. Document: Create component level / product behaviour documents Create test reporting templates BKMs and knowledge sharing documents for team Status Reporting: Report status of tasks assigned Compliance with validation standards and process Mentoring: Mentor senior validation engineers by providing on job facilitations Host classroom training sessions for the junior validation engineers Skill Examples: Good presentation skills and diplomacy Should possess good bug advocacy skills Automation scripting skills Able to perform severity and priority identification of sightings raised Ability to estimate effort time required for own work and for the junior engineers Ability to perform and evaluate test in the customer or target environment Work in a team environment Good written and verbal communication abilities Good analytical skills Knowledge Examples: Able to understand the product lifecycle and deadline Should possess excellent domain knowledge Good CPU/ GPU architecture knowledge Possess very good knowledge of the product Additional Comments: Client job title: Firmware Validation Engineer UST Job Title: Lead I - Semiconductor Product Validation Who we are: At UST, we help the world s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in over 25 countries, we build for boundless impact touching billions of lives in the process. Visit us at UST.com. The Opportunity: UST is looking for 1 Semiconductor Product Validation Engineer. Key Roles Responsibilities: We are looking for a highly motivated Senior Software Engineer with experience in System on Chip Architecture (SoC), Bring up of SoC, root causing issues at the intersection of multiple subsystems across firmware and hardware. Responsibilities: Owns SOC and Platform FW Integration, validation (including validation environment), and debugging of different domains within server architecture (such as SoC FWs, BIOS, BMC etc.) Ability to see system level big picture to validate that the integrated firmware/system software aligns to architectural goals of product to meet the defined use cases and KPIs (thermal, power, stability and performance). Collaborate with system and FW architects to gather the requirements, translate to validation plans, develop test content, automate executions, and debug/triage of observed/reported failures. Excellent debugging and troubleshooting skills with the aim to become point-of-contact for platform level issues. Ensure systematic closure of issues for subsequent releases. Work with architect, firmware, program management and component dev teams for day-to-days operations as well as for long-term roadmap improvements by feeding back key learnings Passionate about exploring and deploying noble methods to improve test coverage, release/test automation, and efficiency of our FW releases. Create automated dashboards to always reflect health and quality of system for decision making. Required Skills: Demonstrated experience in system level Integration, validation (including validation infrastructure setup), automation framework (such as Robot Framework), and debugging of system software. Experience in validation / development in server space is big plus. Experience of creating validation test plans, developing test content to achieve the validation plan, and automating the execution of test contents. Experience of creating or working with automated testing pipeline aka CI/CD (integration + validation) Firmware development and testing on multiple HW test environments (FPGA, Emulation, Simulation etc.) Have deep experience of system level debugging (including customer issues) with good understanding of managing and triaging production level issues. Good knowledge of hardware debuggers like JTAG, Oscilloscope, and Logic Analyzer etc. Knowledge of automation framework setup and deployment. Excellent communication and inter-team collaboration skills Debug experience resulting in solving complex Hardware/Firmware interface issues. Qualification: Bachelor s or higher in Computer Science, Computer Engineering, Electronics Engineering, or similar. 8+ years of professional experience in testcase design/development, test automation, integration, validation, or system level debugging in embedded systems Strong problem solving, debugging, and troubleshooting skills. Hands on experience in programing in Python or C or C++ Experience with Platform initialization, Board support package (UEFI/U-Boot), integration, low level drivers for peripherals such as PCIe, I2C, eMMC, SPI, USB, UARTs as well as Memory Management, Scheduling, Interrupts, and multi-threading. What we believe: We re proud to embrace the same values that have shaped UST since the beginning. Since day one, we ve been building enduring relationships and a culture of integrity. And today, its those same values that are inspiring us to encourage innovation from everyone to champion diversity and inclusion and to place people at the centre of everything we do. Humility: We will listen, learn, be empathetic and help selflessly in our interactions with everyone. Humanity: Through business, we will better the lives of those less fortunate than ourselves. Integrity: We honour our commitments and act with responsibility in all our relationships. Equal Employment Opportunity Statement UST is an Equal Opportunity Employer. We believe that no one should be discriminated against because of their differences, such as age, disability, ethnicity, gender, gender identity and expression, religion, or sexual orientation. All employment decisions shall be made without regard to age, race, creed, colour, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by f

As an FPGA & Board Design Engineer, you must develop new hardware designs, including system design, CPLD/ FPGA or processor design, and board-level analog/ digital circuit design for embedded systems/ boards. You have to develop detailed specifications based on requirements and implement Hardware designs in accordance with those defined requirements and/or specifications. Your duties include Schematic design generation and entry, netlist generation, and close interaction with the CAD team for layout review and feedback. Perform simulation activities including timing analysis, behavioural, and functional simulations. Develop test benches and other test tools as needed to complete the verification of FPGA designs. Carry out proto H/W bring-up with support from firmware engineers. REQUIREMENTS B.Tech. or M.Tech. EE with 2+ years of FPGA experience including implementation, synthesis, and timing closure. Proficiency in Verilog, VHDL and System Verilog. Proficiency in Synopsys Synplify, Xilinx Vivado, ISE Hands-on with FPGA debug methodologies, such as ChipScope. Proficient in Schematic capture tools like Orcad/Altium Hands-on experience with lab debug equipment such as oscilloscopes and logic analyzers. Strong scripting skills in Perl/Python. Experience in test bench design and implementation Knowledge of high-speed interfaces including PCIe, Ethernet, and DDR3/4. Knowledge of low-speed interfaces including SPI, IIC, and UART. Knowledge and experience designing with Altera and Xilinx FPGAs. Detail-oriented individual with good interpersonal skills and excellent written and verbal communications skills.

We are seeking a talented and experienced Software Engineer to join our dynamic team. In this role, you will contribute to the design, development, and optimization of carrier-class networking and system software. As a key member of our engineering group, you'll work on cutting-edge technologies, collaborate with cross-functional teams, and drive impactful solutions. Responsibilities Collaborate with product managers, architects, and other engineers to define software requirements and specifications. Design, implement, and maintain networking and system software components using C and C++ programming languages. Conduct object-oriented analysis and design to ensure robust and scalable solutions. Debug complex system-level issues, leveraging your deep understanding of fundamental OS concepts (especially in Linux or similar operating systems). Participate in hardware and system-level design discussions, ensuring carrier-class software development. Work with Linux device drivers, system bring-up, and the Linux kernel. Navigate large codebases effectively, drawing from prior experience. Apply strong technical, analytical, and problem-solving skills to enhance software performance and resilience. Utilize scripting technologies and modern DevOps practices. Collaborate with cross-functional teams, including networking, embedded platform software, and hardware experts. Present technical topics articulately and confidently. Articulate design, lead development and see through the deployment of switching software for datacenter switching products. Work with product management and cross functional teams and develop detailed architectural, functional and design specifications to meet product requirements. Carry out detailed design, coding, unit and functional testing of software, fix complex defects, through entire lifecycle of the project. Lead development activity within the team, working with managers for detailed planning of tasks, setting intermediate milestones, strategizing execution. Mentor and guide junior engineers in the team for technical problem solving, and building long term expertise and competency. Work with cross functional validation and verification teams to ensure correct and complete verification of software and components, to meet real-life network deployments. Work closely with Juniper technical assistance team, for providing engineering assistance in supporting critical customer escalations. Qualifications Bachelor s or master s degree in computer science, electronics, telecommunication engineering, or a related discipline. 14+ years of experience in networking and system software development. Proficiency in C and C++ programming. Familiarity with data structures and system debugging techniques. Expertise in one or more of the following areas: Host Complex, System Peripherals & Drivers: CPU complex (x86); PCIe, SPI, I2C, MDIO; FPGA, CPLD, Flash Drivers Ethernet Interfaces (ranging from 1Gig to 400G+, including 800G, 1.6T), MacSec, Timing, Optics (SFP, QSFP, QDD, OSFP) High-speed packet forwarding with network processors, PHYs, and SerDes Strong communication skills, both written and verbal. Preferred Skills: Understanding of SONiC architecture & hands-on SONiC experience, Experience using SONiC development and integration Experience with software development for the forwarding ASICs, FPGAs, Network Processors etc

As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test benches, test harnesses, while interacting with the extended team. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware and Software Engineering, to create a multi-model SoC that enables development of world-class hardware devices. Basic qualifications Bachelor s/ Master s degree or higher in EEE/ECE 12+ years or more of practical semiconductor design verification including System Verilog, UVM, GLS, assertions and coverage driven verification. Experience using multiple verification platforms: UVM test bench, emulator, software environments Experience with industry standard IO interfaces like AMBA, CXL, USB, MIPI, PCIE, DDR etc Experience with ARM/RISCV Experience defining verification methodologies Experience with test plan development, test bench infrastructure, developing tests and verifying the design Experience with writing directed/constrained-random tests Experience identifying bugs in architecture, functionality, and performance with strong overall debug skills Experience verifying at multiple levels of logic from SoCs to full system testing Experience with industry standard tools and scripting languages (Python) for automation Experience in SOC Architecture is a strong plus Experience with debugging system level issues Experience with industry standard IO interfaces like AMBA, USB, MIPI, PCIE etc Experience with formal verification techniques Excellent verbal and written communication skills

Thanks for visiting our Career Page. We develop groundbreaking hardware, software, and system technologies that solve the critical bottlenecks in next-generation computing workloads - at any scale - across hyperscale cloud, edge, enterprise, 5G/6G, and automotive infrastructure. Please review our open positions and apply to the positions that match your qualifications. Rust Firmware Engineer (India) Hyderabad, India Full Time Experienced SUMMARY We are looking for an experienced Rust Software Engineer with a strong background in low-level firmware development, Linux systems, and board support to join our team. In this role, you will be responsible for designing, developing, and maintaining firmware for in-house developed PCBs, working closely with our hardware engineers to ensure seamless integration and performance. Key Responsibilities Design, implement, and maintain low-level firmware for custom PCBs using Rust. Develop and optimize drivers for various hardware components including CPLDs, Ethernet OSFPs, PCIe CEM by means of I2C and SPI interfaces. Collaborate with hardware engineers to understand board specifications and requirements. Work with Linux systems, and develop kernel drivers, to ensure proper integration and support for firmware components. Debug and troubleshoot hardware and software issues, providing effective solutions. Write and maintain comprehensive documentation for firmware and board support. Participate in code reviews and contribute to best practices in firmware development. Qualifications Bachelor s degree in Computer Science, Electrical Engineering, or a related field (or equivalent experience). Proven experience with Rust programming, particularly in low-level systems or embedded development. Strong understanding of Linux operating systems and their interaction with firmware. Experience developing and optimizing drivers for hardware components such as CPLDs, Ethernet OSFPs, PCIe CEM. Proficiency in debugging tools and techniques for both software and hardware issues. Excellent problem-solving skills and attention to detail. Strong communication skills and ability to work collaboratively in a team environment. Preferred Qualifications Experience with other systems programming languages (e.g., C, C++). Familiarity with embedded systems and microcontroller architectures. Experience with embedded or real-time operating systems (RTOS). Experience with Hubris is a plus, but not required. Experience with other embedded or similar systems is valued. Knowledge of version control systems (e.g., Git). Experience with Bazel build tooling is a plus. ABOUT US Enfabrica is on a mission to revolutionize AI compute systems and infrastructure at scale through the development of superior-scaling networking silicon and software which we call the Accelerated Compute Fabric. Founded and led by an executive team assembled from first-class semiconductor and distributed systems/software companies throughout the industry, Enfabrica sets themselves apart from other startups with a very strong engineering pedigree, a proven track record of delivering, deploying and scaling products in data center production environments, and significant investor support for our ambitious journey! Together, with their differentiated approach to solving the I/O bottlenecks in distributed AI and accelerated compute clusters, Enfabrica is unleashing the revolution in next-gen computing fabrics. Share Apply for this position Required * Apply with First Name * Last Name * Email Address * Phone * Address Resume * Weve received your resume. Click to update it. or Attach resume as .pdf, .doc, .docx, .odt, .txt, or .rtf (limit 5MB) or Paste your resume here or Please indicate which of the following skills and experiences you are proficient with * Writing and optimizing drivers for hardware components (e.g., CPLDs, I2C, SPI). Writing low-level firmware in Rust for embedded systems. Using Rust s ownership model and lifetime annotations effectively. Implementing and working with Rust s async/await for asynchronous programming. Using Rusts trait system and generics for efficient and reusable code. Writing unit tests and integration tests using Rust s built-in testing framework. Utilizing Rust s concurrency features, such as threads and async tasks. Debugging and troubleshooting Rust code in embedded environments. Using Bazel for build automation and dependency management in Rust projects. Managing Rust dependencies and builds using crates_universe. Writing and maintaining Rust code for real-time operating systems (RTOS). Interfacing Rust code with C/C++ through FFI (Foreign Function Interface). Employing debugging tools like GDB and openocd for embedded systems. Creating and managing build scripts for embedded projects. Writing and optimizing low-level code for performance and memory constraints. Using Rust s memory safety features to prevent common vulnerabilities and bugs. Documenting firmware and board support using Rust s documentation tools (e.g., rustdoc). Working with version control systems, particularly Git. Level of experience with rust *

Hardware Engineer Testing Please work on the below requirement Qualification : BE ( ECE / equivalent) Exp level : 3 to 5 yrs Notice period: 30 days Location : Cisco BLR ( Onsite only, no WFH) Budget: Upto 15 LPA Highlighted color is mandatory skill Interview mode: F2F Knowledge of System bring up based on embedded processor and Network ASICs Knowledge on Scripting and Test Log analysis Test plan preparation for system testing, and test log review Good experience in Board Bring-up, Hardware and System level debugging Good understanding of interfaces like DDR-2/3/4, PCIe, SerDes protocols Good experience on management interface like SPI, I2C Proven experience on preparation of Functional Specifications, Production Definition and taking ownership on Documentation Hands on with the usage of design tools from Mentor Graphics and Cadence Hands on with the usage of Digital Oscilloscope, Multimeters, test and measuring equipment Skills Hands on experience on lab test equipments, MSO, DSA, spectrum analyzer, counters, signal generators, AC/DC source, E-Loads, Surge generator Hands-on experience on network protocol testers Hands-on knowledge on Freescale code warrior, Xilinx tools Hands-on experience on eMMC/SATA, I2C SPI bus, PCIe analyzers P2020, TMS320DM642 DSP, Zilog controller, PIC controllers, Network processors, 8051, 89C58, Xilinx, Altera, Atmel FPGA, CPLD, EPLD based designs. CPCI, Mini PCI, PCIe, USB, Ethernet, MIL1553B, JTAG,I2C, I2S, SPI, RS232, RS422 Video and Audio interfaces, DAC, ADC, LCD SRAM, NAND, NOR Flash, DDR3 SDRAM, SD card Memory interfaces Stepper motor drive circuits, Relay control, Sensor Interface circuits, Keypad Interfaces Experience in EDA tools ORCAD Capture, Allegro, PADS PCB Design of Automated test equipment, Board test adapters. Overview Offered Salary 15LPA Experience 3-5 YEARS Qualification BE(ECE/Equivalent)

As an integral member of this team, you will work with a team of seasoned engineers. You will have the opportunity to architect, design, and develop some of the world s most widely deployed Enterprise Switches that are continuously evolving towards enabling the support of newer and exciting customer business paradigms. You will be interacting and working closely with some of the finest talent pool in the industry - where you will find that work is both fun and challenging. Your Impact Looking forward to getting an exciting start to your careerYou will bring your unique talents to the group that works on Ciscos Switching technology, which large enterprises now consider to be the Networking Equipment of choice for mission-critical networks. In your role as a Software Engineer, you will develop and integrate products that are deployed by some of the leading Enterprises in the world. You will work with a BU-wide vibrant technical community, learning from experts and translating this learning into exciting opportunities for personal growth. You will work on networking equipment that forms a crucial backbone of many offices, hospitals, educational and financial institutions. You will learn about cutting-edge technologies and platforms while developing software for these equipment. Experience the exhilaration of taking a product through development and integration. Minimum Qualifications Good understanding of distributed/centralized hardware architectures of routers/switches. Experience in working with embedded platforms, various operating systems viz Linux, VxWorks , RTOS internals. Have worked on various Device drivers viz PCIE/I2C/eMMC/SDHC/MDIO/USBs and have worked on Storage devices - NAND/NOR with exposure to file system internals. Exposure to system infrastructure - Building and bringing up next generation complex Switches. Experience - 10 to 15 years Bachelors degree in CS/EE/EC or technical equivalent.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 6-9 years of experience in SoC design Educational Requirements:6+ years of experience with a Bachelor"™s/ Master"™s degree in Electrical engineering

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Familiarity with Verilog/Vhdl and General Digital Logic Design concepts Knowledge of system-level architecture including buses like ARM processor bringup, AXI/AHB, bridges, memory controllers such as DDR/Nand. Knowledge of peripheral emulation like PCIE/USB Strong working knowledge of UNIX environment and scripting languages such as Perl or shell Excellent problem solving and debug skills on FPGA platform Working knowledge with FPGA synthesis tools like synplicity or equivalent Working knowledge XILINX Virtex FPGA architecture and experience with ISE tool flow Validation of FPGA builds in Pre-Si environment Post-Si validation experience Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. 12-15 years of experience with a Bachelor's/ Master"™s degree in Electrical/ Electronics engineering

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Verification & Validation team is currently looking for self-motivated engineers who will perform ARM or DSP based SOC Pre-Si and Post Si validation including system level validation and debug. The ideal candidate should leverage his knowledge and experience to provide leadership, technical guidance, and execution of silicon validation of ARM or DSP based multiple SOC projects and platforms Experience in SoC pre/post silicon validation. ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug. Perform system level validation and debug Debug experience with Lauterbach Trace32 environment. Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers. Embedded software development of low level hardware drivers in C language. Working experience related to one or more of the following is required. ARM/DSP Processors/USB/PCIE, Ethernet Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 2-6yrs experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Digital Verification Engineer for IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create job s, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in. Digital Verification Engineer for for Mixed-Signals IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions. IPs include telemetry ADCs, 100W+ charging (Quick Charge 5.0), 5G power (mmW, envelope tracking, high performance low noise oscillators etc") and high efficiency power management (DC-DC charge pumps, bucks and linear regulators). * Work includes partnering with international teams in all stages of development from system definition to high-volume (100M+) OEM launches. * Digital Verification aspects include all stages of the verification process from test planning, UVM-compliant test-bench architecture, constrained-random stimulus creation, score-boarding and coverage closure. * Work includes verification of digital and mixed-signals IPs and exposure to analog behavioral models is a plus. * Work includes debugging of complex embedded systems including SOCs, firmware, embedded sequencers. * Position includes IP or chip DV ownership including task planning and project risk mitigation. * Work in a dynamic team environment with aggressive schedule towards metrics-based high quality target. Preferred Qualifications Strong troubleshooting skills across embedded systems disciplines (digital RTL, Firmware, analog behavioral models) Strong communication and organizational skills Strong process-oriented mindset. Expert-level System Verilog Programming Advanced UVM/SV (Universal Verification Methodology using System Verilog) Python or Perl scripting Minimum Qualifications Bachelor's degree in Science, Engineering, or related field. 8+ years ASIC design, verification, or related work experience Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: The role generally entails a mixture of: Ownership of a piece of the test bench Planning & execution of feature additions and mode re-enablement on particular variants Bug fixes Debug of regression signatures Developing/Deploying new tools for performance validation Performance monitor and profiler development and deployment Workload specific simulations on the emulator Following skillset is required: Strong Python, C++ skills Reading Specs and developing test plans Monitors, scoreboards, sequencers, and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening 6 months - 1 Year of industry experiences in the following areas:- Basic of digital design concepts, fifo etc Basic understanding of DDR is a plus Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite Understanding of multi-core ARMv8 CPU architecture, coherency protocols and virtualization Minimum requirement is Bachelor of Engineering however preferred is Masters of Engineering in Computer Science or Computer Engineering Candidate must possess right analytical skills, debug oriented mindset and must be open to discuss , deep dive, collate and present the design and environment understanding . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Serdes PHY Analog Design Job Function BDC SerDes Mixed-Signal design team is actively looking for experienced (4-12+ years) analog circuit designers to work on high speed SerDes PHYs . You will be directly involved in delivering next-generation custom PHY designs for SoCs and will be part of a growing team involved in architecture analysis in leading-nodes - finfets & beyond. Design goals include low-power analog designs to address Qualcomm's low-power wireless products. Responsibilities Hands-on experience - Analog circuit design Experience in designing multiple analog building blocks - LDO, high speed TX and RX (Equalizer, Sampler, PI, Deserializer etc) , Bias, Reference etc. Analog and or Digital PLLs for frequency synthesis and/or SerDes applications" Charge pump, loop filter, VCO/DCO, PFD/TDC, high speed dividers. PLL Loop Dynamics, Jitter sources and modeling (RJ & DJ) Ability to take a design, perform schematic to post layout verification, integration sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Skills & Experience For lead position, candidates must have performed PHY Lead roles which include PHY integration to SOC & interaction with post silicon teams like HSIO, ATE, SVE, CE etc. Understanding of advance Finfet process effects on designs and layout is required. Experience in using SPICE simulators, adexl & virtuoso. Experience with post-Si bring-up and debug is must. Good understanding on peripheral PHYs (USBs, UFS, PCIe) protocols is added advantage. Master/Bachelor in Electronics Shell/Perl-python scripting to automate circuit design and verification work. Able to work with teams across the globe and possess good communication and presentation skills. Preferred Mixed signal design experience Keywords Analog circuit Design, Rx, Tx, PLL, SerDes, PHY, Serializer, Deserializer, VCO, High-speed Trans receiver

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: About The Role :: We seek Engineers with demonstrable software and system knowledge and hands-on experience for camera and its various modules, algorithms. The Camera team creates embedded imaging solutions for Snapdragon chipsets that power advanced mobile devices. Our solutions leverage dedicated hardware, multi-core processors, DSP, and GPU cores to provide state-of-the-art photographs, video recordings, as well as scene data for image understanding and object detection. Candidate will be working on designing, architecture for various modules across camera pipelines and design software for Camera Sensors, Actuators, EEPROM, OIS, FLASH, TOF, IR-LED, GMSL, Aggregated cameras. Candidates should be able understand to interface with Kernel drivers of PMIC, GPIO, clock, I2C, MIPI-CSI2 DPHY+ CPHY, SPI, PCIE Candidate should be able to propose and optimize of software algorithms and propose fix/update to handle complex usecases cases to improve overall performance. Candidate needs to learn quickly new hardware modules interface and create software interface layer for these modules. Candidate should be able to work with software and customer teams to debug issues. Evaluate New Solutions/features and explore the new possibilities to enhance performance. Should be a quick learner, adopt to new technologies and good debugging skills. Should be able to work with geographically spread teams Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Minimum Qualifications: 3-8 years of experience in Embedded system Performance /Camera domain Strong C/C++ programming and debugging. Excellent knowledge of OS fundamentals, data structures and Linux Kernel. Strong analytical and debugging skills on multi-Processor environments. Prior experience Camera Sensors, Actuators, EEPROM, OIS, FLASH, TOF, IR-LED, GMSL, Aggregated cameras. Should have strong hold on with Kernel drivers of PMIC, GPIO, clock, I2C, I3C, MIPI-CSI2 DPHY+ CPHY, SPI, PCIE Should be capable of debugging complex problem in Embedded system Solid knowledge of camera processing pipeline and modules will be a plus Knowledge of embedded systems / Android & Linux will be a plus Proficiency with version control tools & git repository Capable of doing independent work within a fast-paced & collaborative environment. Good knowledge of ARM architecture will be a plus Education Requirements: Required:Bachelor"™s degree of Computer Science/Information Technology/Electrical and/or Electronics Engineering Preferred:Master"™s degree of Computer Science/Information Technology/Electrical and/or Electronics Engineering