665 Pcie Jobs - Page 16

SE NIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: SOC NLP & Power Management): Work on SOC level verification activities, the person will be responsible for bringup of UPF simulation at SOC. Work with testbench team to bringup NLP (UPF) simulation, debug simulation issues. He will be responsible to coordinate with Design team for UPF delivery, work with design (IP, Subsystem, SOC) for quality UPF delivery and resolve issues. He should have good understanding of power architecture and UPF s He will be responsible to create TB collaterals for NLP simulation bringup. THE PERSON: Engineer with strong self-driving ability. Need excellent communication skills (both written and oral) Strong problem-solving skills, go to person for SOC testbench, Power management, UPF, C/C++ Coding, UVM coding, Testcase coding, checkers and assertions. KEY RESPONSIBILITIES: NLP Simulation bringup (Has responsibility of TB, Testcase, coordination between design and dv team) Power verification is key responsibility. Work with power architects to resolve issues seen in simulation. PREFERRED EXPERIENCE: Expertise in IP, Subsystem and SOC Verification with specialization in NLP Simulation. NLP Simulation is must requirement. Strong hands-on experience in different SOC Verification activities, NLP Simulation, Power verification, UVM, System Verilog, X86, C++, HW/SW co-verification, Scripting (phython) Test plan review, Debug/triage, Coverage, Strong Problem Solving, Automation and Debugging Skills, System bus protocol understanding including some of the common IPs like ACE, CHI, AXI, PCIe, DDR, memory controller etc. Comfortable with design/verification tools and flows like VCS, Verdi, SOC Connectivity, SV assertions, HW-SW co-simulations, UPF/CPF flows etc. Strong understanding of System integration, Make file flow, Verification Methodologies, Boot up sequence. JIRA based project management is a plus. ACADEMIC CREDENTIALS: BE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE/CSE 5-8 years of strong DV experience in NLP simulation, IP, Sub System & SOC Verification, Power management verification #LI-SR4 Benefits offered are described: AMD benefits at a glance .

Handson experience of baremetal FW development in Pre Si w/ UVM TB, debugging FW using Verdi/Sim Vision along with RTL,basic signal tracing in Verilog, High-Speed Serial I/F for 2yrs : UCIe, PCIe, CXL, HBM, Qlink (Qualcomm), DigRF (MIPI)

Responsibilities 6 to 12 years of complete hands-on experience in RTL Verification at both SoC/IP level. Should be proficient in building New or maintain existing SV/UVM/C based testbenches. Experienced in SV-UVM/OVM/VMM Methodologies. Specman hands-on can be a plus. Should have handled Complex Blocks/Hard Macro Level Functional Verification at both RTL and Gate Level. Should have experience dealing with Coverage Models and metrics issue and closure based on specification. Able to develop and track Test Plan & Validation Plans based on Specification. Able to setup Regression environments based on Test Plans. Experience in dealing GPIO, Clock Controller, DFTMUX, System controller such as PMU/CMU/TMU and power issues at SoC level will be an advantage. Knowledge on Power-Aware -CPF/UPF Simulation at both RTL and Timing Simulations at Gate Level. Able to Work closely with the Architecture, Design, Synthesis and Physical Design team teams to resolve the RTL/GLS level issues. Should have knowledge on any of the Bus interface - PCIe/USB/I2C/SPI/UART. Should have worked on AMBS protocols. Technologies: 28nm and below. Experience in Tcl/Tk, PERL, Makefile is a definite Plus. Qualifications Education: B.Tech/BE/ME/M.Tech

Job Specs : - Expertise in the x86 BIOS / UEFI FSP / coreboot development - Expertise with x86 CPU/APU architectures and associated compilation tools - Expertise in C programming - Expertise with platform bring-up - Expertise with standard protocols like PCIe, SPI, eSPI, ACPI, SMM - Expertise with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. - Expertise on working with Intel FSP package source code and understanding of coreboot & FSP boot flow - Expertise with different coreboot payloads like edk2, SeaBios, Tianocore etc - Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required - Good coreboot upstreaming exposure - Familiar with coreboot boot stages, upds, memory map, FSP, devicetree concept, payloads to OS bootloader handoff - Understanding of coreboot & FSP build tools and build processes - Good understanding of UEFI framework concepts to port UEFI code to FSP - Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. - Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. - Good understanding of x86-64 architecture from BIOS developer's perspective. - Good understanding of UEFI BIOS Boot flow. - Basic understanding of Linux Kernel like software development concepts (Kconfig).

"> Search Jobs Find Jobs For Where Search Jobs SoC Verification - Senior Staff Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 9953 Remote Eligible No Date Posted 16/06/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and experienced SoC Verification Engineer with a passion for cutting-edge technology and innovation. With a deep understanding of processor-based SoC level verification, you excel in developing test plans, verification infrastructure, and implementing System Design Solutions using Synopsys EDA tools. Your expertise in Verilog, System Verilog, and UVM environments, along with hands-on experience with verification tools such as VCS and waveform analyzers, sets you apart. You thrive in collaborative environments, working alongside architects, designers, and verification teams to deliver high-quality solutions. Your problem-solving, analytical, and debugging skills are exceptional, and you take pride in mentoring and guiding junior engineers. You are adaptable, eager to learn new tools and methodologies, and consistently meet schedules and quality standards. What You ll Be Doing: - Developing and implementing System Design Solutions using Synopsys EDA tools to solve customer problems. - Understanding design specifications and defining verification scopes. - Developing test plans, tests, and verification infrastructure. - Implementing and analyzing System Verilog assertions and coverage (code, toggle, functional). - Collaborating with verification teams to develop and execute verification test cases. - Providing relevant solutions to issues and debugging complex problems. - Mentoring junior engineers and guiding them through verification challenges. - Working with architects, designers, and pre and post-silicon verification teams. - Adhering to quality standards and good test and verification practices. - Ramp-up on new verification tools and methodologies using Synopsys Products. The Impact You Will Have: - Enabling customers to complete their most challenging SoC design projects. - Contributing to the development of high-performance computing, automotive, aerospace & defense SoCs. - Driving innovation and technological advancements in the semiconductor industry. - Ensuring the correctness and quality of complex SoC designs. - Enhancing the verification process through the implementation of advanced methodologies. - Mentoring and developing the next generation of verification engineers. - Collaborating with cross-functional teams to achieve project goals. - Supporting Synopsys leadership in chip design, verification, and IP integration. - Broadening the adoption of Synopsys tools and methodologies. - Delivering innovative solutions that address customer needs. What You ll Need: - B.E/B. Tech/M.E/M. Tech in electronics with 4-8 years of experience in the verification domain. - Strong understanding of processor-based SoC level verification including Verilog, System Verilog, and UVM. - Hands-on experience with verification tools such as VCS and waveform analyzers. - Proficiency in System Verilog and UVM verification environments. - Familiarity with AXI-AMBA protocol variants. - Experience with scripting languages (shell, Makefile, Perl). - Strong understanding of design concepts and ASIC flow. - Proven problem-solving, analytical, and debugging skills. - Prior experience with ARM core verification and protocols like USB, PCIe, MIPI is desirable. Who You Are: - A collaborative team player with excellent communication skills. - A proactive problem solver who can work independently. - A mentor who enjoys guiding and developing junior engineers. - A detail-oriented professional committed to quality and excellence. - An adaptable engineer eager to learn new tools and methodologies. - A strategic thinker capable of setting and meeting task-level goals. - A dedicated individual who consistently meets schedules and deadlines. The Team You ll Be A Part Of: The Systems Solutions Group (SSG) at Synopsys delivers tool, methodology, architecture, design creation, design verification, and physical implementation expertise to enable leading-edge customers to complete their most challenging SoC design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our customers range from start-ups to industry leaders, commercial companies, and government agencies. Our customers develop SoCs for high-performance computing, automotive, aerospace & defense, and more. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: SoC Network on Chip Verification Engineer Location: Bangalore Work Type: Onsite Job Type: Full time Job Description: This role involves developing test plans, writing verification code, debugging issues, and collaborating closely with design teams to validate complex interconnect systems. Key Responsibilities: Lead verification projects for complex SoC and NoC architectures (for senior role). Develop advanced verification methodologies using SystemVerilog/UVM. Guide teams in debugging and resolving intricate design issues. Optimize performance, power, and coverage metrics. Work with high-speed interconnect protocols: AXI, CHI, PCIe, Ethernet, CXL, UCIe. Manage testbench architecture and automation frameworks. Note : profiles with solid experience in SoC + NoC verification and exposure to the above protocols. TekWissen Group is an equal opportunity employer supporting workforce diversity.

We are hiring for Firmware Development Engineers who are passionate about low-level software, hardware interfacing, and embedded system development. The ideal candidate will be responsible for designing, developing, and maintaining robust and efficient firmware solutions for embedded products. Key Responsibilities: Develop and maintain embedded firmware for microcontrollers and SoCs Work on bootloader development, secure boot , and Linux-based firmware Integrate and optimize RTOS-based systems and device drivers Interface with various peripherals and protocols (USB, UART, PCIe, SPI, I2C, Ethernet) Collaborate with hardware teams for board bring-up and validation Debug and troubleshoot firmware issues using hardware tools (JTAG, oscilloscopes, etc.) Maintain documentation and follow best coding practices Work with Linux kernel , BMC , and ARM processor environments Preferred Candidate Profile: Strong experience in C/C++ for embedded firmware development Hands-on with Linux , RTOS , and secure boot environments Proficiency with FPGA interfaces , device driver development , and peripheral protocols Familiarity with Linux kernel development and board support packages (BSPs) Knowledge of BMC (Baseboard Management Controller) and system-level integration is a plus Strong debugging and analytical skills Bachelors or Master’s degree in Electronics, Electrical, Computer Science, or related field

Role : Design Verification Engineer Location: Hitech city ,Hyderabad Qualification: Bachelor's Degree Experience : 2-6 years of professional experience. Work Mode : Work from office, 5 days a week. Job Description Strong Familiarity with System Verilog and OVM/UVM Verification Methodology. Knowledge of system-level architecture including buses like AXI/AHB/APB/ACE5 Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi, Model Sim . Proficiency in developing the TB environment Good Knowledge on writing coverage and assertions Good knowledge in scripting(Perl/Tcl/Python) and automation of verification flows/process Knowledge on the PCIE is required. Knowledge of mipi, video Ips like ISP/Encoder/Decoder would be useful. Functional Skills Ability to work with cross-functional teams

As an SSD Firmware Validation Engineer at Micron Technology, Inc., your responsibilities will include: Define Test Plan/Design, test cases and develop Test Scripts to validate Firmware for Enterprise and Datacenter class NVMe SSD products. As part of Firmware Test Engineering team, you would demonstrate high degree of skills to understand one or more areas of FW: Front End, Back end/Media management, FTL or Security. You would also exhibit high degree of competency in understanding NVMe/PCIe specifications, NVMe Cloud SSD Specifications, along with understanding Customer specific requirements. You will be working in partnership with Firmware development teams through the lifecycle of the product while finding defects and validating the fixes by create grey and Whitebox tests. Be able to demonstrate success in communicating status, issues, concerns, strategies of programs and projects - including development of appropriate indicators. Must be able to deal with ambiguity and operate with little direction to meet defined goals. Must be able to collaborate with others to achieve goals and task completion. Comprehend and articulate validation strategies, plans and status. Review, track and document test results and sightings Drive issues to closure by interfacing/collaborating with other product development teams Experience : Bachelor s or Master s degree in Computer Science or Engineering with 11+ years of experience in SSD Firmware Validation. Expertise in End-to-End Storage Architecture Understanding of Whitebox and grey box test methods for Enterprise / Datacenter SSD Firmware is strong plus. Good hands on experience in debugging NVMe Protocol issues using Lecroy/JDSU analyzers is highly desired. Must have prepared good test plans involving access patterns, NVMe protocols, FW test hooks and VS commands for one or more following areas of FW: Front End, Back End, FTL and Security. Integrate tests into an automated test environment and collaborate with test execution teams to drive validation plans/strategy. Good Knowledge of Linux operating system debugging and Coding in Python. Effective oral and written communication with strong analytical, problem solving, and project management skills Demonstrated ability to work well with others and collaborate effectively in a team environment Expert planning and tracking skills, able to see big picture, well-organized, focused on results, capable of managing multiple projects, excellent time management with respect to priorities and self-management. Must have excellent knowledge of system storage and the relationship to the platform ingredients: CPU, Memory, PCIe, drivers, OS, firmware, etc. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

Job Specs : We are seeking a highly skilled and motivated ASIC SOC & GLS Verification Engineer to join the offshore development teams of our group companies. You will work with the rapidly expanding team which focuses on the research and development of ASIC Verification IPs for Silicon Lifecycle Management, driving innovation and excellence in chip design and verification. You will work alongside a talented and dedicated group of engineers, all committed to pushing the boundaries of technology and delivering top-notch solutions to our customers. Work Location : Remote, Work From Anywhere Work Expertise: 7 Years 10 Years Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering. Expertise in ASIC SOC verification. Expertise in UVM, System Verilog and constrained random testing. Expertise in Gate Level Simulation tools (GLS) or verification related to display port or memory controller Expertise in testbench architecture and SOC-level verification strategies. Knowledge of scripting languages (Python, Perl, TCL) for automation. Good understanding of SoC architecture, including CPU subsystems, memory hierarchy, and peripherals. Preferred immediate hires only Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Job Summary: We are seeking a highly skilled and motivated Senior Design Verification Engineer to join our growing team. You will be responsible for planning and executing the verification strategy for complex ASIC/SoC designs. You will work closely with design, architecture, and software teams to ensure functional correctness of RTL through rigorous verification methodologies. Key Responsibilities: Develop and execute comprehensive test plans based on design specifications and architectural documents. Build and maintain constrained-random verification environments using SystemVerilog UVM . Write testbenches, test cases , and functional coverage to ensure design quality. Debug RTL and testbench issues using industry-standard tools (e.g., VCS, ModelSim, Verdi, DVE). Develop and track coverage metrics (code, functional, and assertion coverage). Contribute to the automation of the verification process (e.g., regression tools, continuous integration). Participate in design and verification reviews and provide technical guidance to junior engineers. Required Skills & Experience: Bachelors or Masters degree in Electronics, Electrical Engineering, or Computer Engineering . 3Years to 25 Years of experience in RTL verification of complex digital designs. Proficiency in SystemVerilog , UVM methodology , assertions, and functional coverage. Strong debugging and problem-solving skills. Experience with simulation tools (Synopsys VCS, Cadence Incisive/Xcelium, ModelSim, etc.). Solid understanding of SoC architecture, AMBA protocols (AXI, AHB, APB). Hands-on experience with scripting (Python, Perl, Tcl, or Shell). Familiarity with version control systems (e.g., Git, Perforce). Preferred Qualifications: Exposure to PCIe, Ethernet, USB, DDR , Jtag or other high-speed interfaces. Why Join Us: Work on cutting-edge technology with top-tier semiconductor clients. Opportunity to lead verification activities and mentor junior team members. Competitive compensation and flexible work culture.

Experience: 3 to 12 Years of Exp , Must Haves: Development Embedded System software experience in in device drivers and board-support packages for complex SoCs Development experience in Embedded domain using C/C++ Programming Strong working knowledge of operating systems like Linux / QNX Working experience on board bring up activities Strong Working knowledge of at least 1 of the IPs Power mgmt., CPU and/or UFS/storage domain Experience in working on any Linux/Android Drivers Driver development on PCIe / Ethernet / UFS Embedded System software, Device drivers and board-support packages for complex SoCs Embedded domain using C/C++ Programming Linux / QNX Operating Systems Board Bring Up activities Power mgmt., CPU and/or UFS/storage domain Linux/Android Drivers PCIe / Ethernet / UFS Role The engineer is expected to contribute to an advanced software development environment facilitating board bring-up, development, and delivery. The engineer is expected to develop and debug software prototypes including device driver software Hands on in kernel debugging, Boot failure issues and Power management and Storage issues Software System development and bug fixing on Automotive Chipsets for products based on Android/Linux/QNX OS platforms. Development and implementation of an efficient and transparent variant handling and re-use concept for the platform

Sr Staff Engineer Design Verification [ Location: NOIDA] Job Description We are seeking a diligent Verification leader to join our team at leading semiconductor company. The Verification engineer will be responsible for performing various verification tasks including Test Plan creation, Testcase creation, Coverage closure, Requirements traceability and Gate Level Simulation. They will also review system requirements and track quality assurance metrics. Ultimately, the role of the Verification Engineer is to ensure that our products, applications, and systems work correctly, safely & securely. Responsibilities: Drive Verification R&D team driving technical execution and best in class methodologies used in the design of advanced microcontrollers andmicroprocessors. Work closely with system architects to understand high level specifications to be able to verify them. Work with various EDA vendors to deploy next generation tools Build strong collaboration with other R&D teams such as RTL, DFT, digital IP, PD, Design Enablement, Emulation, and Validation to achieve project milestones Promote continuous improvement to design techniques to ensure ‘Zero Defect’ chips Collaborate with SME’s and key leaders in architecture, systems, emulation, SoC design, software, physical design, and IP teams developing key technical networks to influence overall design improvements and verification methodologies Responsible for developing detailed Technical SoC verification execution plans, progress reports and tracking milestones, managing technical risks, and providing mitigations to meet schedule quality and costs commitments. Communicate across technical teas as well as provide executive level presentations Complete ownership for SoC verification quality sign-offs ensuring all deliverables for team hand-offs. Drive best in class verification methodologies collaborating with global internal and external SME’s and developing adoption and compliance processes. Including, driving key innovation strategies which significantly impact efficiency and quality for overall R&D and ROI Qualifications Degree in Electrical/Electronic Engineering, Computer Engineering or Computer Science At least 12 years of experience in SoC Verification domains and have working knowledge of industry standard EDA toolkits. Proven experience in testbench design and development using UVM methodology for IP/Subsystem and SOC. Experience in Microcontroller and Microprocessor architecture & Interconnect Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR5/5x) and memory controllers. Advanced knowledge of Verilog, System Verilog, C/C++, Shell. Good knowledge in scripting like Perl, TCL or Python is a plus High proficiency in Metric Driven Verification concepts, functional and code coverage. Expertise in directed and constrained random methodologies. Good knowledge of formal verification methodologies and assertions. Experience with debugging of designs pre- and post-silicon, in simulation and on the bench. Excellent written and verbal communication skill. Must have worked on complex, multi-core SoC’s with extensive interconnects and a large range of peripherals. Fair domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must. Any of following experience would be a plus: High Speed Peripherals like DDR, PCIe, UCIe, Ethernet, GPU, VPU (Video Processing Unit); NIC/FlexNOC interconnect; Flash memory subsystems.

We are looking for Senior SOC Verification Engineers for Hyderabad & Bangalore location. 1) SOC Verification 2) SV UVM 4) C & Verilog Language Interested candidates, Kindly share with me your updated profile to anand.arumugam@modernchipsolutions.com

WHAT YOU DO AT AMD CHANGES EVERYTHING. We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.. AMD together we advance_. We are seeking a PCIe device architect with expertise in PCIe driver and Linux kernel development. The ideal candidate will work on our DPU and AINIC firmware low-level system software, enabling hardware functionality, optimizing performance, and ensuring seamless integration between hardware and software layers.. Key Responsibilities. Architect PCIe driver/features for our AINIC and DPU product line. Optimize PCIe driver performance, including power management and low-latency data transfers. Work with kernel-level programming in Linux including experience with sysfs, procfs, and PCIe Subsystem. Debug and troubleshoot PCIe bus communication, DMA, interrupts, and memory mapping issues. Provide support for hot-plug and interrupt mechanisms. Collaborate with hardware team to understand PCIe components like serdes and bringup in software. Represent AMD in industry forums presenting and standardising our architecture across different standard bodies for PCIe/CXL/XGMI. Work closely with customers understanding their requirements and providing direction to our product roadmap with features in PCIe domain. Innovate and mentor talent with in the team to build expertise in the area of PCIe implementing solutions with latency and bandwidth optimisations. Required Skills & Experience. 15 years of experience in managing PCIe devices, Linux kernel programming, device driver development, and system software engineering.. Proficiency in C programming for system-level software.. Good understanding of PCIe enumeration, link training, device initialization sequence, configuration space handling, SR-IOV, bare-metal and hypervisor VM architectures. Strong debugging and troubleshooting skills using kernel logs, GDB and other debugging tools.. Experience in hardware bringup, bootloaders, and ARM architecture.. Familiarity with Buildroot, or other embedded Linux systems.. Knowledge of memory management, interrupts, and scheduling in Linux.. Benefits offered are described: AMD benefits at a glance.. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.. Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING. We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.. AMD together we advance_. PMTS SILICON DESIGN ENGINEER. As a SerDes Verification Architect, you will be responsible for the verification and validation of high-speed SerDes interfaces, including testing data integrity, performance, and protocol compliance. You will work closely with hardware and design teams to ensure that SerDes designs meet the required specifications, operating parameters, and quality standards.. Key Responsibilities. Verification of SerDes Designs: Develop and execute verification plans and testbenches for SerDes IPs (Intellectual Property) and subsystems to ensure they meet functional and performance requirements.. Testbench Development: Design and implement verification testbenches using industry-standard verification methodologies (e.g., UVM, SystemVerilog, VHDL).. Simulation and Debugging: Perform simulations, analyze results, and debug issues related to timing, protocol errors, and other design anomalies in SerDes blocks.. Performance Evaluation: Evaluate and validate performance characteristics of SerDes systems including jitter, bit error rates (BER), signal integrity, eye diagrams, and other key metrics.. Protocol Compliance Testing: Verify adherence to relevant SerDes protocols such as UCIe, PCIe, Ethernet, USB, DDR, DisplayPort, or custom protocols.. Automated Testing: Develop automated regression tests to ensure the robustness and stability of the SerDes design over multiple versions and iterations.. Collaboration: Work closely with the design, hardware, and software teams to troubleshoot issues, implement fixes, and verify design changes.. Documentation: Create detailed reports and documentation on verification results, test scenarios, and issues found during testing.. Verification methodology: Provide feedback for design and verification process improvements and contribute to innovation in verification strategies and methodologies.. Experience:. 16+ years of experience in SerDes verification or high-speed communication verification.. Strong hands-on experience with verification methodologies such as UVM, SystemVerilog, or other simulation-based verification tools.. Knowledge of high-speed serial protocols such as UCIe, PCIe, Ethernet, USB, DDR, or custom protocols.. Experience in analyzing and interpreting signal integrity issues, jitter, BER, and eye diagrams.. Skills:. Solid understanding of SerDes architectures, link training, and equalization.. Strong debugging skills, with the ability to work across multiple domains (timing, protocol, performance).. Familiarity with hardware description languages (HDL) like VHDL or Verilog.. Strong analytical, problem-solving, and communication skills.. Experience with DDR protocol (e.g., DDR3, DDR4, DDR5) for memory interface verification.. Understanding of UCIe protocol and its role in chiplet-to-chiplet communication.. Preferred Skills. Experience with Python, Perl, or similar scripting languages for automation.. Exposure to high-speed memory interface design and verification, including DDR controller IP verification.. Functional coverage, assertions knowledge in SV/UVM.. Ability to work in a fast-paced environment and manage multiple verification tasks.. Strong team player with good interpersonal and communication skills.. Benefits offered are described: AMD benefits at a glance.. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.. Show more Show less

We aspire to be world-leader in innovative telecom and security solutions by offering cutting-edge, high-performance telecom and security solutions to business customers. Our Mission is simple. To prove that Indian engineers can design, develop, and manufacture world-class technology products for customers across the world, right from India. Join our team of like-minded engineers, applied researchers, and technocrats with the will, courage, and madness to achieve this mission! Why work at Matrix Matrix fully integrates software and hardware across its products. Engineers here collaborate more effectively to create solutions that solve real problems and make an impact. We are responsible for every nut, bolt, and line of code in our products! As an engineer, your involvement will be critical in the entire lifecycle of a product - right from ideation-development-production-deployment. Get to feel the sense of accomplishment that comes with creating something that solves a real and pressing problem and is used by scores of customers. Role Engineer/ Sr. Engineer - Hardware Design (Schematic) Function Hardware Design - (Schematic) Work Location Vadodara, Gujarat Who are you You are an energetic and passionate individual with extensive expertise in hardware design, particularly in schematic design. You possess a deep understanding of various hardware components and systems, including IP cameras, video recorders, access control systems, smart card readers, IP terminals, PABX, GSM gateways, military-grade cameras and recorders, and explosion-proof cameras. You thrive on tackling complex challenges and are driven by a commitment to innovation and excellence in hardware design. Experience 1 - 5 Years (Freshers can also apply) Qualification B .E/ B.tech/ M.E/ M.tech (EC, Electronics & Communication) OR MSc (EC/Electronics) Technical Skills Required : Experience on all stages of Hardware Product Development Lifecycle. Development of high speed board design in embedded domain. Should have hands-on experience of Schematic design. Experience on all stages of the Hardware Product Development Lifecycle. Designing and developing components such as printed circuit boards (PCB), processors, memory modules, and network components. Experience on High-Speed Interfaces like DDR, Memory, Audio, USB, Ethernet (Experience on HDMI, SATA, MIPI, CSI, USB, I2C, SPI will be additional benefit). Working experience in hardware design of Micro-ProcessorsTI, ARM CORTEX A7/A9, Freescale, NXP, Qualcomm. MemoriesDDR2, DDR3, LPDDR2/3. EMI-EMC Compliance related basic knowledge. Exposure of Design testing. Deriving H/W design requirements from EMI, EMC, Safety & Automotive EMC/Transients test standards. Preparing BOM (Bill of material) in the most efficient way. Thermal and product reliability know how. Alternate part approval and verification (Electronics components characteristics know how). How your day might look like Design block diagram and architecture for product design Create schematic diagrams following engineering layout principles and industry standards Evaluate and prepare comparison of parts Review and revise schematic designs to ensure accuracy, functionality, and alignment with project requirements. Secure approvals for component selections and design decisions from stakeholders Integration with other engineering departments for product definition (System design, Schematic and Layout integration, upfront work with vendor team). Oversee design and testing related management with structural workflow. Product certification support like CE, FCC and other safety standards Work on high-speed interfaces such as RGMII, MIPI-DSI, PCIe Gen3, MIPI-CSI, eMMC, and USB 3.0 to ensure seamless integration and performance. What we offer Opportunity to work for an Indian Tech Company creating incredible products for the world, right from India Be part of a challenging, encouraging, and rewarding environment to do the best work of your life Competitive salary and other benefits Generous leave schedule of 21 days in addition to 9 public holidays, including holiday adjustments to convert weekends into long weekends 5-day workweek with 8 flexi-days months, allowing you to take care of responsibilities at home and work Company-paid Medical Insurance for the whole family (Employee+Spouse+Kids+Parents). Company paid Accident Insurance for the Employee On-premise meals, subsidized by the company If you are an Innovative Tech-savvy individual, Look no further. Click on Apply and we will reach out to you soon!

Youll be joining a small, close-knit group of like-minded developers. We are looking for people with a track record for learning new skills and implementing them in a timely and effectively manner. Work here is collaborative and cross-functional. Youll get to enjoy the fun of working at a fast moving startup. Salary and compensation will be competitive. Skills: Linux Porting,Linux Kernel Concepts,Customizing kernel + Porting + Developing Applications Linux Device Driver Development (Character devices) Requirements Should have PCIe Protocol and driver development experience Experience in developing and debugging Linux device drivers, boot loaders, board support package (BSP) development. Experience in ARM based SoC software development. Strong experience in Linux kernel, Driver porting/development experience essential with Advanced C and Proficiency in Red Boot, u Boot or other similar boot loader development. Excellent experience on Linux, porting experience on ARM or any other Architecture.

Become a member of one of the largest engineering companies in the world! The PSG IP and Solutions Engineering team is seeking an experienced IP Design Lead to help define and lead the next generation Transceiver solutions for PCIe, Ethernet, SmartNIC, Networking and Communications segments for programmable logic products. This forward-looking dynamic role provides unique opportunities to influence future product direction requiring a strong technical leader with strong leadership, personal communication and collaboration skills. The successful candidate will bring design solutions experience for Data Center, and/or Communications, Networking, and/or Wireless domains, ideally covering both hardware and software, with knowledge of FPGA architecture, transceiver architecture and higher level protocols. Ideally the candidate will have experience leading large design teams on strategic projects implementing designs for FPGA in networking and storage would be a distinct advantage. You will lead a complex global IP Solutions program driving various aspects of the functions including RTL design, timing closure, hardware validation etc. You will work with cross-functional teams including planning, architecture, silicon design, software and platforms to define and drive delivery of holistic customer solutions that meet market requirements and capabilities comprising silicon, soft IP, applications, SW and tools support. Manage overall program including planning, tracking, execution, executive reporting apart from getting involved hands-on in project execution. Align with global stakeholders in various sites, anticipate and mitigate risks. Qualifications: 13+ years of experience with a MS degree in IP design of complex networking, Ethernet & PCIe based IPs and subsystems. Good understanding of FPGA IP design and implementation methodology. Must have microarchitecture knowledge of PCIe, Ethernet or transceivers. In depth knowledge with Verilog, System Verilog, RTL design, FPGA design, and FPGA design tools. In depth knowledge with one of high speed serial protocols: PCIe/Ethernet. Experience in Design and verification tools: simulation tools and debug tools. End-to-end System level knowledge including design, software, firmware and hardware. Proactive, self-motivated and quick learner. Good team spirit and ability to deliver to schedule. Excellent analytical and problem-solving skills. Strong verbal and written communication skills. Ability to multi-task and work in a dynamic environment. Must have experience working closely with customers, understanding their systems and providing optimized solutions. Good communication and presentation skills a must. Should have ability to work in multi site execution and ability to influence across groups Strong experience in networking standards and protocol. Good to have programming skills (C, C++, perl, python, tcl, etc.).

Roles and Responsibilities Design verification using System Verilog, UVM, and SV/UVM methodologies. Experience with PrimeSim XA, WREAL, RNM, Verilog-A, and MIPI protocols. Proficiency in PCIe and USB 3 interfaces. Strong understanding of digital logic design principles and SoC architecture. Excellent problem-solving skills with attention to detail.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Job Description: We are looking for an energetic, enthusiastic, and self-motivated individual to work with our NAND reliability characterization team as embedded firmware engineer in the Data Center Solutions Business Unit at Microchip. Our focus is on technical excellence, teamwork, collaboration, and continuous improvements in an open and encouraging environment. If you have a strong technical background in SSD FW development, embedded firmware development, and, embedded systems, this is the position for you! A candidate in this Technical Staff level position, based in Bengaluru, India and reporting to the Senior Manager - Solutions Architect. This candidate will be involved in the architecture, prototyping and development of firmware for the latest generation of FlashTech NVMe Controllers. This position offers a unique opportunity to implement various NAND management algorithms for latest NAND technologies from various vendors on our newest generations FlashTech controllers. Youll work closely with the NAND vendors, design, product engineering, and product validation teams. Job Responsibilities: Participate as a member of the NAND characterization team to architect, prototype and implement firmware for FlashTech NVMe Controllers for newest generations of NAND from various NAND vendors. Work on Machine Learning based NAND management algorithms. Generate comprehensive firmware and engineering documentation. Troubleshoot and resolve complex software problems in embedded real-time systems. Mentor and train other team members. Requirements/Qualifications: Minimum Qualifications: A good team player. A methodical and processes driven work ethic. Excellent written and verbal communication skills. Prior experience in SSD firmware development: NAND management algorithm development including but not limited to read error handling. Bachelor s degree in computer science, computer engineering or equivalent field. 12+ years of related experience Strong C/C++/Python programming and debugging skills. ARM system programming experience. Working knowledge of Machine Learning algorithms. Knowledge of SSD firmware architecture and algorithms, including: Flash translation layer Caching NAND management In-depth knowledge of NVMe and PCIe protocols Preferred Qualifications: Experience in the use of bus analyzers, JTAG, emulators and other firmware debugging tools. Agile development methodology experience. Lab time with PCIe and logic analyzers. Experience with Linux as a development environment. Board and first-silicon bring-up. Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Senior Software Engineer The Dell Technologies - UDS Division is in the business of transforming the way data is stored. At the forefront of the big data movement, our highly parallelized, distributed architecture has completely redefined the storage model. We enable our thousands of customers to work at a scale that wasnt previously possible by shipping a true clustered scale-out system that can be expanded from a few dozen terabytes up to many petabytes. Our goal is to package game changing technology, un-paralleled scalability, and record-breaking performance into a product that is utterly simple to manage and continuously delights our customers. We are a people company. We offer highly competitive salaries, bonus programs, world-class benefits, and unparalleled growth and development opportunities all to create a compelling and rewarding work environment. Join us to do the best work of your career and make a profound social impact as a Senior Software Engineer on our Software Engineering Team in Bangalore. What you ll achieve The successful candidate of this position will serve as a Senior Software Engineer in UDS Platform Engineering team, playing a lead role in delivering cutting edge Storage Array Platform software. You will be: Responsible for the development of Storage Array Platform software. Responsibilities include implementation and debug of OS, device driver, applications. Collaborate with many cross functional and across geo engineers. Keep following the latest technical trends (AI/ML/Cloud/Edge/etc.) and can adapt to new technologies quickly. Take the first step towards your dream career Every Dell Technologies team member brings something unique to the table. Here s what we are looking for with this role: Essential Requirements 5 to 7 years industry experience in Intel X86 system development with a bachelor s /masters degree in computer science, Computer Engineering, Electrical Engineering or similar. Strong coding experience in C/C++, familiar with scripting languages like Python//Perl/Shell and familiar with Linux kernel, Linux driver, File system, design. Exposure to FreeBSD/NetBSD OS, ports subsystem, GEOM subsystems along with working experience in Device Driver development. Demonstrated ability to analyze and solve technical problems, hands-on in debugging kernel/user space issues. Familiarity of tools like gdb, kdb is a must Ability to ramp up quickly on SW/HW architectures, CI/CD environments, Jenkins build system Desirable Requirements A plus if you have knowledge and expertise in following areas: Storage protocols (NFS, CIFS, iSCSI/FC, SAS, NVMe, PCIe), storage technologies (SAN, NAS, RAID), networking, clustering. A plus if you have worked with HW platform testing (CPU, Memory, PCIe); HW component trouble shooting, integration; OS installation & upgrade. Dell Technologies is a unique family of businesses that helps individuals and organizations transform how they work, live and play. Join us to build a future that works for everyone because Progress Takes All of Us. Application closing date: 26th July 2025 Dell Technologies is committed to the principle of equal employment opportunity for all employees and to providing employees with a work environment free of discrimination and harassment. Read the full Equal Employment Opportunity Policy here .

Principal Software Engineer The Dell Technologies - UDS Division is in the business of transforming the way data is stored. At the forefront of the big data movement, our highly parallelized, distributed architecture has completely redefined the storage model. We enable our thousands of customers to work at a scale that wasnt previously possible by shipping a true clustered scale-out system that can be expanded from a few dozen terabytes up to many petabytes. Our goal is to package game changing technology, un-paralleled scalability, and record-breaking performance into a product that is utterly simple to manage and continuously delights our customers. We are a people company. We offer highly competitive salaries, bonus programs, world-class benefits, and unparalleled growth and development opportunities all to create a compelling and rewarding work environment. Join us to do the best work of your career and make a profound social impact as a Principal Software Engineer on our Software Engineering Team in Bangalore. What you ll achieve The successful candidate of this position will serve as a Senior Software Engineer in UDS Platform Engineering team, playing a lead role in delivering cutting edge Storage Array Platform software. You will be: Responsible for the development of Storage Array Platform software. Responsibilities include implementation and debug of OS, device driver, applications. Collaborate with many cross functional and across geo engineers. Keep following the latest technical trends (AI/ML/Cloud/Edge/etc.) and can adapt to new technologies quickly. Take the first step towards your dream career Every Dell Technologies team member brings something unique to the table. Here s what we are looking for with this role: Essential Requirements 8 to 13 years industry experience in Intel X86 system development with a bachelor s /masters degree in computer science, Computer Engineering, Electrical Engineering or similar. Strong coding experience in C/C++, familiar with scripting languages like Python//Perl/Shell and familiar with Linux kernel, Linux driver, File system, design. Exposure to FreeBSD/NetBSD OS, ports subsystem, GEOM subsystems along with working experience in Device Driver development. Demonstrated ability to analyze and solve technical problems, hands-on in debugging kernel/user space issues. Familiarity of tools like gdb, kdb is a must Ability to ramp up quickly on SW/HW architectures, CI/CD environments, Jenkins build system & Makefile exposure Desirable Requirements A plus if you have knowledge and expertise in following areas: Storage protocols (NFS, CIFS, iSCSI/FC, SAS, NVMe, PCIe), storage technologies (SAN, NAS, RAID), networking, clustering. A plus if you have worked with HW platform testing (CPU, Memory, PCIe); HW component trouble shooting, integration; OS installation & upgrade. Dell Technologies is a unique family of businesses that helps individuals and organizations transform how they work, live and play. Join us to build a future that works for everyone because Progress Takes All of Us. Application closing date: 26th July 2025

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe , CXL , and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . Title : Lead Software QA Engineer, A stera Labs, Bengaluru, India. Astera Labs Inc., a leader in purpose-built connectivity solutions for data-centric systems, is seeking Lead Software QA Engineer for their Bengaluru (India) Design Center. Partnering with leading processor and GPU vendors, cloud service providers, world-class manufacturing companies, Astera Labs is helping data-centric system designers remove performance bottlenecks in compute-intensive workloads such as Artificial Intelligence and Machine Learning. For more information about Astera Labs, see www.AsteraLabs.com . Key Responsibilities Lead and scale high-performing Firmware QA teams in India. Own the full software development lifecycle, from architecture and design to testing and deployment. Develop and implement software development and QA best practices, including test automation, process monitoring, and quality metrics. Collaborate cross-functionally with hardware, product, and customer-facing teams to define and deliver robust software solutions. Communicate regularly with global customers including Hyperscalers and Tier 1 OEMs to provide updates, support audits, and resolve escalations. Help build large-scale test farms and automation frameworks. Mentor, coach, and grow engineering talent through effective performance management and career development. Drive continuous improvement in team efficiency, quality, and delivery. Basic Qualifications : Bachelor s degree in Electrical Engineering or Computer Science (Master s or PhD preferred). 6+ years of experience in firmware software QA. Proven ability to build and manage complete software development teams in India. Expertise in Agile software development methodologies. Deep understanding of software test methodologies, automation, and management tools. Excellent communication and interpersonal skills, especially in customer-facing roles. Strong planning, prioritization, and project management skills in fast-paced environments. Entrepreneurial, proactive mindset with a passion for innovation and customer success. Required Experience : Proficiency and demonstrated experience with ASIC based hardware systems and SQA mechanisms. Knowledge of PCIE is required. Building and scaling technical teams with a focus on collaboration and innovation. Proficient in C and Python programming. Expert-level user of Git, Jira, and Confluence. Experience defining and tracking software KPIs and quality metrics. Development and implementation of firmware design and test plans. Knowledge of hardware/software architecture and its impact on system performance. Preferred Experience : Experience with Security Development Lifecycle and FIPS certification. Familiarity with cryptographic protocols and implementation. Knowledge of memory (DDR4/DDR5/HB) technologies. Deployment of AI based SQA and FW development We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Minimum qualifications: Bachelor's degree in Electrical, Electronics or Computer Engineering, or equivalent practical experience, 5 years of work experience in development, testing and deployment of consumer electronics/embedded systems, Experience in Linux networking, including network packet filtering, network protocol acceleration (or display pipeline), camera front-end and sensor Linux drivers, and video codecs, Experience with embedded programming in C/C++, Preferred qualifications: Master's degree in Electrical, Electronics or Computer Engineering, or equivalent practical experience, Experience with ARM or other low-power SoC architectures, memory system, fabric etc Experience with interface protocols (e-g , USB, SPI, I2C, UART, UFS, PCIe), power management, system integration, software stacks, and drivers, Knowledge of embedded systems development, RTOS concepts, device drivers and hardware/software integration, Knowledge of ARM, system BIOS, Linux kernel, device drivers, About The Job Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another Our products need to handle information at massive scale, and extend well beyond web search We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day As a software engineer, you will work on a specific project critical to Googles needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward, With your technical expertise you will manage project priorities, deadlines, and deliverables You will design, develop, test, deploy, maintain, and enhance software solutions, As a Software Engineer, Kernel and Firmware, Silicon, you will work on hardware and software We are a vertically integrated team spanning from hardware through applications, Google's mission is to organize the world's information and make it universally accessible and useful Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful We aim to make people's lives better through technology, Responsibilities Design a software that can ultimately delight our application developers, and can let them make use of hardware accelerators seamlessly and in a timely manner, Implement and validate firmware and Linux drivers for optimal power and performance, Design, develop, and test embedded software drivers for next-generation smart devices, Define overall architecture in collaboration with stakeholders silicon architecture, silicon implementation, silicon software, and customer etc , to identify user experiences characteristics and how they can be mapped onto hardware in existence or in development, Lead in bug triage and optimize for power and performance etc Google is proud to be an equal opportunity workplace and is an affirmative action employer We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status We also consider qualified applicants regardless of criminal histories, consistent with legal requirements See also Google's EEO Policy and EEO is the Law If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form ,