665 Pcie Jobs - Page 11

Job Description Summary We are looking for an expert AMS Verification Engineer that is familiar with the complete flow/methodology and can establish a modern AMS verification environment in a high-paced start-up. Responsibilities Review existing company designs and understand communication standards Establish a state-of-the-art AMS verification environment Co-develop an AMS verification plan with DSP/Digital/Analog teams from chip specification Execute plan and debug issues with team Develop test benches and models Provide feedback to design teams for AMS netlist optimization Expand and monitor AMS verification coverage and drive schedule timeliness Assist with debug simulations for silicon bring-up as necessary Create reports and documentation of AMS verification results and coverage Minimum Qualifications PhD/MSEE with at least 5 years domain expertise and have prior circuit design experience Proven record of AMS verification for mixed-signal SOCs in example fields such as: Ethernet/PCIe/MIPI DSL/DOCSIS 11, GSM/LTE Ethernet/PCIe/MIPI DSL/DOCSIS 11, GSM/LTE Expert at one of Cadence AMS-D/Incisive/Xcelium, Mentor Symphony, Synopsys VCS-AMS Able to model analog circuits in Verilog / Verilog-A / Verilog-AMS / SystemVerilog and adept with simulations in Explorer/Assembler Experience in solving Analog-Digital tool interaction issues and simulation slowness Experience in solving Analog-Digital tool interaction issues and simulation slowness Good written and verbal communication skills Additional experience in the following preferred: PERL, Python UVM, UPF Analog timing verification and .LIB generation DSP based data communication systems design ISO 26262 FuSa certification (SC-AFSP)

Role: BareMetal Test Development Engineer Location : Bangalore Exp : 10+ years to 15 years Port and develop testsfor baremetal environments on mobile SoC platforms. Design, implement, and debug firmwarefor embedded systems, ensuring robust and scalable solutions. Work closely with hardware teamsto define system requirements and validate hardware functionality. Utilize JTAG and other debugging toolsfor low-level troubleshooting and validation. Develop and execute test plansfor various SoC subsystems (CPU, GPU, multimedia, TPU, PCIe, USB). Optimize codefor performance, efficiency, and memory usage in resource-constrained environments. Automate test executionand reporting using Python or Bash scripts. Document test procedures, results, and codebasefor maintainability and knowledge sharing Proficiency in C and Assembly programmingfor embedded systems. Experience with firmware developmentand debugging on baremetal or RTOS environments. Strong understanding of JTAG and other hardware debugging interfaces. Hands-on experience with at least two SoC subsystems:CPU, GPU, multimedia, TPU, PCIe, or USB. Familiarity with SoC architecturesand low-level hardware/software interaction. Experience with test automationusing Python or Bash is a plus. Excellent problem-solving skills and attention to detail. Strong communication and teamwork abilities.

Job Description Job Summary: We are looking for a highly experienced and motivated Senior Design Verification Engineer with a deep understanding of the PCIe protocol and hands-on experience in SystemVerilog and UVM. The ideal candidate will lead verification activities for complex PCIe subsystems or SoCs, and contribute to building scalable, reusable verification infrastructure. Key Responsibilities: Develop UVM-based verification environments for PCIe IPs or SoCs . Define and execute comprehensive verification plans for PCIe Gen3/Gen4/Gen5/Gen6 features. Drive testbench development, stimulus generation, scoreboarding, and coverage closure. Validate protocol compliance including LTSSM, TLP/DLLP, BAR/Address decoding, and interrupt mechanisms. Work closely with RTL, DFT, and system validation teams for debug and feature bring-up. Conduct assertion-based verification and participate in formal verification as needed. Collaborate with cross-functional teams to ensure successful first-silicon quality. Required Skills & Experience: B.E./B.Tech or M.E./M.Tech in ECE 8+ years of experience in ASIC/SoC design verification. Proven expertise in SystemVerilog, UVM, and complex testbench development. Deep knowledge of PCIe protocol (Gen3/Gen4/Gen5/Gen6). Experience in verifying Root Complex (RC) and Endpoint (EP) configurations. Familiarity with AMBA protocols (AXI, AHB) and memory-mapped IO. Proficiency with EDA tools like VCS, Questa, Verdi, SimVision. Strong debugging and analytical skills, particularly with PCIe protocol analyzers and simulation waveforms. Scripting proficiency in Python, Perl, TCL, or Shell for automation. Nice to Have: Knowledge of low power (UPF) and DFT concepts. Familiarity with Formal Verification, Portable Stimulus, or Emulation. Exposure to hardware validation, bring-up, or post-silicon debug. Domain experience in datacenter, storage, networking, or automotive industries. Soft Skills: Strong communication and documentation skills Problem-solving mindset and attention to detail Leadership in driving verification tasks and mentoring junior engineers

Oscilloscope, BERT, logic analyzer usage Signal/power integrity testing Board bring-up and hardware debugging PCIe / Ethernet interface validation Python scripting for test automation Validation test plan creation Router/Switch hardware

Qualcomm India Private Limited is a leading technology innovator that strives to push the boundaries of what is possible, enabling next-generation experiences and driving digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, your role will involve planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment, packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams will be essential to develop solutions and meet performance requirements. To be eligible for this position, you should have a Bachelor's/Master's/PhD degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with relevant work experience ranging from 4 to 6+ years. Join Qualcomm's design verification team and be involved in verifying high-speed mixed-signal IP designs for products targeted for 5G, AI/ML, compute, IoT, and automotive applications. Responsibilities will include defining test plans, developing testbenches using advanced verification methodologies, authoring assertions, developing test cases, and collaborating with various teams to ensure successful verification and integration. Qualified candidates should possess a Master's/Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with at least 12+ years of ASIC design verification experience. Knowledge of HVL methodologies like SystemVerilog/UVM and experience with ASIC simulation/formal tools are required. Preferred qualifications include experience with low power design verification, formal verification, gate-level simulation, knowledge of standard protocols, scripting languages like Python or Perl, and experience with mixed-signal IP design verification. Qualcomm is an equal opportunity employer that is committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please contact disability-accommodations@qualcomm.com. Additionally, Qualcomm expects its employees to adhere to all applicable policies and procedures, including those related to the protection of confidential information. For more information about this role, please contact Qualcomm Careers.,

As a Developer/Senior Developer at Krutrim, you will be responsible for developing embedded software for different processors. You should have good knowledge in developing drivers for various hardware blocks such as PCIe, I2C, USB, UART, Ethernet, and Crypto security. Understanding Linux kernel internals and working with open-source software is essential for this role. You will be involved in developing high and low-level designs, drivers, and firmware for different hardware blocks. Additionally, you will work on adopting operating systems and embedded software for various processor architectures. Your responsibilities will include developing software based on pre-silicon development vehicles, bringing up software using pre-silicon vehicles and silicon-based platforms, upstreaming open-source code, developing software component-level tests, and enabling them in a CI/CD system. You will also be debugging issues using standard hardware/software-based debuggers and diagnostic equipment. To excel in this role, you should possess excellent knowledge of Linux internals, different drivers, and standards like PCIe, Ethernet, and CXL. Expertise in the Software Development Life Cycle (SDLC), firmware BSP, device drivers, and strong technical problem-solving skills in areas like system boot, UEFI, and OS functionality are crucial. You should have software development skills in C, C++, and Python, along with strong low-level debugging capabilities. A successful candidate for this position should hold a BTech/MTech in Computers, Electronics, or Electrical Engineering and have around 5-12 years of experience in embedded software development across different architectures. Having a good understanding of different CPU architectures like IA, ARM, and RISC V, as well as the Pre-Silicon Development environment, will be advantageous in fulfilling the requirements of this role.,

NK Securities Research is a leading financial firm that leverages cutting-edge technology and sophisticated algorithms to trade the financial markets. Founded in 2011, we have gained invaluable experience in the field of High-Frequency Trading across different asset classes. As an FPGA Developer at NK Securities Research, your primary responsibility will be to design, implement, and rigorously test RTL (Register-Transfer Level) designs to power our high-frequency trading strategies. Your contributions will be instrumental in reducing system latency and enhancing performance, directly influencing trading outcomes. You will be tasked with developing high-performance RTL designs using VHDL or Verilog for FPGA-based systems, optimizing hardware implementations for ultra-low latency and high throughput, and ensuring thorough functional and timing testing of RTL designs to meet specifications. Additionally, you will be responsible for debugging and resolving issues using FPGA debugging tools such as SignalTap, ChipScope, or ModelSim. Collaboration with hardware and software teams to seamlessly integrate FPGA solutions with the Software Trading Stack will be a key aspect of your role. Maintaining clear and comprehensive documentation of designs, test cases, results, and benchmarks is essential to ensure effective communication and knowledge sharing within the team. Preferred qualifications for this role include a Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field from top IITs. Proficiency in VHDL or Verilog/SystemVerilog, hands-on experience with industry-standard tools like Xilinx Vivado, expertise in writing testbenches and conducting simulation-based verification, familiarity with static timing analysis, and proficiency in debugging tools such as SignalTap, ChipScope, or ModelSim are desired. Exposure to high-speed interfaces like PCIe, Ethernet, or DDR, as well as a basic understanding of low-latency design principles and architecture, are considered advantageous. Candidates with a proven track record in delivering high-quality RTL designs, strong analytical and problem-solving skills, and the ability to work independently while collaborating effectively in a team environment are encouraged to apply. In return, NK Securities Research offers a competitive salary package, the opportunity to work in a dynamic and collaborative environment, career growth and development opportunities, catered breakfast and lunch, an annual international trip, and monthly team dinners.,

SoC Verification Engineer SoC Verification Engineer >> SoC Verification Engineer Post SoC Verification Engineer Required Experience 1 to 3 years Location: Bangalore,Delhi NCR,Hyderabad Openings 8-10 Education BE/B.Tech./MS/M.Tech.(Electronics or Electronics & Communication) Must haves: Worked on IP level verification environment 1 to 3 years of experience Good experience with Verilog, System Verilog and UVM Experience with verification for protocols like AXI or AHB Experience with any of the following protocols: DDR, PCIe, Ethernet, MIPI, USB Excellent Team Player Good To Have Experience of SOC Verification Experience of Formal verification Experience on verification of automotive protocols Email your resume to careers@truechip.net and mention position/location in the subject,

Job Description: Experience on Linux and/or embedded systems and peripherals interfaces validation. 6+ years of overall experience in embedded Software testing with good understanding of I2C/I3C, SPI, PCIe, USB, SPI/eSPI, GPIO/SGPI. Bachelors degree in computer science or related field. Experience in NIC drivers in Linux, BMC and firmware testing. Strong Networking, PCIe, BMC background. Familiarity with ARM CPU and SOC system architecture, microprocessor, and microcontroller fundamentals (caches, buses, memory controllers, DMA, etc.) Experience with troubleshooting integration issues including root-cause analysis Solid understanding of software development lifecycle (SDLC), software testing lifecycle (STLC), software testing methodologies, and agile development practices. Familiarity with Atlassian tools (Jira, Confluence, etc) Experience working with SCM tools like Git/ SVN Automation testing experience using python and Pytest\Robot framework Job Category: Others Job Type: Full Time Job Location: AhmedabadBangaloreGurgaonKochiNoidaPollachiPune Experience: 8+ years Notice period: 0-15 days,

Job Description: Proven C programming. Min. 3 year experience working with BMC or openBMC software stack, IPMI, etc. Designing and Developing performance optimized active monitoring BMC solutions using DMTF Standards including MCTP, Redfish, SPDM and PLDM specifications. Good understanding of Linux kernel, uboot, device drivers, UEFI / BIOS Experience with various peripherals such as PCIe, USB, SDIO, SPI, I2C, I2S, GPIO, etc. Should have min 5 years total experience in embedded domain Job Category: Embedded HW_SW Job Type: Full Time Job Location: Ahmedabad Experience: 5+ years Notice period: 0-15 days,

As a Principal Engineer in SSD System Design at Micron Technology, you will play a crucial role in our Client & Consumer SSD development and validation process. Your primary responsibility will be to ensure that our products are launched on time and excel in their segment. You will collaborate with various engineering groups both within Micron and with external vendors to achieve the best outcomes. Your key responsibilities will include being a technical authority in the program, providing updates on development progress to upper management, serving as the technical interface with internal teams, vendors, marketing, and customers, and staying updated on industry technologies. You will also be responsible for analyzing product requirements, influencing hardware design, managing technical programs, and continuously improving processes related to design, validation, and production. Additionally, you will work on test implementation, production support, and field support. Your qualifications should include a BE with 15+ years or MTech with 12+ years in Computer Science, Electronics/Electrical Engineering, or equivalent. You should have experience in leading engineering resources on NPD and system-level debug, knowledge of NAND/SSD, PCIe & NVME protocols, and storage interface specifications. Moreover, you should possess the ability to analyze problems, mentor, guide, and collaborate effectively. Micron Technology, Inc. is a global leader in memory and storage solutions, dedicated to transforming how information enriches life for everyone. With a focus on customer satisfaction, technology innovation, and operational excellence, we provide high-performance DRAM, NAND, and NOR memory and storage products through our Micron and Crucial brands. Our innovations drive the data economy, supporting advancements in artificial intelligence, 5G applications, and enhancing user experiences across various platforms. If you are passionate about engineering, innovation, and making a difference, Micron Technology is the place for you. Visit micron.com/careers to learn more and explore exciting opportunities to join our team. For any assistance with the application process or to request reasonable accommodations, please contact hrsupport_in@micron.com. Micron strictly prohibits the use of child labor and adheres to all relevant laws, regulations, and international labor standards.,

Minimum qualifications: Bachelor s degree, or equivalent practical experience. 8 years of experience in software development in embedded domain, data structures, algorithms, and software design. 3 years of experience with design, development, and testing of embedded software drivers for the next generation smart devices. 3 years of experience in a technical leadership role; overseeing projects, with 2 years of experience in people management. Preferred qualifications: Master's degree or PhD in Computer Science or related technical field. Experience with interface protocols (e.g., USB, SPI, I2C, UART, UFS, PCIe), power management, system integration including software stacks, and drivers. Experience with ARM or other low-power SoC architectures, memory system, fabric etc. Experience working with hardware designers/reading schematics. Knowledge of embedded systems development, RTOS concepts, device drivers and hardware/software integration. About the job Like Google's own ambitions, the work of a Software Engineer goes beyond just Search. Software Engineering Managers have not only the technical expertise to take on and provide technical leadership to major projects, but also manage a team of Engineers. You not only optimize your own code but make sure Engineers are able to optimize theirs. As a Software Engineering Manager you manage your project goals, contribute to product strategy and help develop your team. Teams work all across the company, in areas such as information retrieval, artificial intelligence, natural language processing, distributed computing, large-scale system design, networking, security, data compression, user interface design; the list goes on and is growing every day. Operating with scale and speed, our exceptional software engineers are just getting started -- and as a manager, you guide the way. With technical and leadership expertise, you manage engineers across multiple teams and locations, a large product budget and oversee the deployment of large-scale projects across multiple sites internationally. As a Software Engineer in Firmware and Silicon, you will work across both hardware and software domains. Our vertically integrated team spans the entire stack, from hardware development through applications. You will manage a team of developers responsible for delivering firmware, libraries, and tools that support silicon validation and the productization of Google custom silicon. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Manage a team of developers to deliver firmware, libraries, and tools for silicon validation and productization of Google custom silicon. Develop new software, hardware, and system architecture to support future applications. Design, development, and testing of embedded software drivers for the next generation smart devices. Design, guide and vet systems designs within the scope of the broader area, and write product or system development code to solve ambiguous problems. Review code developed by other engineers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).

Minimum qualifications: Bachelor's degree in Electrical, Electronics or Computer Engineering, or equivalent practical experience. 5 years of work experience in development, testing and deployment of consumer electronics/embedded systems. Experience in Linux networking, including network packet filtering, network protocol acceleration (or display pipeline), camera front-end and sensor Linux drivers, and video codecs. Experience with embedded programming in C/C++. Preferred qualifications: Master's degree in Electrical, Electronics or Computer Engineering, or equivalent practical experience. Experience with ARM or other low-power SoC architectures, memory system, fabric etc. Experience with interface protocols (e.g., USB, SPI, I2C, UART, UFS, PCIe), power management, system integration, software stacks, and drivers. Knowledge of embedded systems development, RTOS concepts, device drivers and hardware/software integration. Knowledge of ARM, system BIOS, Linux kernel, device drivers. About the job Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. With your technical expertise you will manage project priorities, deadlines, and deliverables. You will design, develop, test, deploy, maintain, and enhance software solutions. As a Software Engineer, Kernel and Firmware, Silicon, you will work on hardware and software. We are a vertically integrated team spanning from hardware through applications. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Design a software that can ultimately delight our application developers, and can let them make use of hardware accelerators seamlessly and in a timely manner. Implement and validate firmware and Linux drivers for optimal power and performance. Design, develop, and test embedded software drivers for next-generation smart devices. Define overall architecture in collaboration with stakeholders silicon architecture, silicon implementation, silicon software, and customer etc., to identify user experiences characteristics and how they can be mapped onto hardware in existence or in development. Lead in bug triage and optimize for power and performance etc.

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 4 years of experience with verification methodologies and languages such as UVM and SystemVerilog. Experience developing and maintaining verification testbenches, test cases, and test environments. Preferred qualifications: Master s degree in Electrical Engineering, Computer Science, or equivalent practical experience. Experience in one or more of the following; high speed controller and physical layer for peripheral component interconnect express, display port, universal serial bus, universal flash storage or low speed IOs such as improved inter-integrated circuit, serial peripheral interface or universal asynchronous receiver transmitter, etc. Experience with Interconnect Protocols (Advanced eXtensible Interface, AXI Coherency Extensions, Coherent Hub Interface, Cache Coherent Interconnect for Accelerators, Compute Express Link). Experience with verification techniques, System Verilog Assertions (SVA) and assertion-based verification. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Plan and execute the verification of high speed Inputs/Outputs (IOs) ( PCIe, display port, universal serial bus or universal flash storage ) or low speed IOs (improved inter-integrated circuit, serial peripheral interface or universal asynchronous receiver transmitter), IP/subsystem functional verification, power controller and chips pervasive IP. Create and enhance constrained-random verification environments using SystemVerilog and UVM or other industry-standard methodologies. Create and maintain verification environments using SystemVerilog, Universal Verification Methodology (UVM), and define and implement testbench components, such as drivers, monitors, scoreboards, and checkers. Develop cross language tools and verification methodologies. Identify and write all types of coverage measures for stimulus and corner-cases.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field. Preferred Qualifications: Debug and Development of DDR init & run time driver sequences. Will be working on state-of-the-art DDR technology LP4x/LP5x. Opportunity to get the understanding of DDR technology. Will be responsible for driving multiple programs. Need to work on issues with multiple teams (performance, Phy, controller design etc.) Need to analyze lot of data and need to recognize patterns. Working on triage of the DDR issues. Test case enhancements and development Principal Duties and Responsibilities: Job description Minimum Qualifications The charter of the CoreBSP-DDR SW System team is to ensure that the end-product qualifies the defined acceptance criteria for DDR by meeting stability, Power, and Performance Goals . The team is looking for a candidate who has strong understating of system level test methodologies and run validations on mobile systems. The position involves Understanding of SOC Architecture and DDR SW Systems, identifying and debugging DDR systems issues ( memory corruptions, Memory Lock-ups, Bit flips, memory leaks etc..)reported by memory validation and also running system level validations tests. The engineer would have opportunity to interact with different SW & HW teams to understand DDR systems. The candidate is expected to own and drive multiple chipsets in DDR tech area. This position gives an exposure to understand various quality stages from product development to commercial launch of the product. Skills: C, Python, Embedded system , JTAG , processor architecture, RTOS operating system, core BSP driver level development and debug ,CPU architecture , SOC System knowledge. DesirableDDR technology Level of Responsibility: Works under supervision. Decision-making affects direct area of work and/or work group. Requires verbal and written communication skills to convey basic, routine factual information. Tasks require multiple steps which can be performed in various orders; some planning, problem-solving, and prioritization must occur to complete the tasks effectively.

Role & responsibilities : The role involves designing, implementing and bug fixing device drivers for various interfaces like I2C, SPI, eMMC, SPIO, USB, PCIe, Ethernet, Display, camera etc. Preferred candidate profile Excellent programming skills in C Design, Implementation and debugging of Linux device drivers Ability to read and understand board schematics Knowledge of processor architectures for ARM or RISC-V Deep knowledge on Linux internals and Linux Kernel Architecture Experience on tools like Git, Yocto etc. Experience in debugging with JTAG, Signal Analyzers etc. BSP (Board Support Package) bringup experience including boat loader and Uboot. Good to Have Technical Skills: Experience in code upstreaming and Open Sourcing. Behavioral/ Non-Technical: Strong analytical and problem-solving skills Excellent verbal and written communication skills Self-managed and able to learn and adapt

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe , CXL , and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . Basic Qualifications : Bachelor s degree in electrical engineering (EE) is required; a master s or PhD in EE is preferred. Additional background in Math or Computer Science is highly desirable. 8+ years of experience in formal verification or 7+ years of experience in traditional design verification (DV). Strong professional work ethic with the ability to manage and prioritize multiple tasks in a dynamic environment. Proven ability to plan and prepare for customer meetings and to work with minimal supervision. Entrepreneurial mindset with a proactive, customer-focused attitude. Ability to think and act quickly while maintaining a high standard of quality. Strong cross-functional collaboration skills. Required Experience : Develop detailed formal verification (FV) test plans based on design specifications and collaborate with design teams to refine micro-architecture specifications. Identify key logic components and critical micro-architectural properties essential for ensuring design correctness. Implement formal verification models, abstractions, assertions, and utilize assertion-based model checking to detect corner-case bugs. Apply complexity reduction techniques using industry-standard EDA tools or academic formal verification tools to achieve proof convergence or sufficient depth. Develop and maintain scripts to enhance FV productivity and streamline verification processes. Assist design teams with the implementation of assertions and formal verification testbenches for RTL at unit/block levels. Participate in design reviews and collaborate with design teams to optimize design quality and performance, power, area (PPA) metrics based on formal analysis feedback. Strong proficiency in System Verilog/Verilog. Good scripting abilities with Python or Perl. Preferred Experience : Hands-on experience with formal verification tools such as Synopsys VCFormal and Cadence JasperGold. Experience with both bug hunting and static proof verification techniques. Familiarity with automating formal verification workflows within a CI/CD environment. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe , CXL , and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . Title : Lead Software QA Engineer, A stera Labs, Bengaluru, India. Astera Labs Inc., a leader in purpose-built connectivity solutions for data-centric systems, is seeking Lead Software QA Engineer for their Bengaluru (India) Design Center. Partnering with leading processor and GPU vendors, cloud service providers, world-class manufacturing companies, Astera Labs is helping data-centric system designers remove performance bottlenecks in compute-intensive workloads such as Artificial Intelligence and Machine Learning. For more information about Astera Labs, see www.AsteraLabs.com . Key Responsibilities Lead and scale high-performing Firmware QA teams in India. Own the full software development lifecycle, from architecture and design to testing and deployment. Develop and implement software development and QA best practices, including test automation, process monitoring, and quality metrics. Collaborate cross-functionally with hardware, product, and customer-facing teams to define and deliver robust software solutions. Communicate regularly with global customers including Hyperscalers and Tier 1 OEMs to provide updates, support audits, and resolve escalations. Help build large-scale test farms and automation frameworks. Mentor, coach, and grow engineering talent through effective performance management and career development. Drive continuous improvement in team efficiency, quality, and delivery. Basic Qualifications : Bachelor s degree in Electrical Engineering or Computer Science (Master s or PhD preferred). 8+ years of experience in firmware software QA. Proven ability to build and manage complete software development teams in India. Expertise in Agile software development methodologies. Deep understanding of software test methodologies, automation, and management tools. Excellent communication and interpersonal skills, especially in customer-facing roles. Strong planning, prioritization, and project management skills in fast-paced environments. Entrepreneurial, proactive mindset with a passion for innovation and customer success. Required Experience : Proficiency and demonstrated experience with ASIC based hardware systems and SQA mechanisms. Knowledge of PCIE is required. Building and scaling technical teams with a focus on collaboration and innovation. Proficient in C and Python programming. Expert-level user of Git, Jira, and Confluence. Experience defining and tracking software KPIs and quality metrics. Development and implementation of firmware design and test plans. Knowledge of hardware/software architecture and its impact on system performance. Preferred Experience : Experience with Security Development Lifecycle and FIPS certification. Familiarity with cryptographic protocols and implementation. Knowledge of memory (DDR4/DDR5/HB) technologies. Deployment of AI based SQA and FW development We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

. Responsibilities You will be part of this platform team, responsible for developing platform software in the areas of: Board bring-up related experience. 10G, 40G, 100G, 400G, 800G interface related platform software like interface drivers, etc. Platform infrastructure-related software like Routing Engine Redundancy/High Availability, Chassis/line card, fabric, Optics, etc. Timing software in PTP, SYNCE & Grand Master You will be responsible for these product developments in the platform area in either JunOS or Junos evolved software architecture. In addition to the development activity, you are required to work closely with system and solution test teams to ensure products/solutions delivered are of the highest quality. You will be required to work closely with Juniper Technical Assistance Team for providing engineering assistance in supporting critical customer escalations for customer deployments. Requirements BTech / MTech in CS/CE or related field with proven experience. Good understanding of hardware-level details for Optics, PCIe, SPI, I2C, Retimers, FPGA, CPLD, MDIO, Flash Driver Proficiency with device drivers, system bring-up, FreeBSD/Linux internals. Understanding of Ethernet, OTN, SONET, etc. technologies. Strong technical, analytical, and problem-solving skills. Strong in C, C++ programming, OO analysis & design, data structures, and system debugging skills. Prior software development experience on networking products.

S ENIOR SOFTWARE DEVELOPMENT ENGINEER THE ROLE: AMD is looking for a s enior software engineer to join our growing team. As a key contributor you will be part of a leading team to drive and enhance AMD s abilities to deliver the highest quality, industry-leading technologies to market. THE PERSON: The ideal candidate possesses an innovative and problem-solving mindset, has a keen eye for S oftware engineering development , and is diligent and passionate about Technology . A successful candidate will need to employ strong knowledge in computer technologies, leadership skills in technical areas, and SW engineering expertise as well as a strong ability to compete effectively in a fast-paced, relevant environment while working with different teams of engineers and collaborators. KEY RESPONSIBILITIES: Develop and drive execution of comprehensive , highly effective software for sophisticated new technology and new product introduction projects Validate new SW features before releasing them to customers Contribute to a high-functioning feature team C ollaborate closely with multiple teams to deliver key planning solutions and the technology to support them Help contribute to the design and implementation of future architecture for a highly scalable, durable, and innovative system Work very closely with dev teams and Project Managers to drive results PREFERRED EXPERIENCE: 4-8 years of Proficient experience in C and embedded systems. -Experience in Linux driver development (PCIe/USB/Ethernet/I2C/SPI) and application development. -PCIe driver development experience is a plus. -DMA client/controller driver development experience is a plus -Hands-on experience with Configuration Management tool like GIT, Perforce. -Have an interest to constantly learn and share new findings. -A quality mindset, ability for strategic thinking and a drive to always improve. S olid understanding of Software Engineering principles, Data structure, algorithms, Operating Systems concepts and multithread programming Excellent design and code development skills, familiarity with Linux and modern software tools and techniques for development Good analytical and problem-solving skills ACADEMIC CREDENTIALS: Bachelor s or Master s degree in Computer/Software Engineering, Computer Science, or related technical discipline #LI-SK4

Oscilloscope Signal integrity testing Board bring-up Power integrity Hardware lab Validation test plan Router/Switch BERT (Bit Error Rat) Test automation Python for test scripts Ethernet testing High-speed interfaces Hardware debugging

Good to have knowledge and working experience with high volume systems. Expert in Java 11+, Spring Boot, Rest API and AWS services (DynamoDB, UKS,SQS,Lambda) Should be able to work with minimal guidance. Expert in problem Debugging skills. Added advantage if having exp with Payments domain. Good to have knowledge on Jenkins and Cacheing tech Exp with working on high volume distributed systems Roles and Responsibilities Design, Implement and Integrate solutions . Collaborate with all stakeholders ( QA, Product,EM, Peer teams) Support existing services and product which are Live Self motivated and pro-active participation Should be able to do peer reviews and help junior folks Maintan code quality Create functional/tech improvement in new or existing services Guide and Mentor Engg team

About the Company Qbit Labs is an R&D company offering design solutions and services in the wired and wireless communication fields, catering to defense, aerospace, and space-grade products. It has deep expertise in the design of protocol analyzers/exercisers for PCIe, CXL, MIPI, Ethernet, TSN, etc. Thanks to its strong scientific research and innovation, the company holds a niche and strong product portfolio in each operation domain. Job Description: You will be responsible for the design of complex micro-architecture optimized for specific FPGA applications. Integrating FPGA designs with other hardware and software components within a larger system. Conducting the feasibility of the FPGA solutions for a given application. Desired Skills and Experience: Experience in Logic design/micro-architecture / RTL coding is a must. Expertise in VHDL/Verilog/SV is a must. Optimize FPGA designs for speed, power consumption, and resource utilization. Board bring-up and integration with SW and HW components. Understanding of protocols PCIe/USB/Ethernet/ Wireless Communication etc. Hands-on experience in Multi Clock designs, Asynchronous interface To Apply: Please share your resume on anjali.sharma@qbitlabs.co.in with the details requested below- Notice Period- Current Location- Permanent Location- Current/ Last CTC- Expected CTC- Total Experience- Relevant Experience- Are you serving Notice Period? If Yes- what's the last working day- Any offer in Hand? Preferred Location(Gurugram or Hyderabad)- Experience: 3 to 5 Years Job Domain: Telecommunication wired and wireless Job Type: Permanent Job Location: Gurugram/ Hyderabad Company: Qbit Labs Private Limited

Urgent Opening for Canvendor! Hiring: Design Verification Engineer (5+ Years Experience) | Bangalore, Hyderabad, Pune | Immediate Joiners Preferred Location: Bangalore, Hyderabad, Pune, India Experience: 5+ Years Notice period: Immediate to 30days Skills Highlighted: System Verilog, Verilog, UVM, AMBA, SOC, IP / ARM Cortex Key Requirements(IP Verification): Extensive experience in executing IP verification or subsystem verification of complex blocks or SOC verification. Excellent in System Verilog (SV), Universal Verification Methodology (UVM), test bench component development, assertions, testbenches, test plans, and coverage. Strong experience in verifying Fabric/NOC/Interconnect blocks. Knowledge of protocols such as AMBA suite (AXI/ACE), PCIe, CXL, interrupt handling, and power management. Experience or knowledge of coherent traffic verification is a plus. Key Requirements(ARM): Strong experience in ARM based SOC and ARM based SS level Design verification Must have worked on ARM based SOC viz Cortex A or M series based SOC Experience in Multi-processor based ARM cpu is plus Coresight Debug knowledge coresight is plus. Strong debug skills with AXI/AHB/APB, memory, and NoC components. Strong work experience in AMBA AXI/AHB protocol based NOC , Strong skills/Proficiency in SystemVerilog, UVM Strong work experience (Advanced skills ) in SV-UVM and/or C based verification. Working knowledge in TB/Checker/SB development is plus. Must possess strong SV/UVM debugging Proficiency in C/C++ modelling. Work Experience or Strong knowledge in Memory SS verification - LPDDR5/LPDDR4/DDR protocols or HBM is plus Work experience in PCIe/CXL and other similar complex protocol like Ethernet is plus If interested kindly share your updated CV to irfanai@canvendor.com Please reach out to this number for more details: +91 95855 44407 (message only)

Job Specs : We are seeking a highly skilled and motivated ASIC Verification Engineer to join the offshore development teams of our group companies. You will work with the rapidly expanding team which focuses on the research and development of ASIC Verification IPs for Silicon Lifecycle Management, driving innovation and excellence in chip design and verification. You will work alongside a talented and dedicated group of engineers, all committed to pushing the boundaries of technology and delivering top-notch solutions to our customers. Work Location : Bangalore, Pune. Malaysia, Singapore Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering Visa / work permit sponsored for immediate hires Expertise in ASIC SOC verification Expertise in PCie Expertise in UVM, System Verilog and constrained random testing. Expertise in testbench architecture and SOC-level verification strategies. Expertise with protocols such as AXI, AHB, APB, USB, or DDR. Expertise with simulation tools like Synopsys VCS, Cadence Xcelium, or Mentor Questa. Familiar with waveform debugging tools such as Verdi or DVE. Working knowledge of low-power verification (UPF) and DFT / scan concepts. Knowledge of scripting languages (Python, Perl, TCL) for automation. Good understanding of SoC architecture, including CPU subsystems, memory hierarchy, and peripherals. Job Specs : Develop and maintain full-chip verification environments using SystemVerilog UVM methodology. Define and execute test plans for SoC-level functionality, power intent (UPF), coherency, performance and interconnect protocols (e.g., AXI/ACE). Work closely with the RTL, DV, and integration teams to ensure complete coverage of functional and architectural features. Implement and manage stimulus generators, scoreboards, monitors, and checkers at full-chip level. Perform debugging, waveform analysis, and triage of failures in RTL simulations. Ensure code coverage and functional coverage goals are met and signoff criteria are satisfied. Collaborate with firmware/software and post-silicon teams to align verification efforts and resolve issues. Participate in formal verification, assertion-based verification, and low-power simulations. Support regression testing, issue tracking, and coverage closure. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.