Bengaluru, Manipal
INR 14.0 - 24.0 Lacs P.A.
Work from Office
Full Time
Title : AMS Verification Engineer Location : Manipal/Bangalore Experience : 5 - 15 Years Salary : As per the Industry Key Responsibilities: Basic understanding of analog / mixed signal circuits ( like op-amps, amplifiers, current mirrors, LDO, ADC .. etc ). Understand the usage of cadence tools like Xcellium, Spectre, Simvision .. etc. Writing Verilog, Verilog-A/MS, Real Number Models. Develop/Use SV, UVM based Verification flows Understand metric based Verification closure using Code and Functional coverage Good scripting skills using perl, python is a plus. Must possess good communication, debugging skills and ability to work well in a team
Bengaluru
INR 12.0 - 24.0 Lacs P.A.
Work from Office
Full Time
Responsibilities: Should have good understanding of SoC design flow Hands-on expertise in writing RTL in Verilog and System Verilog (optional VHDL) language, SoC level RTL integration ,Linting, CDC checks, STA ,constraints, UPF
Bengaluru
INR 15.0 - 22.5 Lacs P.A.
Work from Office
Full Time
IP/SOC Verification ,Design & Verification Failure Debugging Skills Verilog, System Verilog, & UVM Functional Coverage Development, & Coverage Closure PCIe, Ethernet, CXL, USB, CAN, LIN, FlexRay, AXI, AHB, APB Concepts in Digital Design
Bengaluru
INR 15.0 - 30.0 Lacs P.A.
Work from Office
Full Time
HW Physical Design macros with Innovus and ICC2 tools. block implementation such as floorplanning, placement, clock tree synthesis, routing and optimization. signoff closure related fixes and runs ,formal verification and physical verification.
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