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46 Job openings at Alphawave Semi
Senior Engineer II Analog Design

Pune, Maharashtra, India

0 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What You'll Do: Development of Interface and Analog IPs for internal ASIC or external customers Hands on experience of Hard Analog or PHY blocks on circuit design in latest finfet nodes like 16nm and 7nm Drive the processes for solid IP Development methodology to ensure success with customers Ability to support multiple customers and IP Deliveries Strong knowledge in all aspects of integration of IP related to e.g. logic design and verification, physical design, packaging, test and characterization. What You'll Need: Minimum 6 years of experience in the IP Design and delivery of complex analog, mixed signal IPs or PHYs. Previous experience in DDR, HBM, SerDes is preferred. Min Educational Qualifications: Master’s Degree or equivalent in Electronics and Computer Engineering. PhD Preferred. Expert knowledge of the complete ASIC and IP development life cycle Desire hands-on engineering experience involving a significant part of the ASIC/IP development flow Excellent verbal and written communication and influencing/negotiation skills, including in direct customer and vendor engagements "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Diversity & Inclusivity Alphawave Semi is based out of one of the most diverse countries in the world. This includes differences related to race, ethnicity, national origin, gender, gender expression and presentation, sexual orientation, religion, age, ability and socioeconomic status. To us, diversity is one our strongest assets to our organization. We commit ourselves to promoting the recognition and appreciation of our diverse and rich culture. We believe that it is critical to our success to promote freedom of thought and opinion in a respectful environment. The decisions we make are rooted by respectfully considering each other’s thoughts and opinions and by working towards a greater common goal. Accommodation Alphawave Semi is an equal opportunity employer and welcomes applications from all qualified individuals, including visible minorities, Indigenous People, and persons with disabilities. We welcome and encourage applications from people with disabilities. If as a qualified job applicant, you request accommodation, Alphawave Semi will consult with you to provide reasonable accommodations according to your specific needs. If you wish to make a request, you will be provided an opportunity if you’re applications is selected to proceed in our hiring process. Show more Show less

Senior Engineer I - Software

Pune, Maharashtra, India

0 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What you'll do: Gather requirements, study designs, develop device interface functions and turn small building blocks into higher level firmware system design Work with diverse teams to come up with the detailed bring up and validation requirements, collaborating with Analog Design, ASIC / Digital Design, Digital Verification and software engineers to meet performance goals Participate in design reviews Develop architecture documents and design specifications Translate bring up and validation requirements into efficient C/C++ firmware code Oversee the entire firmware lifecycle for UCIe chiplets, from pre-silicon design to post-silicon validation and optimization Develop for test and debug to help guide hardware design decisions for future product iterations Develop test cases that can be run in an automated regression Stay up-to-date with the latest trends and advancements in the UCIe standard, semiconductor industry, and incorporate relevant innovations into our processes Mentor junior engineers, promote team building, and work toward continuous improvement in processes and techniques Debug and cause, document and issues (i.e. low level SW, silicon, HW, etc.) to closure, review waveforms and RTL to fix sequencing issues Demonstrate full ownership of assigned systems/components. Handle timelines and resolve project challenges to meet program timing Work with external vendors or customers to ensure requirements are met and releases are of high quality You will report to Director - Software What You'll Need BS in Computer Science/Electrical/Computer engineering or a related field Proficient in C/C++ and Python 5+ years of experience with embedded systems like ARM, RISCV, MIPS, etc and programming skills. Experience with low-level programming on bare metal, BIOS/UEFI firmware, linux kernel, RTOS, device driver. Familiarity with industry-standard EDA tools and methodologies used for digital verification Familiarity with hardware description languages (HDLs) such as Verilog and System Verilog Experience with SerDes, Ethernet or PCIe products and communication systems Hands-on experience in the lab with CPU, SoC, FPGA, MCU, and DSP component validation and developing tests and debug tools Knowledge of peripherals/protocols such as 1G/10G Ethernet, DDR, I2C, SPI/QSPI, PCIe, USB, NVME, etc. Bring up and diagnostics experience with high speed signals Experience creating error monitoring and Board/Interface configuration APIs Fluent with a variety of bring-up tools, like oscilloscope, JTAG debugger, I2C/SPI tools, etc. Experience creating system documentation, Stay informed about relevant technology trends and developments and confront technical challenges "Hybrid work environment " As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Diversity & Inclusivity Alphawave Semi is based in one of the most diverse countries in the world. This includes differences related to race, ethnicity, national origin, gender, gender expression and presentation, sexual orientation, religion, age, ability and socioeconomic status. To us, diversity is one of our strongest assets to our organization. We commit ourselves to promoting the recognition and appreciation of our diverse and rich culture. We believe it is critical to our success to promote freedom of thought and opinion in a respectful environment. Our decisions are rooted in respectfully considering each other’s thoughts and opinions and working towards a greater common goal. Accommodation Alphawave Semi is an equal opportunity employer and welcomes applications from all qualified individuals, including visible minorities, Indigenous People, and persons with disabilities. We welcome and encourage applications from people with disabilities. If, as a qualified job applicant, you request an accommodation, Alphawave Semi will consult with you to provide reasonable accommodations according to your specific needs. If you wish to make a request, you will be provided an opportunity if you’re application is selected to proceed in our hiring process. Show more Show less

Engineer II- ASIC Design

Bengaluru

5 - 10 years

INR 15.0 - 17.0 Lacs P.A.

Work from Office

Full Time

The Opportunity Were looking for the Wavemakers of tomorrow. What Youll Do Will be responsible for verification of IP, Block, or Subsystem at Soc Level Generate appropriate documentation for verification Responsible for analyzing/debugging given blocks/tasks in verification Should be able to develop and own the verification environment, verification components developed You will report to Lead Engineer What Youll Need: 5+ years of experience with a Bachelors/ masters degree in the field of Electrical, Electronics, or computer engineering Should have a good understanding of verification flow, challenges, and requirements of functional verification Have worked on IP level or Block level or SoC level functional verification Experience with digital verification aspects such as constrained random verification, functional coverage, code coverage, assertions, methodology philosophy Expert in System Verilog, Verilog, and OVM/UVM verification methodology Have working experience on AMBA interface protocols (AXI, AHB, APB) Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must Hands-on experience on working one or more of the following protocols is a must - UART, I2C, SPI, QSPI, I3C, eMMC, CAN, Hands-on experience working with one or more of the following protocols is desired - PCIe, USB, DDR, LPDDR, GBE, SATA Experience with Perl, Python or similar scripting languages will be helpful Ability to adapt learn, quickly and willingness to proactively take on responsibilities beyond the job description to accomplish team goals. We have a flexible work environment to support and help employees thrive in personal and professional capacities As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Staff Engineer - RTL Design

Pune, Maharashtra, India

8 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for experienced RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and contribute to the complete ASIC development cycle, from concept to product. As an RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. What You'll Do: Micro architect and RTL Design of SoC SubSystem/IP blocks Will develop UPF and run CLP checks Will be responsible for RTL quality checks - Lint/CDC/LEC Create appropriate documentation for hardware blocks. Responsible for analyse / debug / fixing issues reported by verification team Will develop the synthesis constraints for the blocks / subsystem Work with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementation What You'll Need: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 8+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 8+ years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Senior Engineer - RTL Design

Pune, Maharashtra, India

5 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for talented RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and engage in the complete ASIC development cycle, from concept to product. As an RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. What You'll Do: Micro architect and RTL Design of SoC SubSystem/IP blocks Will develop UPF and run CLP checks Will be responsible for RTL quality checks - Lint/CDC/LEC Create appropriate documentation for hardware blocks. Responsible for analyse / debug / fixing issues reported by verification team Will develop the synthesis constraints for the blocks / subsystem Work with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementation What You'll Need: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 5+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 5+ years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Principal Engineer - RTL Design

Pune, Maharashtra, India

15 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for experienced RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and engage in the complete ASIC development cycle, from concept to product. We are seeking a seasoned SoC leads to work with a team to solve complex problems while optimizing performance, area, and power on leading-edge SoC systems. This team helps build new and innovative connectivity products tailored to world changing solutions for AI accelerators, Compute, IO, and Memory Chiplets. What You'll Do: You will manage the design / RTL team to achieve the project goals You will work with customer, provide technical support and provide collaterals agreed upon. You will work with team to achieve flow, methodology improvements to achieve high reuse. You will work with IP vendors to generate / get right configurations of the IP. You will manage teamwork allocation, schedule, risk mitigation and deliverables from design team. Interact closely with the architecture team and develop implementation strategies to meet quality, schedule, and power performance area for the SOC. Interact with the subsystem team and plan SOC milestones, plan quality checks as part of SOC milestones and guide subsystem teams with SOC level requirements (e.g., IPXACT, CSR, Lint, CDC, SDC, UPF, etc.). Work with the cross-functional team of verification, DFT, Physical Design, emulation, and software teams to make design decisions and represent Design status throughout the development process. What you'll have: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 15+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 15+years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Senior Engineer I - CAD Automation

Bengaluru, Karnataka, India

2 - 5 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What You'll Do : Responsible for PDK evaluation, setup, customization, and flows definition Drive and implement specific Custom Design Automation flows such as Schematic entry, Layout design - color aware and DPT/MPT Parasitic Extraction for transistor level flow Device Modeling and Simulation environment in Synopsys' Custom Compiler PrimeSim XA circuit simulators Knowledge and hands-on experience in physical verification – DRC, LVS, and DFM checks Knowledge of Electrical verification like EMIR, ERC, PERC Knowledge of Analog cell characterization Knowledge of Reliability Verification Drive Interfacing between Digital and Analog/Mixed signal methodologies. . Develop Custom flows automation, rule deck customizations, improve productivity and efficiency. Train, Deployment and support of Automation flows to Design teams Debug flow issues and testcases from Design teams for Simulation, LVS, DRC, EMIR, post layout simulation. Assist Tape outs, final chip finishing runs, interface across foundry/customer for rulesets You will be reporting to Manager IP Modelling Team. What You'll Need: Must have a minimum Bachelor's degree in Electronic Engineering or a related program Must have 2 to 5 years of work experience in a CAD Automation engineer role. Experience with different Technology nodes (7nm, 5nm, 4nm, 3nm, etc) Experience with the different foundries (TSMC, SAMSUNG, etc) and design techniques. Good to have: Good knowledge of Analog/Mixed-signal Design and Development in Synopsys/Cadence Design environment. Good knowledge of EDA Tools and Methodologies in Analog/Mixed Signal Design and Development. Experience with standards and formats like Spice, CDL, LEF, DEF, Verilog, SPEF, GDS, OA, LIB, etc. Good knowledge of scripting skills – TCL, Python, C-Shell scripts, PERL, etc. Good knowledge of Data management aspects using Git/ SVN/ICManage / Cliosoft / Perforce / Methodics / etc. Good knowledge of 14nm/10nm/7nm/5nm/4nm/3nm finfet technologies Good knowledge of Deep Submicron Issues/technologies ( Understanding of Job submission and monitoring is a plus Understanding of tool License features and license administration is a plus ''We have a flexible work environment to support and help employees thrive in personal and professional capacities” As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Senior Manager - RTL Design and Microarchitecture

Bengaluru, Karnataka, India

14 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for experienced RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and contribute to the complete ASIC development cycle, from concept to product. As an RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. What You'll Do : Micro architect and RTL Design of SoC SubSystem/IP blocks Will develop UPF and run CLP checks Will be responsible for RTL quality checks - Lint/CDC/LEC Create appropriate documentation for hardware blocks. Responsible for analyse / debug / fixing issues reported by verification team Will develop the synthesis constraints for the blocks / subsystem Work with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementation What You'll Need: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 14+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 14+ years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Senior Engineer - RTL Design

Pune, Bengaluru

3 - 7 years

INR 6.0 - 9.0 Lacs P.A.

Work from Office

Full Time

As an RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. What Youll Do: Micro architect and RTL Design of SoC SubSystem/IP blocks Will develop UPF and run CLP checks Will be responsible for RTL quality checks - Lint/CDC/LEC Create appropriate documentation for hardware blocks. Responsible for analyse / debug / fixing issues reported by verification team Will develop the synthesis constraints for the blocks / subsystem Work with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementation What Youll Need: Education: Bachelors or masters degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 5+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 5+ years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication Leadership: Strong leadership and communication skills to ensure effective program execution.

Principal Engineer - RTL Design

Pune, Bengaluru

15 - 20 years

INR 15.0 - 17.0 Lacs P.A.

Work from Office

Full Time

The Opportunity Were looking for the Wavemakers of tomorrow. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for experienced RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and engage in the complete ASIC development cycle, from concept to product. We are seeking a seasoned SoC leads to work with a team to solve complex problems while optimizing performance, area, and power on leading-edge SoC systems. This team helps build new and innovative connectivity products tailored to world changing solutions for AI accelerators, Compute, IO, and Memory Chiplets. What Youll Do: You will manage the design / RTL team to achieve the project goals You will work with customer, provide technical support and provide collaterals agreed upon. You will work with team to achieve flow, methodology improvements to achieve high reuse. You will work with IP vendors to generate / get right configurations of the IP. You will manage teamwork allocation, schedule, risk mitigation and deliverables from design team. Interact closely with the architecture team and develop implementation strategies to meet quality, schedule, and power performance area for the SOC. Interact with the subsystem team and plan SOC milestones, plan quality checks as part of SOC milestones and guide subsystem teams with SOC level requirements (e.g., IPXACT, CSR, Lint, CDC, SDC, UPF, etc.). Work with the cross-functional team of verification, DFT, Physical Design, emulation, and software teams to make design decisions and represent Design status throughout the development process. What youll have: Education: Bachelors or masters degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 15+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 15+years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Staff Engineer I - Analog Design

Bengaluru

8 - 13 years

INR 25.0 - 30.0 Lacs P.A.

Work from Office

Full Time

The Opportunity Were looking for the Wavemakers of tomorrow. What You ll Do SERDES sub-block design and technical leadership for clocking, TX, RX etc Define Block-level architecture and circuit topologies to meet system spec Circuit Design and simulation across PVT and sign off quality matrix to meet specs Mentor the junior designers and support them in problem solving Support .lib generation and Verilog modelling for block owned and validate with schematic Custom Layout guidelines and post-layout simulations Documentation, Review and Signoff on design What You ll Need Minimum 8+ years of experience in Analog circuit design from a reputed product-based company Previous experience of leading analog engineering design teams is must Experience in dual patterning FinFET design in in TSMC 3nm, 5nm etc Experience designing circuit at 56+ Gbps speed Understanding of device basics and physics High-speed Driver and Receiver designs, PLL design with solid system understanding BTech/MTech/MS in VLSI from a reputed university "We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Senior Engineer I - ASIC Design

Bengaluru

3 - 7 years

INR 7.0 - 10.0 Lacs P.A.

Work from Office

Full Time

Alphawave Semi is looking for Senior Engineer I - ASIC Design to join our dynamic team and embark on a rewarding career journey. Analyze and assess problems. Apply quality principles and methodology in processes to enhance output. Assess new product designs to meet project and product requirements. Create engineering designs. Identify the design needs of clients. Manage disputes and conflicts. Manage product design and development to meet project and product requirements. Oversee Workplace Safety and Health Systems (WSH) for the company.

Senior Engineer II - VLSI

Bengaluru

5 - 7 years

INR 7.0 - 11.0 Lacs P.A.

Work from Office

Full Time

The Opportunity Were looking for the Wavemakers of tomorrow. What Youll do: Responsible for front end implementation of IPs which includes Synthesis, LEC, CLP. Collaborate with designers and PNR teams to achieve design closure with focus on Quality Ability to debug and resolve technical issues. Hands on functional ECO generation using Candence conformal LEC Should be able to provide good support to Gate level simulations (GLS) team Overall, should have good knowledge on RTL so as to understand all synthesis related warnings. What Youll Need: 5-7 years experience in physical aware synthesis. Self-motivated complete understanding of timing constraints, low power aspects and concepts of DFT Experienced in synthesis, LEC, CLP and timing closure Should have handled blocks with complex designs, multiple high frequency clocks and complex clocking. scripting and automation experience is a must. We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Lead - Physical Verification

Bengaluru

10 - 15 years

INR 7.0 - 11.0 Lacs P.A.

Work from Office

Full Time

The Opportunity Were looking for the Wavemakers of tomorrow. What Youll do: Implementation with emphasis on Physical Verification project finishing/tapeout activities Own and execute Physical Verification flow with in-depth experience in analysing and debugging DRC, ERC, LVS, DFM, Antenna, PERC, and Rule deck issues ( Calibre/ICV ) Own and execute PV activities at the block and sub-system levels Work closely with PD team in addressing PV issues and provide solutions Contribute to SoC-level PV sign-off checks What Youll Need: 10+ years of Physical verification experience Experience with physical verification checks - DRC, LVS, Antenna, ERC, PERC, ESD etc. using Calibre/ICV Excellent debugging skills and experience with fixing base DRC, metal DRC, especially w.r.t. double/triple patterning layers in advanced process nodes Hands-on experience in DRC/LVS fixing in Innovus/Fusion Compiler environment is a must Good hands-on LVS/antenna debug/fixes along with exposure to runtime reduction techniques Good understanding and hands-on scripting skills in Unix, Perl, Python, SVRF and Tcl to enable high-quality and on-time tapeouts Good understanding of full chip integration and flows is a plus We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Senior Staff Engineer - Physical Design

Bengaluru

12 - 17 years

INR 6.0 - 10.0 Lacs P.A.

Work from Office

Full Time

The Opportunity Were looking for the Wavemakers of tomorrow. What Youll Do: Perform hands-on physical design and physical verification tasks across projects in advanced process nodes. Manage project-specific ASIC development flow setup and maintenance. Physical design tasks include floor-planning, place and route, CTS, timing closure, IR/EM analysis, and LEC for block level and full chip flat/hierarchical designs. Coordinate full chip physical design and verification activities. Physical verification tasks include creating setup and scripts for DRC, LVS, DFM, Antenna and density checks, report generation, analysis, debugging, and implementing fixes in the physical design database. Ensure correct IP and pad-ring integration in block and flat designs. Mentor junior PD/PV team members and oversee their tasks. You will be reporting to ASIC Design Director. What Youll Need: Minimum 12+ Years of experience in ASIC/ SoC Physical Design. Skills - have working experience in advanced FinFET node designs. Experience with Cadence PnR/STA tools and Calibre; good scripting/automation skills is a must. Education - B. Tech /M. Tech in Electronics Engineering. "We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Senior Engineer I - DFT

Pune, Maharashtra, India

4 - 6 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Role Summary: As a DFT Engineer at Alphawave Semi, you'll be responsible for implementing and verifying Design-for-Test (DFT) solutions throughout the custom silicon lifecycle. You'll collaborate closely with RTL, Physical Design, and Test teams. What you'll do: Develop and implement comprehensive DFT architectures, collaborating on early planning stages. Implement scan and MBIST using industry-standard EDA tools. Develop and execute DFT verification plans (pattern generation, fault simulation). Collaborate with cross-functional teams to resolve DFT-related issues. Document DFT architecture and verification results. What you'll need: Proven experience with scan and MBIST insertion. Solid understanding of DFT architecture, timing, and verification. BTech/MTech in EE or related field , 4 - 6 years DFT experience. Nice to have Experience driving DFT implementation on large designs. Familiarity with advanced DFT techniques (e.g. In-system test, SSN, multi-die testing). Silicon debug experience related to DFT. Tool and methodology development related to DFT. '' We have a flexible work environment to support and help employees thrive in personal and professional capacities " As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Silicon Validation Engineer

Pune, Maharashtra, India

2 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. About The Job The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow's future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What You'll Do: Design and execute firmware and test plans and tests. Increase efficiency through automation and application of appropriate scripting, tools, and innovation Use source control tools/techniques and maintain software development and release processes. Develop production-quality software, including testing, documentation, static analysis, and CI/CD/CT What You'll Need: 2+ years of experience as a Software Engineer B.E/B. Tech, or M.E/M. Tech/M.S. (Electronics/Electronics and Communication/Computer Science) Proficiency in C/C++ and Python Excellent knowledge in low-level firmware/ BareMetal HW/IP driver writing. Exposure to Silicon Bring up Silicon Validation In-depth understanding of HW is must Exposure to firmware optimizations Exposure to emulation/virtualization platform e.g. Zebu/Palladium Knowledge of how to use embedded development tools such as JTAG and associated debug tools Work experience on ARM Cortex platform/ MIPS/RISC-V CPUs. Work Experience with FPGAs based platforms is plus "We have a flexible work environment to support and help employees excel in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Silicon Application Engineer

Bengaluru, Karnataka, India

1 - 3 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. As an Alphawave Semi, Applications Engineer, you will provide 1st line technical support to customers designing with our chips (IP's). You will provide responses in configuring Alphawave Products into the customer's designs. You will also engage with internal R&D team to provide customer application specific expertise to improve our product offerings. What You'll Do Be part of the IPG Application Engineering team. You will work closely with IP Design (RTL and Synthesis), Design Verification, Design Implementation, Firmware and Post-Silicon Validation teams. As an AW-AE you will have to perform RTL simulation, design verification and look at synthesis/timing reports, backend collateral quality. Be able to write DV test cases in SV or C. Diagnose, debug, and resolve customers issues during integration, simulation, implementation, timing closure, and silicon bring up. Review Data Sheets, Product Briefs, User guides and Application notes and address specific issues pertaining to them for customer. Occasional travel may be required. What You'll Need Bachelor's and/or master's degree in electrical and/or Electronic Engineering, Computer Engineering or Computer Science Minimum of 1-3 years relevant IP &/or ASIC experience which can include mixed signal circuit design OR front-end design, synthesis, static timing analysis, formal verification, design verification and/or silicon validation. Domain knowledge of one the following interface protocols: UCIe, PCIe, Ethernet, HBM, DDR, or CXL. It'd Be Amazing If You Had Working experience with Serdes or Memory Links in similar design environment. Working Experience with ethernet controller/PCIE controller. Have flair for both digital and analog mixed signal designs. Working experience with industry standard simulators, timing analysis, firmware, hardware debug. Experience creating API-C test cases/DPI-C functions for configuring registers. About You Experienced to contribute technically. Flexible to work in different field of expertise, not limited to just one domain in VLSI design. Customer focused. Experience communicating updates and resolutions to customers and other partners. Appreciate ideas and opinions that differ from yours. '' We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Engineer I -ASIC Design

Bengaluru, Karnataka, India

0 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Senior Compensation and Benefits Analyst

Bengaluru, Karnataka, India

8 - 10 years

Not disclosed

On-site

Full Time

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. The Senior Compensation and Benefits Analyst will be responsible for supporting various compensation and benefits program implementation across countries in Asia. This role is required to have in-depth hands-on experience in working on strategizing compensation and benefits practices aligning with local and company requirements. What You'll do: Conduct regular market benchmarking and salary surveys to ensure compensation structures are and aligned with regional trends and regulations. Lead and manage cross-functional projects related to compensation, benefits across global teams. Develop, review, and update compensation policies and benefits programs, ensuring compliance with local laws and regulations in the assigned regions. Provide data-driven insights and reports on compensation and benefit metrics, pay equity, and benefit utilization to senior leadership. Use analytics to drive decision-making and recommendations for improvement. Act as the subject matter expert (SME) in compensation and benefits for internal stakeholders, delivering regarding compensation policies, benefits programs, and salary reviews. Build a consultative and collaborative relationship with HR Business Partners, Talent Acquisition, and business leaders to provide comprehensive support and counsel on all compensation related activities, such as strategic new hire offers, promotions, international transfers, budget allocation, top talent, and retention Ensure adherence to local labor laws and regulations, managing any changes or updates to compensation or benefits plans in each region. Work closely with HR, finance, legal, and other cross-functional teams to ensure alignment and successful implementation of compensation programs. Continuously assess and recommend process improvements within the compensation and benefits function to enhance efficiency, accuracy, and employee satisfaction, while supporting and driving consistency and alignment of programs globally, to reflect the overal company's rewards philosophy. What You'll Need: 8 to10 years' experience in compensation and benefits functions in the technology industry with a strong focus on international compensation, essentially, India, China, Taiwan and Korea. Added knowledge of Europe and Israel will be an advantage. Understanding of principles of all components of comepnsation and benefits, including base pay, variable pay, long term incentives and benefits administration Advanced proficiency in excel with ability to analyze data and identify trends and make recommendations Experience with Workday Advanced Compensation module will be an added benefit Ability to multitask and on multiple projects ensuring deliverables are achieved within define timelines. ' ' We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

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