Senior Engineer II - VLSI

Job Description

The Opportunity Were looking for the Wavemakers of tomorrow. What Youll do: Responsible for front end implementation of IPs which includes Synthesis, LEC, CLP. Collaborate with designers and PNR teams to achieve design closure with focus on Quality Ability to debug and resolve technical issues. Hands on functional ECO generation using Candence conformal LEC Should be able to provide good support to Gate level simulations (GLS) team Overall, should have good knowledge on RTL so as to understand all synthesis related warnings. What Youll Need: 5-7 years experience in physical aware synthesis. Self-motivated complete understanding of timing constraints, low power aspects and concepts of DFT Experienced in synthesis, LEC, CLP and timing closure Should have handled blocks with complex designs, multiple high frequency clocks and complex clocking. scripting and automation experience is a must. We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.