665 Pcie Jobs - Page 14

Role & responsibilities Test bench development and debug UVM/C based test case development and debug. Power aware test case development and debug External/Internal VIP based test development and debug. Mixed-signal block modelling and RNM based testing. Coverage analysis (code, functional, assertion) Verification plan reviews, Verification reviews Back-annotated netlist simulation execution and debug Debug failing cases & Coverage improvements.

About the Role Skills: Strong in IP / SoC-level verification Responsibilities Proficient in testbench and testcase development (SystemVerilog/UVM preferred) Clear understanding of verification plans, coverage metrics, and debugging Experience: 5+ years in Design Verification Required Skills Strong in IP / SoC-level verification Proficient in testbench and testcase development (SystemVerilog/UVM preferred) Clear understanding of verification plans, coverage metrics, and debugging Availability: Immediate to within 4 weeks

Looking for PCB layout design Engineers with the following requirements: Hands-on experience in complex, high-density, high-speed PCBs, Analog, Digital, RF, mixed-signal PCB layout design. Hands-on experience with High-speed interfaces like DDR3,DDR4, LPDDR, , PROCESSORS, FPGA, PCIE, USB, SATA, MIL-1553, ADC, DAC, ETHERNET, NAND & NOR FLASH, SD, RS-422, BLUETOOTH 4.0, WIFI, GPS, GSM etc. Hands on Complex layout HDI designs with multiple BGAs and Multiple Fine pitch BGA (0.8mm and 0.5mm) of high pin count (2084 pins). Library creation as per IPC 7351 standard. Electrical Constrains setup for high-speed modules to match its requirement (Length match, impedance, delay tuning requirements) Experience in Power supply layout design types: AC to DC, DC to DC converters and SMPS. Creation of file type conversions from PCB to DXF, IDF, Step file Power supply layout designs & its critical requirements to meet stringent isolations. Gerber validation and generations of final deliverables for DFM. Working experience on Gerber viewers using Cam350, ODB++ viewer. Collaborating with multiple functional teams like design, SI/PI, mechanical, DFM, DFA etc. in a product development environment knowledge on Power dc, Thermal design, simulation and analysis knowledge of OrCAD schematic Design Tool Collaboration with cross functional teams: Software, Electrical, Mechanical and PCB CAD teams Hands-on experience with Cadence Allegro/Altium EDA/PADS tools is essential. Educational Qualification: B Tech/M. tech/BE/ME, Diploma Location: Hyderabad Shift: General Exp.: 4-6 Years Work Week: Monday to Friday

Role & responsibilities Please interested candidate send me cv : galeiah.g@honeybeetechsolutions.com call me :7995220108. Client Name: Proxelera Industry: SEMICON Position Name SoC NoC Verification Engineer Job No : PROX-14080 Position type: Permanent Total Exp: 7+ years to 15y HBTS Budget: Open Notice Period: Immediate to 15days Work Location: Bangalore Job Description Must have: SoC NoC Verification Engineer with 7+ years of experience This role involves developing test plans, writing verification code, debugging issues, and collaborating with design teams to validate complex interconnect systems. Key Responsibilities Develop and execute verification plans for SoC and NoC architectures. Write and maintain test benches using SystemVerilog/UVM. Perform functional, performance, and power verification. Debug and resolve design and verification issues. Work with high-speed interconnect protocols (AXI, CHI, PCIe, Ethernet, CXL, UCIe). Work closely with design and architecture teams to ensure compliance with specifications. Client is looking for Network on chip , just look for the NoC verification AMD (Dont Share AMD Profiles) Preferred candidate profile

Responsibilities Understand the standards/specifications Architecture development and documenting implementation level details Hands on work for every aspect of verification cycle Responsible for the compliance with the latest Methodologies. Developing Verification IPs Define Functional Coverage matrix and Comprehensive Test plan Regression management and functional coverage closure DUT integration and verification for IP delivery sign-off Leading small team Person Specification Required Skills Hands-on experience of complete verification cycle with strong verification concepts Strong knowledge of Verilog, SystemVerilog and UVM Experience in UVM based Verification IP development Experience in AMBA AXI/AHB/APB System buses Hands on work experience on any of PCIe/Eth/USB/DDR etc. Hands on experience with System Verilog Assertions Scripting for automation, release process, simulations, regressions Good command over written and oral communication Desirable Skills Lead the Verification IP development with 2 or more junior engineers Exposure to full verification cycle Desired Skills and Experience DV Engineer, Design Verification, Verification Engineer

Role & responsibilities 7+ years of design verification experience. MS (or higher) in EE/EC/ECC Engineering As a member of the Design Verification [ Pre-Silicon DV ] Team for client WCS/SCE BU You will be responsible for verification of various IPs and/or SoC. Candidate must be self-motivated and capable of working independently or as part of a team You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals. You will also assist with developing test-plans, debugging failures and analyzing coverage information. Must have excellent knowledge of computer architecture and design verification fundamentals Must have experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies Must have experience in developing complex test bench in System Verilog using OVM/ UVM methodology Hands-on experience in AMBA protocol, PCIe MAC, USB MAC, Bluetooth MAC, Wifi 802.11 MAC layer protocol Experience in Low Power Simulation/UPF setup, debug low power simulation failures. Exposure to scripting languages like Perl, Unix shell or similar languages Good to have some experience with assembly language programming required Excellent written and oral communication skills necessary

Required Skills : Very good C programming and Linux skills. Good to have experience in embedded/automotive software and/or driver development on ARM SoCs on Linux/Android etc Good to have multi-threaded programming experience. Good at Linux System programming. Good understanding of Linux OS concepts and Linux Kernel internals. Awareness of RTOS operating system fundamentals / processor architecture /embedded system and microprocessor concepts. Familiarity with parallel-processing concepts such as threads, signals, priorities, semaphores, mutexes, race-conditions, deadlocks, etc. Experience with scripting languages (Python, Shell scripts) Implement Tools and Test applications to enable and streamline testing process. Contribute in pre-silicon and post-silicon bring-up of future chipsets. Good system debugging skills and root cause analysis. Excellent Linux kernel debugging skills with ability to Find the exact root cause. Experience in using debugging tools like Lauterbach, Trace tools and the ability to use Oscilloscope and Protocol Analysers Good understating of working debug tools like JTAG/TRACE. Strong analytical and problem-solving skills Should be a good team-player and easy to work with various stake holders. Good to have experience dev ops tools like Git/Perforce/Gerrit/Code Collab etc.. Candidate should be familiar in understanding the peripheral hardware, Device Data sheets, Schematics, Specification and Reference manual. Good understanding of communication protocols (SPI, I2C, UART) Knowledge on LDO/SMPS, Crystals/Clocks, Battery charging and Fuel gauge Drivers design and development on multiprocessor and multithreaded ASIC platforms. Preferably good understanding about ARM32/64 chipset architecture. good to have experience working in Linux USB/HSIC/PCIe Core drivers. Working knowledge of any of the peripheral Linux drivers areas such as: DMA, PMIC, USB, PCIe, HSIC Good to have experience with at least one Peripherals like.. USB/Ethernet/PCIe/I2C/SPI etc on Linux/Android Good to have experience on storage domain like SCSI, UFS, NAND, NOR on Linux/Android Prior experience with Android is a plus Education Requirements: B. Tech / M. Tech (ECE / CSE) Experience: 2 to 6 Years Location: Hyderabad & Bangalore Shift: General Work Week: Monday to Friday

Looking for PCB layout design Engineer with the following requirements: Hands-on experience in complex, high-density, high-speed PCBs, Analog, Digital, RF, mixed-signal PCB layout design. Exposure with complex 2U, 3U server form factor-based PCB designs. Hands-on experience with High-speed interfaces like DDR3,DDR4/5, LPDDR, , PROCESSORS, FPGA, PCIE, USB, SATA, MIL-1553, ADC, DAC, ETHERNET, NAND & NOR FLASH, SD, RS-422, BLUETOOTH 4.0, WIFI, GPS, GSM etc. Hands on Complex layout HDI designs with multiple BGAs and Multiple Fine pitch BGA (0.8mm and 0.5mm) of high pin count (2084 pins). Library creation as per IPC 7351 standard. Electrical Constraints setup for high-speed modules to match its requirement (Length match, impedance, delay tuning requirements) Experience in Power supply layout design types: AC to DC, DC to DC converters and SMPS. Creation of file type conversions from PCB to DXF, IDF, Step file collaboration with Mechanical Engineer. Power supply layout designs & its critical requirements to meet stringent isolations. Gerber validation and generations of final deliverables for DFM. Working experience on Gerber viewers using Cam350, ODB++ viewer. Collaborating with multiple functional teams like design, SI/PI, mechanical, DFM, DFA etc. in a product development environment knowledge on Power dc, Thermal design, simulation and analysis knowledge of OrCAD schematic Design Tool Collaboration with cross functional teams: Software, Electrical, Mechanical and PCB CAD teams Hands-on experience with Cadence Allegro/Altium EDA/PADS tools is essential. Education Requirements: B. Tech/B.E./M. Tech./M.E. Shift: 9:30 AM to 6:30 PM Work Mode: Office (Monday to Friday)

Principal / Senior Systems Performance Engineer Micron Data Center and Client Workload Engineering in Hyderabad, India, is seeking a senior/principal engineer to join our dynamic team. The successful candidate will primarily contribute to the ML development, ML DevOps, HBM program in the data center by analyzing how AI/ML workloads perform on the latest MU-HBM, Micron main memory, expansion memory and near memory (HBM/LP) solutions, conduct competitive analysis, showcase the benefits that workloads see with MU-HBM s capacity / bandwidth / thermals, contribute to marketing collateral, and extract AI/ML workload traces to help optimize future HBM designs. Job Responsibilities: The Job Responsibilities include but are not limited to the following: Design, implement, and maintain scalable & reliable ML infrastructure and pipelines. Collaborate with data scientists and ML engineers to deploy machine learning models into production environments. Automate and optimize ML workflows, including data preprocessing, model training, evaluation, and deployment. Monitor and manage the performance, reliability, and scalability of ML systems. Troubleshoot and resolve issues related to ML infrastructure and deployments. Implement and manage distributed training and inference solutions to enhance model performance and scalability. Utilize DeepSpeed, TensorRT, vLLM for optimizing and accelerating AI inference and training processes. Understand key care abouts when it comes to ML models such as: transformer architectures, precision, quantization, distillation, attention span & KV cache, MoE, etc. Build workload memory access traces from AI models. Study system balance ratios for DRAM to HBM in terms of capacity and bandwidth to understand and model TCO. Study data movement between CPU, GPU and the associated memory subsystems (DDR, HBM) in heterogeneous system architectures via connectivity such as PCIe/NVLINK/Infinity Fabric to understand the bottlenecks in data movement for different workloads. Develop an automated testing framework through scripting. Customer engagements and conference presentations to showcase findings and develop whitepapers. Requirements: Strong programming skills in Python and familiarity with ML frameworks such as TensorFlow, PyTorch, or scikit-learn. Experience in data preparation: cleaning, splitting, and transforming data for training, validation, and testing. Proficiency in model training and development: creating and training machine learning models. Expertise in model evaluation: testing models to assess their performance. Skills in model deployment: launching server, live inference, batched inference Experience with AI inference and distributed training techniques. Strong foundation in GPU and CPU processor architecture Familiarity with and knowledge of server system memory (DRAM) Strong experience with benchmarking and performance analysis Strong software development skills using leading scripting, programming languages and technologies (Python, CUDA, C, C++) Familiarity with PCIe and NVLINK connectivity Preferred Qualifications: Experience in quickly building AI workflows: building pipelines and model workflows to design, deploy, and manage consistent model delivery. Ability to easily deploy models anywhere: using managed endpoints to deploy models and workflows across accessible CPU and GPU machines. Understanding of MLOps: the overarching concept covering the core tools, processes, and best practices for end-to-end machine learning system development and operations in production. Knowledge of GenAIOps: extending MLOps to develop and operationalize generative AI solutions, including the management of and interaction with a foundation model. Familiarity with LLMOps: focused specifically on developing and productionizing LLM-based solutions. Experience with RAGOps: focusing on the delivery and operation of RAGs, considered the ultimate reference architecture for generative AI and LLMs. Data management: collect, ingest, store, process, and label data for training and evaluation. Configure role-based access control; dataset search, browsing, and exploration; data provenance tracking, data logging, dataset versioning, metadata indexing, data quality validation, dataset cards, and dashboards for data visualization. Workflow and pipeline management: work with cloud resources or a local workstation; connect data preparation, model training, model evaluation, model optimization, and model deployment steps into an end-to-end automated and scalable workflow combining data and compute. Model management: train, evaluate, and optimize models for production; store and version models along with their model cards in a centralized model registry; assess model risks, and ensure compliance with standards. Experiment management and observability: track and compare different machine learning model experiments, including changes in training data, models, and hyperparameters. Automatically search the space of possible model architectures and hyperparameters for a given model architecture; analyze model performance during inference, monitor model inputs and outputs for concept drift. Synthetic data management: extend data management with a new native generative AI capability. Generate synthetic training data through domain randomization to increase transfer learning capabilities. Declaratively define and generate edge cases to evaluate, validate, and certify model accuracy and robustness. Embedding management: represent data samples of any modality as dense multi-dimensional embedding vectors; generate, store, and version embeddings in a vector database. Visualize embeddings for improvised exploration. Find relevant contextual information through vector similarity search for RAGs. Education: Bachelor s or higher (with 12+ years of experience) in Computer Science or related field. AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidates true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

JOB DESCRIPTION : Experience in verification of coherent protocols like ARMs ACE/CHI and Network-on-chip (NoC) Experience in ARM or x86 assembly language programming Prior experience in CPU or other IP verification Food allowance Health insurance Annual bonus

Synaptics is looking for a Principal Digital Engineer, WLAN MAC to join our dynamic and growing WPD organization. You will be responsible for MAC architecture / design / implementation in the Wi-Fi 6/7 for IoT market. You will provide technical expertise in the latest design methodologies. You will provide expertise in Wi-Fi domain. Your responsibility includes coordinating with multiple teams on specification for design, architecture, timing closure. This position reports to the Director, Silicon Engineering. Responsibilities & Competencies Job Duties Define WiFi MAC architecture from Standard Technically lead team on design, methodology Design optimization, enhancement to cater to the need of power and area target Guide and lead the team through digital design, RTL implementation, Lint, CDC checks, timing closure, verification and coverage closure, ECO implementation and chip productization debug Work with Systems/SW team in performance analysis and propose IP enhancements Collaborate with DV team on test plans, closure of code, and functional coverage Support post-silicon bring up activities of the products working with design, product evaluation and applications engineering team Competencies Strong Digital design and Wireless technology fundamentals Conversant with Wifi 802.11 Standard, networking protocol like L3/L4 protocol Strong fundamentals in CPU architecture, Host interfaces like (PCIe, SDIO, UART etc.), Bus interconnects specially AXI/ACE/AHB/APB. Knowledge in Lint, CDC, timing constraints, synthesis, power analysis Ability to communicate complex, interactive design concepts clearly Proactive, self-starter, able to work independently in a fast-paced environment to complete projects on time with minimal guidance Well organized with strong attention to detail; proactively ensures work is accurate Positive attitude and work ethic; unafraid to ask questions and explore new ideas Resourceful and able to solve complex problems through adaptation of existing technology and investigation of new technology with a solid understanding of product architecture Analytical and able to make informed decisions based on experience Sets clear expectations and objectives, and brings parties together to drive key initiatives Ability to work within a diverse team and mentor developing team members Excellent verbal and written communication Qualifications (Requirements) Bachelors or masters degree in computer engineering, Communication, Electrical/Electronic Engineering or related field or equivalent 12+ years of experience in IP design Proven experience in designing digital circuits for wireless product Understanding of digital IC design flow (design, verification, synthesis, HW/SW co-working) Familiar with at least one of the followings: Wi-Fi, Bluetooth, MAC architecture, and Security engine architecture Experience with tapeout of new product No travel required

We are looking for a skilled Senior Process Manager to join our team at eClerx Services Ltd., with 6-9 years of experience in the IT Services & Consulting industry. The ideal candidate will have a strong background in process management and improvement, with excellent analytical and problem-solving skills. Roles and Responsibility Develop and implement process improvements to increase efficiency and productivity. Manage and maintain existing processes, ensuring they are up-to-date and compliant with industry standards. Collaborate with cross-functional teams to identify areas for improvement and develop solutions. Analyze data and metrics to measure process performance and make informed decisions. Implement change management strategies to ensure successful adoption of new processes. Provide training and support to team members on new processes and procedures. Job Requirements Strong understanding of process management principles and methodologies. Excellent analytical, problem-solving, and communication skills. Ability to work effectively in a fast-paced environment and prioritize multiple tasks. Experience with process improvement tools and techniques, such as Lean or Six Sigma. Strong leadership and team management skills, with the ability to motivate and guide team members. Familiarity with industry-specific regulations and standards, such as HIPAA or PCI-DSS.

Min 10 yrs of R&D experience in FPGA development (Altera, Xilinx) Experience of RTL languages - VHDL or Verilog Xilinx FPGA Tools Design Flow - Vivado, Chipscope, Quartus. EDA Functional Simulation tools – Synopsys or Mentor or Cadence.

We are hiring a ASIC Verification Engineer to help contribute to rapidly expanding and innovative chip designs in both 7nm and 5nm process technologies. We are developing cutting-edge domain specific processors for the IAAS and smart-switch markets that leverage the P4 programming language to provide software-defined features and scale but with hard-wired performance attributes. Applications include advanced PCIe, networking, storage, and security virtualization services for both the public and private cloud markets. THE ROLE: In this role, you will be responsible for defining test strategies and plans, developing test benches and test cases, and debugging designs helping with micro-architecture. You will participate in design verification methodology definition as we'll as contribute to design verification infrastructure that facilitates maximum re-use of components, improves productivity, and guarantees to the maximum extent possible, bug-free designs. Your work and skills will be leveraged across module-level, full chip, emulation, prototyping, silicon bring-up, manufacturing diagnostics, compilers, and shipping platform software. KEY RESPONSIBILITIES: With your solid knowledge and understanding of Computer Architecture you will be: Developing and executing test plans for Unit/IP/Subsystem/ SOC level verification System Verilog test bench development including stimulus, checkers, transactors/BFMs, assertions and cover points Identifying bugs in architecture, functionality and performance with strong overall debug and analytical skills PREFERRED EXPERIENCE: Languages and tools: UVM, System Verilog, C or C++ System Verilog simulators and waveform debuggers Experience developing and executing test plans for Unit/IP/Subsystem/ SOC level verification Experience in System Verilog test bench development including stimulus, checkers, transactors/BFMs, assertions and cover points Experience identifying bugs in architecture, functionality and performance with strong overall debug and analytical skills Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy/DVE) Solid knowledge and understanding of Computer Architecture Excellent debugging and problem-solving skills ACADEMIC CREDENTIALS: BSEE or equivalent. MSEE preferred

Senior Design Verification Engineer - InSemi Tech Senior Design Verification Engineer Bangalore & Hyderabad | 5+ Years Key Responsibilities: Expertise in SOC/IP verification Expertise in System Verilog Coding Experience in OVM/UVM/methodology Working environment in APB/AHB/AXI/PCIe/DDR protocol Experience in Test Bench Development Understanding in Gate Level simulation/debug

Experience: - 5 to 12 years experience in hands on firmware development. - Strong with C language programming - Good understanding and experience with BIOS, power management and PCIe - Strong knowledge of UEFI BIOS, ACPI. AGESA knowledge is a big plus - Strong knowledge of platform BIOS development - Good knowledge SoC power management CPU/Device power states, hot-plug etc - Firmware development & release process understanding - Prior experience working with firmware design & development - OS/ Drivers/Software stack understanding is a plus - Excellent communication and articulation skills Academic credentials: - Bachelors degree in computer science engineering from reputed college - Masters degree from reputed university is a big plus.

Technical Expertise - Solid understanding of computer architecture and digital systems RTL code for IP, sub-systems, and SoCs. - Proficiency in hardware description languages (HDLs) such as Verilog or system Verilog -Experience in building emulation model builds from scratch for SoC components - Familiarity with emulation platforms and tools (e.g., Cadence Palladium, Mentor Graphics, Synopsys ZeBu). including model compilation, test execution, and debugging - Knowledge of FPGA (Field-Programmable Gate Array) technology, including synthesis, implementation, and debugging. - Experience in setting up and configuring emulation environments. - Ability to manage emulation servers, clusters, and resources effectively. - Knowledge of software tools used in conjunction with emulation (debuggers, performance analyzers, test automation frameworks). - Ability to develop and execute verification plans specific to emulation environments - Protocol knowledge of peripherals: Proficient in Arm CPU cores and PCIe Gen4/5, JTAG, SPI, UART, I2C, USB2.0, USB3.0, Display Port, HDMI, Ethernet 1G/2,5G/5G/10G - Experience in XTOR Integration and a hands on experience on Speedbridges and Vrtual Bridges is a plus. Scripting and Automation - Proficiency in scripting languages Unix, Python, Perl, Tcl for automation of emulation tasks, test case generation, and results analysis. - Experience in developing automated flows for regression testing and continuous integration (CI) pipelines.

The right engineer will drive the success of power IP (Intellectual Property) and features in AMD (Advanced Micro Devices) products through leadership & coordination, resolution of technical dependencies, and achievement of schedule commits. This is a high-visibility and widely multi-functional role, spanning pre-silicon architecture to post-silicon implementation & product delivery. THE PERSON: Your curiosity will drive your learning and innovation to improve how we as a group, and an organization, can get better every day. Your peers will provide you a results-oriented and encouraging environment for your career growth, fueling your opportunity to be a part of Delighting Our Customers. KEY RESPONSIBILITIES: Power Management Firmware Engineer will play key role in ensuring AMD Embedded firmware (Power and Performance Management) addresses critical Embedded market segment (Networking, Storage, Automotive, Thin client) requirements performing the below: Contribute toqards AMD Embedded firmware development for PMFW, DXIO Collaborate with core firmware teams and ensuring Embedded requirements are addressed Coordinate debug of issues and drive them to closure. Work with Platform Firmware Organization (PFO) in conjunction with Embedded segment architects to meet product requirements Review key firmware requirement / enhancement inputs pertaining to focused Embedded markets Provide custom firmware design support for tier-1 customers by with identifying solution and providing design documents Design, develop, test, review features / releases pertaining to PMFW, DXIO firmware Provide low level design documents and user guides Pull together meetings, set up clear agendas and follow up on action items Assist customer support team in addressing any firmware related queries Proactively drive continuous improvement for post-silicon power and performance activities Must be a self-starter, and able to independently drive tasks to completion PREFERRED EXPERIENCE: 9-15 years experience in hands on firmware development. Strong with C language programming Good understanding and experience with BIOS, power management and PCIe Strong knowledge of ACPI , UEFI BIOS, AGESA knowledge is a big plus Good knowledge SoC power management CPU/Device power states, hot-plug etc Firmware development & release process understanding Prior experience working with firmware design & development OS/Drivers/Software stack understanding is a plus Product development or systems engineering background with hardware platforms and their software & firmware ecosystems Excellent verbal communication and written, presentation skills Excellent interpersonal, organizational, analytical, planning, and technical leadership skills Proven record of accomplishment in delivering large multi-functional product solutions Experience working in a fast-paced matrixed technical organization and multi-site environment ACADEMIC CREDENTIALS: bachelors or Masters degree in Computer or Electrical Engineering or equivalent

In depth knowledge and extensive experience with embedded firmware development Expertise in the use of scripting languages, programming tools and environments Extensive experience programming in Python Experience in the storage industry in SSD, HDD, storage systems, or a related technology Understanding of storage interfaces including ideally PCIe/NVMe, SATA, or SAS Experience with NAND flash and other non-volatile storage Ability to work independently with a minimum of day-to-day supervision Experience with team leadership and/or supervising junior engineers and technicians Ability to work in a multi-functional team and under the pressure of multiple priorities

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It s a unique legacy of innovation that s fueled by great technology and amazing people. Today, we re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what s never been done before takes vision, innovation, and the world s best talent. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Are you excited to lead and innovate in a world-class setting? Join us at NVIDIA as a System Software Engineer in Bangalore, and collaborate on brand new embedded computing and artificial intelligence technologies developed around the NVIDIA Platform for AI. Visit us here https://www. nvidia. com / en-in / products / workstations / dgx-spark / to know more. This is your opportunity to be part of a team that is revolutionizing the future of computing with our AI Supercomputer! What you ll be doing: NVIDIA SoC and Board support, including interprocessor communications, CPU architecture, memory management, power, and clock design. Developing and integrating drivers for I/O bus interfaces such as PCIe, I2C, SPI, CAN, GPIO, Wifi, USB3. x, FDI storage, NVME, QSPI, Ethernet. Board Bring-ups and Collaborating with vendors and suppliers to integrate solutions seamlessly. Engaging with the Linux and open-source software communities, working across multiple Linux distributions and processor architectures. Applying GNU GCC Toolchain & Makefiles. Managing bootloaders and complete system boot processes. What we need to see: B. E/B. Tech/MS/M. Tech or PhD in Electronics/Computer Science Engineering. 2+ years of software development experience with a strong emphasis on Linux kernel development. Proven C programming and debugging skills. Familiarity with ARM Architecture. Ability to work effectively in a multi-national, multi-time-zone environment. Deep understanding of computer system architecture and operating systems. Experience with real-time or soft real-time OS and application programming. Dedicated with demonstrated experience bringing a new product to market. Basic scripting knowledge in languages such as Python, Perl, Shell. Excellent communication skills, both verbal and written, and a great teammate. At NVIDIA, you will have the opportunity to work on groundbreaking projects that push the boundaries of technology. If this sounds like the perfect role for you, we d love to hear from you! Widely considered to be one of the technology world s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www. nvidiabenefits. com/

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It s a unique legacy of innovation that s fueled by great technology and amazing people. Today, we re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what s never been done before takes vision, innovation, and the world s best talent. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Are you excited to lead and innovate in a world-class setting? Join us at NVIDIA as a Senior System Software Engineer in Bangalore, and collaborate on brand new embedded computing and artificial intelligence technologies developed around the NVIDIA Platform for AI. Visit us here https://www. nvidia. com / en-in / products / workstations / dgx-spark / to know more. This is your opportunity to be part of a team that is revolutionizing the future of computing with our AI Supercomputer! What you ll be doing: Mastering NVIDIA SoC and Board support, including interprocessor communications, CPU architecture, memory management, power, and clock design. Developing and integrating drivers for I/O bus interfaces such as PCIe, I2C, SPI, CAN, GPIO, Wifi, USB3. x, FDI storage, NVME, QSPI, Ethernet. Board Bring-ups and Collaborating with vendors and suppliers to integrate solutions seamlessly. Engaging with the Linux and open-source software communities, working across multiple Linux distributions and processor architectures. Applying GNU GCC Toolchain & Makefiles. Managing bootloaders and complete system boot processes. What we need to see: B. E/B. Tech/MS/M. Tech or PhD in Electronics/Computer Science Engineering. 5+ years of software development experience with a strong emphasis on Linux kernel development. Proven C programming and debugging skills. Familiarity with ARM Architecture. Ability to work effectively in a multi-national, multi-time-zone environment. Deep understanding of computer system architecture and operating systems. Experience with real-time or soft real-time OS and application programming. Dedicated with demonstrated experience bringing a new product to market. Basic scripting knowledge in languages such as Python, Perl, Shell. Excellent communication skills, both verbal and written, and a great teammate. At NVIDIA, you will have the opportunity to work on groundbreaking projects that push the boundaries of technology. If this sounds like the perfect role for you, we d love to hear from you! Widely considered to be one of the technology world s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www. nvidiabenefits. com/

Key responsibilities: Experienced in all the phases of Hardware Development Life Cycle including requirements analysis, component selection, design, development, testing, and documentation. Vendor coordination for component selection, PCB Fab, and Assembly house. Involved in supporting proto build, pilot build, and mass production. Co-ordinating with Software/firmware team for the board bring-up and successful system integration. Should be capable of preparing the proposal based on customer requirements Should be capable of executing the project from requirement gathering to final product/service deliverables Should be capable of managing 3 to 4 sub-ordinates Responsible for team collaboration, reduce attrition and skills development Should be capable of interacting with other teams and get the work on time Technical Skills: Mandatory requirement on having experience in Microprocessor/Microcontroller based embedded hardware (digital) board design. On-Board Power distribution/management design with DC-DC Switching regulators & LDO. Knowledge in Analog and mixed-signal board design. Development of product in coordinating with PCB and mechanical CAD and review/guidance to Layout Designers for Component logical/mechanical placement, Power Plane creation, and PCB Designing. Mandatory Tools Skills: Cadence OrCAD for schematics, Allegro/Altium experience for PCB board Design review Knowledge of interfaces like MIPI CSI, SD Interface, Ethernet, RGMII, USB, LVDS, GMSL, SPI, UART, I2C etc.., Physical layer level understanding and debugging skill. Preferred skills(Added advantage): Knowledge in PCB layer stack-up, signal integrity, thermal simulation, environmental tests, FCC and EMI/EMC compliance testing

Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based onImplementation means trying, testing, and improving outcomes until a final solution emerges . Knowledge means exchange discussions with colleagues from all over the world. Join our team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation. We make real what matters. This is your role. Questa verification IPs help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will get along with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We dont need superheroes, just super minds. You're an Electronics Engineer ( B.Tech / M.Tech ) or related field from a reputed institute You've got phenomenal knowledge of verification engineering and have between 2 - 8 years of working experience as well. You've sound knowhow of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe , Flash, DIMM etc. You are a great teammate, resilient and sincere, Enjoy learning new things and build knowledge base in new area. Weve got quite a lot to offer. How about you This role is based in" Noida " but " youll get the chance to work with teams impacting entire cities, countries- and the shape of things to come. The pace of innovation in electronics is constantly accelerating. To enable our customers to deliver life-changing innovations to the world faster and to become market leaders, we are committed to delivering the worlds most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services. We, at Siemens EDA enable companies to develop better electronic products faster and more efficiently. Our innovative products and solutions help engineers conquer design challenges in the increasingly sophisticated worlds of board and chip design We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, weve got quite a lot to offer. How about you We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrows idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Looking for Siemens EDA ambassadors We are passionate about innovations that mean real progress, and we are curious about technologies that still need to be developed. Do you want to use curiosity, passion, and creativity to make the lives of millions of people easier and betterJoin us- whichever path you take, were looking forward to seeing your point of view! Veloce Transactors (Accelerated Verification IPs) Veloce Transactor Group is part of Mentor Emulation Division R&D located in Noida. Group develops transactors (RTL based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile etc. At present Veloce Transactor Library supports more than 25 protocol solution and growing further. This is your Role Individual will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology. Primary responsibilities include understanding standard specifications, develop architecture and micro-arch for the design and writing a synthesized design using Verilog/System Verilog. Required Experience: We seek a graduate with at 1-8 years of relevant working experience with (BE/BTech/ME/MTech/MS) from a reputed engineering college. We value your experience on the protocol e.g. PCIe, USB, Ethernet, AMBA in Design or Verification. Good understanding of IP Verification Methodologies, Verification procedures and practices are plus! Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc We value expertise in Verilog, SystemVerilog, and SystemC, as well as experience in developing RTL for FPGAs, ASICs, and IPs, as this will greatly contribute to the quality of our products. We expect candidates to be able to build verification test plans and environments, develop test cases, utilize VIPs, and efficiently debug defects identified during verification processes. We consider exposure to object-oriented programming languages like C++ an advantage, and experience in scripting languages such as Perl will also be valuable in automating tasks and improving efficiency. You need to engage with customers for Deployment and R&D assistance. We've got quite to offer, how about you Join our Digital World We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. At Siemens, we are always challenging ourselves to build a better future. We have some of the most inquisitive minds working across the world, re-imagining the future and doing extraordinary things. #LI-EDA #LI-HYBRID

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, weve got quite a lot to offer. How about you Position Overview Siemens EDA is looking for a highly motivated Product Engineer to help define, promote, and deploy hardware assisted acceleration with Veloce emulation and prototyping solutions at leading edge semiconductor and systems customers. As a hardware-assisted verification solutions expert you will be part of the world-wide Veloce experts team working with emulation and prototyping solutions for pre and post silicon validation, verification and software bring-up of industrys most complex SoC and FPGA designs using the latest advances in co-emulation technologies with Veloce Transactor Layer (VTL) transactors and testbenches. Key responsibilities Assist applications engineers (AEs) and customers with integration and debug of verification solutions to enable Testbench acceleration in a hardware-assisted verification environment Support PCIe, AMBA-based, UART, and serial protocol (SPI, I2C, ") transactors targeting emulation and prototype platforms. Build or support example designs for solutions that use SystemC or UVM transactors. Drive Veloce technology at various customers using hands-on technical expertise. Requires working directly with customers to ensure technical results are met. Promote technical customer service to build and improve customer relationships, ensuring long term customer happiness. Work closely with the sales team in a focused strategy to expand our business. Provide feedback and product ideas to our solutions product development teams. Troubleshoot and remove technical obstacles. Work very closely with all team member to ensure full customer happiness. Develop and deliver technical presentations/trainings on new features and product updates. Communicate customers' technical requirements to product marketing. Develop a network of technical relationships at a peer-to-peer level with our customers. Use complex design and tooling tasks involving multiple design environments. Cogently communicate software problems to product development. Assists other specialists in the design, development, and implementation of large-scale solutions on multiple software products and hardware platforms. Provides business and technical feedback to software and hardware vendors. Use advanced data exchange methodologies to facilitate effective data sharing between dissimilar systems or applications that span across engineering disciplines. Responsible for in-depth technical papers and presentations to customer management or at technical conferences. Guide junior engineers. Work with minimal direction on complex projects with latitude for independent judgment and discretion. Well skilled with broad proficiency. Required Qualifications We seek a graduate (Bachelor's) with 5+ years of related experience or post graduate (Master's) with 3+ years of proven track record. Familiarity with Verilog/SystemVerilog or SystemC and UVM Must have experience with emulation of large scale CPU, GPU or Systems-on-Chip (MPSoC) designs, emulation technologies, usages and industry approaches. Prior experience in a customer facing function such as application engineer from an emulation or prototype systems provider a plus! We've got a lot to offer, how about you A collection of over 377,000 minds building the future, one day at a time in over 200 countries. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! #LI-EDA #LI-HYBRID