Posted:22 hours ago|
Platform:
On-site
Full Time
🚀 We’re Hiring – Senior/Lead Design Verification Engineer! Immediate Joiners Preferred! 🚀
Coventine Digital Private Limited is seeking an experienced Design Verification Engineer to work with our top-tier client in Siruseri, Chennai! This Work from Office role is a chance to lead and shape next-gen chip-level verification environments using System Verilog and UVM methodologies.
🔹 Position: Senior / Lead Design Verification Engineer
📍 Location: Siruseri, Chennai (Work from Office Only)
📅 Experience: 6 – 10 Years
💼 Mode: Permanent
✨ Key Responsibilities & Must-Have Skills:
✔️ Functional verification at both block and chip levels for complex desig
ns ✔️ Verification test plan development from detailed design s
pecs ✔️ Build UVM-based simulation environments using System V
erilog ✔️ Coverage analysis to validate comp
leteness ✔️ Assertion-based verification to ensure functional
robustness ✔️ Working with RAL to validate register-lev
el behaviors ✔️ Cross-functional collaboration to align design and verificat
ion milestones ✔️ Testbench creation for simulation and perform
ance ef
ficiency📨 Ready to make your mark in chip-level verification? Send your resume to 👉 Venkatesh@coventine.com or
DM me d
irectly! #Hiring #DesignVerification #SystemVerilog #UVM #ChipDesign #ASICVerification #VerificationEngineer #ChennaiJobs #HardwareDesign #CareerGrowth #Rec
ruitmentCoventine Digital Private Limited
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