2375 Dft Jobs - Page 41

: Arm s Solutions group DFT team implements DFT for test-chips and hard-macros to prove Arms soft IP power, performance, area, and functionality within the context of a SoC using the latest DFT techniques and process technologies. We closely collaborate with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE. Responsibilities: Architect, Implement, and validate innovative DFT techniques on test-chips and hard-macros. Insert DFT logic into SoC-style designs at the RTL level and at the Synthesis gate level, validate all features, an...

Responsibilities As a creative design engineer with a knowledge of subsystems and SoCs you will be part team developing Subsystems & SoCs. You will work with Architects to capture the requirements and develop Micro-architecture specifications for one or more SOC areas such as Power Management, Boot, Debug, Clocks, Resets, DDR, RAS, Security, Access Control, Die to Die etc. Key responsibilities will include writing micro-architecture and work with Design team to deliver high quality RTL. Collaborate with verification and Validation team to review test plans, and help debug design issues. Closely work with the Power and Performance analysis team to evaluate and improve Subsystem/SOC PPA. Contr...

If you are passionate about pushing the boundaries of Design technology and thrive in a collaborative, dynamic environment, we invite you to join our team as a Design Engineer. Join us to be part of our journey in shaping the future of SoC design and innovation. Responsibilities As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team integrating IP and developing logic for SoCs. You will work with the project team to understand and review the architecture and develop the design specifications. Your key responsibilities will include writing micro-architecture specifications, developing the RTL, fixing bugs and running various design checks. You will wo...

About Marvell . Your Team, Your Impact This position is with ASIC design physical implementation (PD) team part of Central Engineering business unit at Marvell, Bangalore. This team as part of global Implementation team that plays a key role in Netlist to GDS implementation, covering Synthesis, P&R, Timing, PV and Power implementation all custom ASICs for all the OEM s. We are looking for strong technical leaders in the domain of physical design having Full-Chip implementation experience on hierarchical designs using industry standard tools. #LI-LP1 What You Can Expect Should be able to independently handle every aspect of physical design. Should be able to direct junior engineers into execu...

PMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Computing and Graphics Group, you will help bring to life cutting-edge designs. You will lead a front-end design and integration team, working closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. THE PERSON: The ideal candidate will have experience leading a team to develop RTL for SoC subsystems and understand architectural specifications. Responsibilities include IP and subsystem design, integrating multiple IPs, performing quality checks and working collaboratively with the IP/SoC team. KEY RESPONSIBLITIES: Design of IP and subsystems with integration of AMD a...

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Job Overview Arm s DFT methodology team works on DFT flows and methodology for projects, including soft IP, hard macros, SOCs and physical library IP across all the Arm design sites. In addition, this team builds and drives DFT methodology and flows throughout all of Arm and works to get support from EDA vendors to support our methodologies. Responsibilities: Support DFT on multiple types of projects in multiple design centers and apply innovative DFT techniques and affect the content of forthcoming CPU, GPU, ML and systems IP, SOCs some years before they appear in mainstream products. This candidate will contribute to DFT methodology by crafting flows, evaluating tool capabilities, helping ...

Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation. Required Skills and Experience : This role is for a Senior Principal DFT Engineer with proven ability in Design for Test Experience coding Verilog RTL, TCL a...

As a part of in Arms Solutions Engineering group we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools and build the knowledge base that makes custom SoC and CPU chip design possible. Responsibilities: Timing analysis and closure responsibilities at SoC level as well as block/subsystem level Review of timing QOR at every execution milestones and supervising to meet required guideline for smoother closure ECO planning, generation and tracking to closure by collabor...

Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation. Required Skills and Experience : This role is for a Principal DFT Engineer with proven ability in Design for Test Experience coding Verilog RTL, TCL and/or P...

In Arms Solutions Engineering group, our primary focus extends beyond the development of advanced System-on-Chips (SoCs). In the endeavour to deliver a quality silicon we need to ensure all our signoff checks across various domains are diligently performed. Delivering quality silicon leads to quality rewards and every effort and skill is recognized and appreciated at ARM. Our responsibilities also encompass improvising methodologies, influencing EDA tools and build a knowledge base which will help in our product design. Learning and sharing knowledge is part of ARM culture and is very much appreciated and encouraged. If your interested in working with a team of collaborative and smart engine...

As part of the methodology team, you will be responsible for developing and leading sophisticated power estimation and optimization methodologies at the netlist (gate-level) stage across SoC and IP designs. You will drive correlation strategies, automation flows, and accuracy improvements to ensure power estimates are tightly aligned with final silicon behavior. This role requires deep technical expertise in power analysis tools, a strong understanding of low-power design techniques, and collaboration with multi-functional teams across the design and verification cycle. Responsibilities: Define and drive netlist-level power estimation methodologies using industry-leading tools (e.g., Synopsy...

In Arms Solutions Engineering group, our primary focus extends beyond the development of advanced System-on-Chips (SoCs). In the endeavor to deliver quality silicon we need to ensure all our sign-off checks across various domains are diligently performed. Delivering quality silicon leads to quality rewards and every effort and skill is recognized and appreciated at ARM. Our responsibilities also encompass improving methodologies, influencing EDA tools and building a knowledge base which will help with our product design. Learning and sharing knowledge is part of ARM culture and is very much appreciated and encouraged. If you re interested in working with a team of collaborative and smart eng...

Development of PCB layouts considering technical requirements, economic aspects as well as specifications and standards for PCB manufacturing Close collaboration with hardware engineering, construction and production as well as with PCB manufacturers Design and optimization of PCB layouts with regard to EMC, thermal management, insulation coordination, etc. Selection of processes and materials for PCB production Optimization of PCB layouts considering production technologies of manufacturers and assembly service providers (DfM) as well as assembly testing (DfT) Execution of design reviews Maintenance and improvement of standards for development and manufacturing documentation in cooperation ...

PCB bring-up, rework & repairs (THT + SMD), quick proto builds Bench debugging with DMM/oscilloscope/logic analyzer Read schematics/PCBs, support basic edits in Altium/KiCad Support test jigs/fixtures, documentation & BOM updates Must-haves: 2-3 years in electronics hardware (R&D/production/test) Solid soldering & hot-air rework skills (0603/QFP/QFN, connectors, etc.) Basic analog/digital design know-how, ESD-safe lab practices Comfortable reading datasheets & using common lab tools

As Logic Lead, you will be responsible for design and development of Compression, Security, and sustainability features for high performance Processors chips. Lead the Development of features - propose enhancements to existing features, new features, architecture in High level design discussions Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW, Research teams to develop the feature Guide and mentor junior engineers. Represent as Design Lead in various forums. Signoff the Pre-silicon Design that meets all the functional, area and timing goals Participate in silicon bring-up and validation of the hardware Estimate the overall effort to dev...

Key Responsibilities: Design and develop multilayer PCBs for MedTech devices using Altium Designer, Eagle, or similartools. Optimize PCB layouts for signal integrity, thermal performance, and reliability. Collaborate with the mechanical design team to ensure compatibility with product form factors. Design and test analog and digital circuits for medical devices. Conduct simulations to validate designs prior to fabrication. Ensure compliance with regulatory standards (e.g., IEC 60601-1 for medical devices). Perform Design for Manufacturability (DFM) and Design for Testability (DFT) checks. Carry out board-level testing, debugging, and troubleshooting. Work closely with cross-function...

Requisition ID: 71262-0 Hardware Development Engineer 5 Duties & Responsibilities As the Lead Hardware Eng, you will be responsible for the electrical design of Multimedia, Medical, Aviation, Consumer and Industrial electronic products. We are looking for candidates who thrive in a fast paced start-up like environment. In your role, you will be the owner of all aspects of EE hardware design, including circuit/board design and validation. To be successful, you need to be highly motivated and detail oriented while showing highest standards of responsibilities. Qualifications Required  BE/B.tech in Electronics and Communication, Electrical and Electronics Engineering  More than 10 years in de...

Requisition ID: 89214-0 This position requires to deploy technical knowledge and leadership skills to enable state-of-the-art electrical designs while meeting program schedule expectations Generate engineering specifications and functional block diagrams for storage and server based designs Generate schematics and oversee PCB layout for storage and server based designs Drive system modeling to create "right the first time" designs Drive design process improvements. Mentor younger engineers and technicians Create intellectual property that sets Viking apart from other storage and server providers Drive fabrication partners to best-in-class performance. Develop product design requirements and ...

Requisition ID: 89212-0 Simulation, design and test of DC-DC regulator circuits Lead the overall power design architecture and topology, in conjunction with System Architects and System Engineers, for server and storage products Drive the DC-DC vendor and technology roadmap for server and storage products Lead the selection of off the shelf AC-DC and DC-DC power supplies for server and storage systems Use your technical knowledge and leadership skills to enable state-of-the-art electrical designs while meeting program schedule expectations Drive system modeling to create "right the first time" designs Drive design process improvements. Mentor younger engineers and technicians Create intellec...

Requisition ID: 89220-0 This position requires to use your technical knowledge to enable state-of-the-art electrical designs while meeting program schedule expectations Schedule tasks and mentor junior engineers and technicians Create intellectual property that sets Viking apart from other server providers Drive fabrication partners to best-in-class performance. Assist in the development of product design requirements and documentation based on product marketing requirements Develop designs that satisfy costs, schedule, functionality, DFT and DFM requirements Participate in design process improvements. Participate as a team member in the complete concept-to-release product development lifecy...

The engineer should be well versed in Verilog/VHDL RTL coding, experienced in using Mentor DfT tools and Cadence tools. The engineer needs to have hands-on experience in scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/SDF. Candidate with LBIST and Mixed Signal Radar IC experience is highly desirable Must be proactive, collaborative and detail-oriented capable of exercising independent judgment The engineer with experience on debug and root cause the problem in simulation failures Self-motivation, flexibility, with strong interpersonal skills. Effective communication skills, oral and written skills. Mandatory Key Skills VHDL,RTL coding,Mentor DfT tools,Caden...

Job Title: Physical Design Engineer Experience: 4+ Years Location: Banglaore/Hyderabad Employment Type: Full-time Industry: Semiconductors / VLSI / ASIC Design Job Summary: We are looking for a skilled and motivated Physical Design Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting performance, power, and area (PPA) optimization and signoff closure. Key Responsibilities: Own block-level or full-chip implementation from RTL to GDSII. Perform: Floorplanning and placement Clock tree synthesis (CTS) Routing and optimization Run and close timing (STA), IR drop, EM, DRC, LVS, and a...

Key Responsibilities: Design and develop multilayer PCBs for MedTech devices using Altium Designer, Eagle, or similartools. Optimize PCB layouts for signal integrity, thermal performance, and reliability. Collaborate with the mechanical design team to ensure compatibility with product form factors. Design and test analog and digital circuits for medical devices. Conduct simulations to validate designs prior to fabrication. Ensure compliance with regulatory standards (e.g., IEC 60601-1 for medical devices). Perform Design for Manufacturability (DFM) and Design for Testability (DFT) checks. Carry out board-level testing, debugging, and troubleshooting. Work closely with cross-function...

ATE Test Engineer with experience in Teradyne- Ultraflex-RF Job Description In your new role you will: Develop and document Test plan for new IoT devices. Design and debug ATE Test Hardware and Software Production & Reliability. Debug new silicon on Automated Test Equipment. Bring quality and cost-effective Test solution for mass production. Oversee test related activities (HW & SW) with both internal and external Test house. Implement Test programs, modify and release into offsite production. Your Profile You are best equipped for this task if you have: Good understanding of semiconductor device fundamentals (Analog/Digital and Circuit Theory) Sound understanding of Semiconductor Design for...