1121 Dft Jobs - Page 40

The Design Methodologies and Tools Engineer / Architect develops and applies Computer Aided Design (CAD) software engineering methods, theories and research techniques in the investigation and solution of technical problems. Assesses architecture and hardware limitations, plans technical projects in the design and development of CAD software. Defines and selects new approaches and implementation of CAD software engineering applications and design specifications and parameters. Develops routines and utility programs. Prepares design specifications, analysis and recommendations for presentation and approval. May specify materials, equipment and supplies required for completion of projects and may evaluate vendor capabilities to provide required products or services. Key Responsibilities Provide technical leadership to define, enable, implement, automate and drive tool/flow/methodology to improve SoC integration efficiency. quality, cost and predictability. Work with architects and design team to understand and continuously improve design process from specification to tapeout. Interface with the architecture, SoC integration, power, Design implementation, Power, Design Verification and Physical design teams to identify complex technical issues/risks and optimize the implementation efficiency and cost. Support the SoC Design and Integration team on project execution. You should be familiar with SoC level Clock and Reset, low power design, UPF, CDC/RDC/LINT, DFT, top level integration of connectivity, system bus, peripherals and processor. We are looking for someone who is technically hands on and a great team player. Preferred Experience Bachelor’s or Master’s degree in related discipline with 15+ years' experience preferred. Outstanding foundation in Systems & SoC architecture, with expertise in one or more of the following: SoC integration, Frontend-design, Design Verification, Design Emulation, System/performance/power modeling, Design handoffs, Design management, Design reuse, CAD/Automation algorithms. Experience analyzing Design and Verification methodologies/flows to identify bottlenecks, left-shift opportunities, and Demonstrated tools/flows/methodologies/automation expertise in SoC integration, Verification, Emulation, low power design, power optimization, Functional Safety, System modeling, Synthesis and anlysis. Experience with scripting in Perl, Python, TCL, and C/C++. Excellent communication and problem solving skills. Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies. The base salary range for this position is as mentioned below per year. We also provide competitive benefits, incentive compensation, and/or equity for certain roles. Company benefits include health. dental, and vision insurance. 401(k), and paid leave. Please note that the base salary range (OR hourly rate) is a guideline, and individual total compensation may vary based on a number of factors such as qualifications, skill level, work location, and other business and organizational needs. This base pay range is specific to California and is not applicable to other locations. A reasonable estimate of the base salary range as of the date of this posting is: $202,900 to $279,000 annually More information about NXP in the United States... NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. Show more Show less

📍 Location: Hyderabad 💼 Experience: 10 to 20+ years 📢 Type: Full-Time | On-site About the Role: We are looking for a highly experienced and visionary Design Verification Leader to head our Full Chip Level Verification team. This is a strategic and hands-on role that will drive verification strategy, planning, execution, and team leadership across complex SoC/ASIC programs. You will work closely with architecture, design, DFT, and post-silicon validation teams to ensure first-pass silicon success, high quality, and on-time delivery. Key Responsibilities: Own and lead full-chip verification strategy, planning, and sign-off for multiple SoC/ASIC programs. Drive development and deployment of UVM-based testbenches , functional coverage, and formal verification strategies. Lead team(s) of engineers across domains, including IP, Sub-system, and SoC level verification. Collaborate with cross-functional stakeholders, including RTL design, DFT, firmware, validation, and architecture teams. Drive verification methodology standardization , automation, and reuse across programs. Deliver high-quality silicon by proactively identifying risks, debugging complex failures, and driving verification closure. Define and manage project schedules, resource allocation , and risk mitigation plans. Provide technical mentorship , performance reviews, and leadership to grow a world-class verification team. Represent the BU in technical reviews, customer discussions, and strategic planning. Required Skills and Experience: 10–20+ years of experience in ASIC/SoC design verification , with at least 5+ years in a leadership/managerial role. Strong hands-on experience with SystemVerilog, UVM, assertions (SVA), and functional coverage . Proven track record in full-chip and sub-system verification of complex SoCs or processors. Deep understanding of verification methodologies, flows, and tools (Synopsys, Cadence, Mentor). Strong debugging skills across simulation, emulation, and silicon bring-up. Experience with low-power verification (UPF), DFT-aware verification , and performance validation is a plus. Working knowledge of scripting (Python, Perl, Tcl) and regression infrastructure. Excellent project management, communication , and team leadership skills . BE/BTech or ME/MTech in Electronics, Electrical, or Computer Engineering. Preferred Qualifications: Experience working with global teams and customer engagements . Exposure to AI/ML, automotive, networking, or mobile SoC domains . Familiarity with formal verification and post-silicon validation techniques. Why Join Us? Lead cutting-edge semiconductor verification programs with global impact. Work with some of the brightest minds in VLSI and SoC development. Opportunity to drive strategy and build high-performance teams . Competitive compensation, leadership exposure, and career growth. Interested? 📧 Send your profile to hemant@sykatiya.com 📄 Let’s connect and explore how you can shape the future of silicon with us. Show more Show less

As a DFT Engineer, you will be responsible for developing and implementing Design for Test methodologies for complex VLSI designs. You will ensure the testability and manufacturability of our products by working closely with design, verification, and physical design teams, Responsibilities: Develop and implement DFT architectures and strategies for complex SoC designs. Insert and verify DFT features such as scan chains, Built-In Self-Test (BIST) for memory and logic, and boundary scan (IEEE 1149.1/1149.6). Perform ATPG (Automatic Test Pattern Generation) and analyze coverage metrics to ensure high fault coverage. Collaborate with RTL designers to ensure seamless integration of DFT features into the design. Debug and resolve test-related issues in simulation, silicon validation, and production. Work closely with the physical design team to implement scan and clock constraints for timing closure. Optimize test time, power, and cost without compromising coverage and quality. Participate in silicon bring-up and post-silicon validation activities. Generate and maintain DFT documentation, including test plans, methodologies, and results. Requirements: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field. 4 to 10 years of experience in DFT for VLSI designs. Strong knowledge of DFT methodologies, including ATPG / MBIST / Scan Insertion Verilog/ System Verilog and scripting languages (Python, TCL, Perl). Solid understanding of STA concepts and constraints related to DFT. Experience in debugging silicon and ATE test patterns. Excellent problem-solving skills and ability to work in a collaborative environment. Familiarity with fault diagnosis and yield improvement methodologies. Exposure to advanced nodes (7nm, 5nm, or below) and FinFET technologies. Knowledge of machine learning or AI techniques for test optimization.

As a DFT Engineer, you will be responsible for developing and implementing Design for Test methodologies for complex VLSI designs. You will ensure the testability and manufacturability of our products by working closely with design, verification, and physical design teams. Responsibilities: Develop and implement DFT architectures and strategies for complex SoC designs. Insert and verify DFT features such as scan chains, Built-In Self-Test (BIST) for memory and logic, and boundary scan (IEEE 1149.1/1149.6). Perform ATPG (Automatic Test Pattern Generation) and analyze coverage metrics to ensure high fault coverage. Collaborate with RTL designers to ensure seamless integration of DFT features into the design. Debug and resolve test-related issues in simulation, silicon validation, and production. Work closely with the physical design team to implement scan and clock constraints for timing closure. Optimize test time, power, and cost without compromising coverage and quality. Participate in silicon bring-up and post-silicon validation activities. Generate and maintain DFT documentation, including test plans, methodologies, and results. Requirements: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field. 4 to 10 years of experience in DFT for VLSI designs. Strong knowledge of DFT methodologies, including ATPG/MBIST/Scan Insertion Verilog/ System Verilog and scripting languages (Python, TCL, Perl). Solid understanding of STA concepts and constraints related to DFT. Experience in debugging silicon and ATE test patterns. Excellent problem-solving skills and ability to work in a collaborative environment. Familiarity with fault diagnosis and yield improvement methodologies. Exposure to advanced nodes (7nm, 5nm, or below) and FinFET technologies. Knowledge of machine learning or AI techniques for test optimization.

Job Summary:-_ Seeking highly motivated, energetic, team-oriented Individual contributor willing to take the challenge of delivering the first pass success of complex IPs using the latest advanced verification languages and methodology. The person would be working with experienced and motivated team of Systems, Design, DFT, Mixed Signal and other local/remote teams to address the verification challenges in the context of the IP, SubSystem, and overall system, through the use of simulation, hardware modeling, formal verification and active participation in pre/post silicon validation. Key Responsibilities Evaluate and deploy the evolving verification methodologies to handle increasingly complex IP/SubSystem designs within aggressive, market-driven schedules. Own and ensure quality adherence during all stages of the project cycle. Ability to carry out a thorough analysis of existing processes, recommend and implement process improvements to ensure ‘Zero Defect’ IPs/SubSystems. Building and Influencing technological innovations for self and in team environment . Hands on and ability to work well as part of a team both locally, and with remote or multi-site teams. KKey Skills Self starter with 10-15 years of experience on IP / Sub-system verification on multimillion Gate and complex Design with multiple clocks with minimal supervision Testbench and Testplan development to ensure thorough functional verification, and performance aspects of the IP along with Features traceability. Experience in microcontroller architecture working with ARM cores, protocols like AHB/AMBA, AXI, Memory (Flash, SRAM,DDR) and memory controllers Experience in domains like automotive Graphics / Vision accelerators, Slow and High Speed Serial IP controllers, Networking protocols like Ethernet, would be an added advantage Must have experience and strong working knowledge of HVLs like (UVM/SV/C++), HDLs (Verilog/VHDL), PLI/DPI, simulators (NCSim/VCS/ModelSim/Questa). Must have experience in end to end IP verification project cycle, including Testbench Strategies, TB development, simulation debugs. Good Exposure to formal verification methodology, assertions/SVA, functional coverage, gate level simulations, verification planner and regression management. Strong ability to drive verification methodologies is a highly desired for 10+ yrs candidates. Exposure to pre silicon validation/emulation is an added advantage. Key Soft Skills Proficient skills in both written and verbal communication. Can articulate well. Has a sense of Ownership and engages everyone with Trust and Respect. Should demonstrate Emotional Intelligence and Leadership values with ability to work well as a part of team both local and remote or multisite Show more Show less

Join Our Aprisa Team! Looking for Siemens EDA ambassadors Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. We Make Real What Matters. This is your role. At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We're excited to be working on the next-generation RTL-to-GDSII solution, and we want YOU to be a part of this innovative journey! This is the Role Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis. Guide and lead others toward successful project completion by innovating and implementing powerful solutions. Collaborate with a hardworking team of experts. Must-Have Requirements B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college with 5-8 years of experience in software development. Validated understanding of C/C++, algorithms, and data structures. Demonstrate excellent problem-solving and analytical skills. Lead and encourage the team with your expertise. Great to Have Experience in: You will have the opportunity to develop RTL synthesis tools and work with System Verilog, VHDL, DFT, formal verification, and Dynamic Power. Additionally, you will design C or RTL IPs and optimize RTL & gate level logic, area, timing, and power. Your experience in developing parallel algorithms and job distribution strategies will be highly valued, as well as your proficiency in using scripting languages like Python and Tcl. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Show more Show less

General Summary: Qualcomm is a leading technology innovator driving next-generation experiences and digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systemsincluding digital, analog, RF, optical circuits, mechanical systems, equipment, packaging, test systems, FPGA, and DSPthat launch cutting-edge, world-class products. You will collaborate closely with cross-functional teams to develop solutions and meet rigorous performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 3+ years of hardware engineering experience OR Master's degree in the relevant field with 2+ years of hardware engineering experience OR PhD in the relevant field with 1+ year of hardware engineering experience Minimum 5+ years experience in Design for Test (DFT), including ATPG, Scan Insertion, MBIST, and JTAG Core Skills & Experience: Deep knowledge of DFT concepts and hands-on experience with scan and MBIST insertion Expertise in ATPG pattern generation and verification, MBIST verification, and post-silicon bring-up and yield analysis Strong skills in defining test mode timing constraints and resolving timing violations with corrective actions Ability to design and analyze tests for new technologies, including custom RAM and RMA Proficient in scripting languages such as Perl and Shell for automation and tooling Experience simulating test vectors to verify test coverage and correctness Familiarity with equivalence checking and RTL lint tools like SpyGlass Ability to thrive in dynamic, international teams and adapt quickly to new tools and methodologies Strong multitasking abilities to manage multiple high-priority design projects simultaneously Excellent problem-solving skills with a proactive, analytical mindset

What You’ll Do "- The role will function as an individual contributor and will be part of Financial Planning & Analysis Team in Pune. The financial analyst will work collaboratively with Finance, Accounting, Business Operations and Senior Management with sites, divisions and throughout the region/segment as required. The Analyst will oversee and execute processes necessary to plan, record, analyze and report on the financial conditions of the Division. This person will also be significantly involved in the development of senior management presentations including Finance, Operations, Marketing and others as necessary. The aim is to provide enhanced data-driven insights into finance function. Professional will also support plant & division in routine financial analysis & reporting as required. Assignments will include planned and ad-hoc projects." "Financial Analysis & Strategy: Deliver Data-Driven Insights: Prepare and present monthly financial results, forecasts, and strategic commentary using advanced analytics. Strategic Planning & Forecasting: Develop scenario-based financial models to support monthly forecasting and annual profit plan, and predictive analytics to improve decision-making. Operational Performance Analytics: Analyze key business metrics using statistical models, forecasting, and cloud-based dashboards. Finance & Data Analytics Transformation Leverage Cloud & BI Tools: Utilize Power BI, SQL, and cloud-based financial systems to create real-time financial dashboards and automate reporting. Financial Data Application and Insights: Work with large datasets across multiple platforms to enable self-service analytics for business leaders. Data Modelling & Visualization: Build predictive models and data visualization frameworks to support strategic finance initiatives. Collaboration with Digital Finance: Work closely with Digital Finance and Innovation team to apply structured financial datasets and analytical solutions to FP&A processes, ensuring business impact. Why You Should Join Us Tech-Driven Finance: Gain hands-on experience with cloud computing, Power BI, data modeling, and financial data-engineering solutions. Global Exposure: Work across diverse markets, applying data-driven insights to real-world financial decisions. Leadership Development: Fast-track your career with exposure to executive decision-making, strategic finance, and digital transformation projects. Innovation & Automation: Be part of a team that values advanced analytics, process automation, and bringing-in business efficiencies by empowering informed decision making." Qualifications "Master in Business Administration- Finance, Mathematics, Statistics, Economics Graduate with core-finance experience Accounting major (B.Com) & CA/ICWA/CFA" Skills 3-5 years of experience – manufacturing industry exposure preferred "- Experience of working on tools like OBIEE, SAP PowerBI Development & SQL Working Knowledge of Business Intelligence Tools –SAP, Oracle, ENCORE, RADAR, DFT" "- Excellent Analytical skills to interpret Financial data Good organizational and time management skills, strong analytical skills and the inter-personal skills to interact with all levels of management. Working knowledge and implementation of Process Improvement tools and methodologies across businesses. Demonstrate the capability to build and maintain productive relationships at all level with key internal clients including business, operations and colleagues Highly motivated individual with excellent oral and written communication skills." ]]> Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Be a member of the team that plays a significant role in ensuring the quality of Connectivity SoCs through structured DFT, Automatic Test Pattern Generation (ATPG) and Memory Built-In Self-Test (MBIST) techniques. Primary Responsibilities Will Include, Interface with design team to ensure DFT design rules and coverages are met. Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques. MBIST verification (including repair), test pattern generation through Mentor tool. ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations. Work with the Product/Test engineering teams on the delivery of manufacturing test patterns for ATE. Responsible for supporting post silicon debug effort, issue resolution. Responsible for Diagnostic Tool generation for ATPG, MBIST and bring-up on ATE. Developing, enhancing and maintaining scripts as necessary Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 1-6 years’ experience in ASIC/DFT – simulation and Silicon validation Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement In depth knowledge and hands-on experience in ATPG - coverage analysis. In depth knowledge of Memory verification, repair and failure root-cause analysis. Experience with any of these tools is required ATPG - TestKompress MBIST - Mentor ETVerify Simulation - VCS (preferred), modelsim. Expertise in scripting languages such as Perl, shell, etc. is an added advantage Ability to work in an international team, dynamic environment with good communication skills Ability to learn and adapt to new tools, methodologies. Ability to do multi-tasking & work on several high priority designs in parallel Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3063979 Show more Show less

What You’ll Do We are seeking a motivated and detail-oriented Financial Analyst to join our Financial Planning & Analysis (FP&A) team in Pune. This role is an excellent opportunity for someone early in their finance career to gain hands-on experience in Financial Planning, Reporting, and Analysis while supporting senior team members "1. Assist in the preparation of routine financial reports and dashboards by gathering and consolidating data from various sources (Finance, Accounting, Business Ops). Support monthly, quarterly, and annual planning processes by updating templates, tracking submissions, and validating data. Help prepare senior management presentations with guidance from the senior analyst and ensure accurate and timely delivery of supporting data and visuals. Perform variance analysis and assist in identifying trends or anomalies in financial performance. Provide support to plant and division-level financial reporting activities and help track KPIs and financial metrics. Participate in ad-hoc analyses and project support as assigned by the senior analyst or FP&A lead." Qualifications "Bachelor in Business Administration- Finance, Mathematics, Statistics, Economics Graduate with core-finance experience Accounting major (B.Com) & CA/ICWA/CFA" Skills 1-3years of experience – manufacturing industry exposure preferred "- Experience of working on tools like OBIEE, SAP PowerBI Development & SQL Working Knowledge of Business Intelligence Tools –SAP, Oracle, ENCORE, RADAR, DFT" "- Excellent Analytical skills to interpret Financial data Good organizational and time management skills, strong analytical skills and the inter-personal skills to interact with all levels of management. Working knowledge and implementation of Process Improvement tools and methodologies across businesses. Demonstrate the capability to build and maintain productive relationships at all level with key internal clients including business, operations and colleagues Highly motivated individual with excellent oral and written communication skills." ]]> Show more Show less

Join Our Aprisa Team! Looking for Siemens EDA ambassadors Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. We Make Real What Matters. This is your role. At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We're excited to be working on the next-generation RTL-to-GDSII solution, and we want YOU to be a part of this innovative journey! This is the Role Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis. Guide and lead others toward successful project completion by innovating and implementing powerful solutions. Collaborate with a hardworking team of experts. Must-Have Requirements B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college with 5- 8 years of experience in software development. Validated understanding of C/C++, algorithms, and data structures. Demonstrate excellent problem-solving and analytical skills. Lead and encourage the team with your expertise. Great to Have Experience in: You will have the opportunity to develop RTL synthesis tools and work with System Verilog, VHDL, DFT, formal verification, and Dynamic Power. Additionally, you will design C or RTL IPs and optimize RTL & gate level logic, area, timing, and power. Your experience in developing parallel algorithms and job distribution strategies will be highly valued, as well as your proficiency in using scripting languages like Python and TCL. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Show more Show less

Job Summary:-_ Seeking highly motivated, energetic, team-oriented Individual Contributor driving roadmaps for IP / SS domain including complete IP portfolio, going deeper into logic design and architecting and developing Complex IPs / Subsystems solutions. Working closely with experienced and motivated team of Global experts in Systems, SoC Design functions to address the design/architectural challenges in the context of the complex IP and overall System level solutions. Work through a wide spectrum of skill from developing High level Specifications to actual design Implementation. Key Responsibilities: Own and drive Roadmaps for complete IP / Subsystem domains portfolio within global R&D team. Perform benchmarks against other industry players and ensure differentiating features for our customer with high level of innovation. Architect and Design complex IP and Subsystems across a range of protocols required for Automotive Self Driving Vehicles (ADAS) both Vision and Radar, In-Vehicle networks, Gateway Systems, Fail Safe Subsystems (ASIL-D) etc. Own and Lead IP / Subsystem from Concept till IP Design and Development achieving final design performance in integrated system within aggressive, market driven schedules. Ensure quality adherence during all stages of the IP development cycle and carry out a thorough analysis of existing processes, recommend and implement the process improvements to ensure ‘Zero Defect’ designs and drive and mentor teams towards that. Key Skills Self starter with 10-14 years of hands-on experience to Architect and Design complex IP design / Sub-system with minimal supervision. Custom Processor Designs with key DSP functions like those needed for Vision and Radar processing. Experience in High Speed Serial protocols and associated high speed challenges on controller and PHY for PCIe, Ethernet & MIPI CSI2. Understanding of key External Memory interface protocols including DDR4 / LPDDR4, QuadSPI Flash interfaces. Experience in microcontroller architecture, Cache, protocols like AHB/AMBA,AXI. Extensive hands on knowledge of HDLs (Verilog/VHDL), Scripting languages (Perl, Tcl), C/C++ for hardware modeling. Understanding of end to end IP development flow including complex CDC, RDC constructs, IP Synthesis, DFT ATPG coverage. Have worked on Testbench and Testplan development closely with the verification team. Hands on work on pre silicon validation using FPGA/Emulation Board would be a significant added advantage. Key Soft Skills Proficient skills in both written and verbal communication. Can articulate well. Has a sense of Ownership and engages everyone with Trust and Respect. Should demonstrate Emotional Intelligence and Leadership values with ability to work well as a part of team both local and remote or multisite Show more Show less

Hello Visionary! We empower our people to stay resilient and relevant in a constantly changing world. We’re looking for people who are always searching for creative ways to grow and learn. People who want to make a real impact, now and in the future. Does that sound like you? Then it seems like you’d make an outstanding addition to our vibrant team. Siemens Mobility is an independent run company of Siemens AG. Its core business includes rail vehicles, rail automation and electrification solutions, turnkey systems, intelligent road traffic technology and related services. In Mobility, we help our customers meet the need for hard-working mobility solutions. We’re making the lives of people who travel easier and more enjoyable while constantly developing new, intelligent mobility solutions! We are looking for Bogie Production (Painter) You’ll make a difference by Welders shall aware MIG/TIG with minimum 3 to 4 years of experience preferably in Heavy Industries, with ITI and NCVT. Should have knowledge of all types of welding positions. Should have knowledge and awareness how to read RT joint film and to rectify the joint in case of any discontinuity. Should have knowledge and awareness how to rectify the welding defects. Should have knowledge and awareness of weld defects and their remedial measures. Ability of reading the drawing of bogies & components for painting. Read and implement masking plans. Assistance when preparing bogies and components. Mixing paints and primers. Operate and monitor the paint pump and conveying systems, as well as the spray guns. Order the daily quantity of required paints for the paint warehouse. Taking masking film off bogies and components. Painting of bogies and components. Controlling bogies and components on and off exhaust m/c working. Recording test values and adherence in test reports. Specification of the required drying times. Awareness of safety policy. Awareness of PPE uses. Awareness of Emergency response at site. Awareness of Safe use of equipment’s. Basic skills for safe work culture. Knowledge of Hazards identified. Knowledge of safety related improvement. Knowledge of crane operation working experience in industry. Knowledge of quality requirements after painting DFT checking visual inspection & adhesion test. Desired Skills: You should have minimum experience of 2 years and ITI (Painting General Trade) +NCVT passed in painting industries. An interest of learning, ability to work in team, analytical ability. Join us and be yourself! We value your unique identity and perspective and are fully committed to providing equitable opportunities and building a workplace that reflects the diversity of society. Come bring your authentic self and create a better tomorrow with us. Make your mark in our exciting world at Siemens. This role is based in Aurangabad. You might be required to visit other locations within India and outside. In return, you'll get the chance to work with teams impacting - and the shape of things to come. We're Siemens. A collection of over 379,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow. Find out more about mobility at: https://new.siemens.com/global/en/products/mobility.html and about Siemens careers at: www.siemens.com/careers Show more Show less

General Summary: Qualcomm is seeking experienced Design Verification (DV) engineers to verify high-performance and low-power CPUs, focusing on power management features including boot, reset, clock gating, power gating, voltage/frequency management, limit management, and throttling. Roles and Responsibilities: Develop and execute comprehensive power management verification plans, collaborating closely with CPU design and verification teams. Use simulation and formal verification methodologies, including writing checkers, assertions, and stimulus generation. Verify power intent with methodologies such as UPF (Unified Power Format). Work with system architects, software, and SoC teams to validate system-level use cases. Collaborate with emulation teams to enable verification on emulators and FPGA platforms. Debug and triage failures occurring in simulation, emulation, or silicon testing. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years experience, OR Master's degree with 3+ years experience, OR PhD with 2+ years experience in Hardware Engineering. Strong experience in power management verification (clock gating, power gating, UPF, DVFS/DCVS, throttling). Skilled in embedded firmware programming with assembly and C language. Proficient in C/C++, scripting languages, Verilog/SystemVerilog. Solid understanding of power management features in CPUs and CPU-based SoCs. Preferred Qualifications: Good understanding of CPU architectures and microarchitectures. Deep knowledge of digital logic design, microprocessor debug features, DFT architecture, and microarchitecture. Experience with advanced verification techniques such as formal verification and assertions. Familiarity with DFT and structural debug methodologies including JTAG, IEEE1500, MBIST, scan dump, and memory dump.

Job Overview: : As a Backend (Physical Design) Principal Engineer specializing in Semiconductor Chip Design, you will lead and coordinate the execution of the back-end stages of integrated circuit development. This role requires a strong technical background in physical design, a deep understanding of semiconductor processes, and exceptional project management skills. You will oversee teams engaged in physical design, synthesis, DFT, place and route, power integrity, and other back-end aspects to ensure the successful realization of semiconductor designs. Additionally, you will oversee product support activities for both Pre-production and Post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs. Required Skills & Experience - Min 8+ years of strong experience in backend flows for MCU or low-power SoC designs. - Ability to lead the DFT teams, Physical and formal Verification Teams. - Exposure to frontend and Analog processes. - Ability to collaborate effectively with frontend and analog teams - Experience in Product Support for both Pre and Post Production Stages, Support for RMA teams. Preferred Skills and Experience - Min 1+ years of Project Management (Waterfall and Agile – Hybrid Methodology). - Continuous Improvement. - Knowledge of industry standards and best practices in semiconductor front-end design. Qualifications: Masters in VLSI design from reputed universities like IIT/NIT with a background in Bachelors in Electronics and Communication, or a related field. Show more Show less

Job Overview: As a Frontend Principal Engineer specializing in Semiconductor Chip Design, you will lead and coordinate the execution of the front-end stages of integrated circuit development. This role requires a strong technical background in digital design, verification, and project management skills. Additionally, you will oversee product support activities for both the Pre-production and Post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs. Required Skills & Experience - Min 8+ years of experience in System Architecture for ARM based MCU product development - Min 8+ years of experience in RTL Design, Coding and RTL Integration, - Strong design and debugging skills. - Experience in handling Verification Teams. Verification environment Development , Static and Dynamic Verification, Test Management. (UPF, GLN, Test Mode) - Experience with industry-standard EDA tools for LINT, CDC, SDC validation, and power analysis preferably Synopsis EDA. - Exposure to Backend and Analog processes. - Ability to collaborate effectively with backend teams (PD, DFT, and STA) to achieve timing and power closure. - Experience in Product Support for both Pre and Post Production Stages, Support for RMA teams. Preferred Skills and Experience - Min 1+ years of Project Management (Waterfall and Agile – Hybrid Methodology). - Continuous Improvement. - Knowledge of industry standards and best practices in semiconductor front-end design. Qualifications: Masters in VLSI design from reputed universities like IIT/NIT with a background in Bachelors in Electronics and Communication, or a related field. Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Collaborates in developing new or modified, high-density, printed circuit boards. Work with Design Engineer and Simulation Engineer in making sure PCB layout adheres to SI/PI requirements. Work on the Layout design for highspeed interfaces like PCIe Gen5/6, Multi-Gigabit serial buses, DDR5/LPDDR5/DIMM and other circuits. Work on the characterization/evaluation and production boards. Create or modify footprints as per guideline and maintain library database. Should work with Fabrication and Assembly house for DFX queries. Should follow process, guidelines, and checklists to produce error free design. Should be able to meet the schedule. Job Description 12 + years of layout design experience in High-Speed Digital Design, Analog, and RF boards. Excellent experience in routing of interfaces like PCIe Gen5/6, Multi-Gigabit serial buses, DDR5/LPDDR5/DIMM, Flash, SPI, I2C and High current switching power supplies Excellent hands-on knowledge of Cadence Allegro PCB design, constraint manager. Excellent knowledge of IPC standards, HDI, back drilling, stack up selection. Excellent experience in design with DFM/DFT/DFA constraints. Hands on experience on CAM350 gerber review tool. Hands on experience on footprint creation and library database maintenance. Good understanding of mechanical 3D model design practice. Ability to work independently with minimal supervision and ability to handle multiple tasks. Ability to work cross-functional along with strong interpersonal and communication skills. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

Primary responsibilities will include , Interfac e with design team to ensure DFT design rules and coverages are met. Generating high quality manufacturing ATPG test patterns for stuck-at (SAF) , transition fault (TDF ) models through the use of on-chip test compression techniques. M BIST verification (including repair), test pattern generation through Mentor tool. ATPG (SAF, TDF) and MBI ST verification using unit delay and min/max timing corner s imulations . Work with the P roduct /Test engineering teams on the delivery of manufacturi ng test patterns for ATE . Responsible for supporting post silicon debug effort, issue resolution . Responsible for Diagnostic Tool generation for ATPG , MBIST and bring-up on ATE. Developing, enhancing and maintaining scripts as necessary Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 1-6 year s experience in ASIC/DFT - simulation and Silicon validation Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement In depth knowledge and hands-on experience in ATPG - coverage analysis. In depth knowledge of Memory verification, repair and failure root-cause analysis. Experience with any of these tools is required ATPG - TestKompress MBIST - Mentor ETVerify Simulation - VCS (preferred), modelsim . Expertise in scripting languages such as Perl , shell, etc. is an added advantage Ability to work in an international team, dynamic environment with good communication skills Ability to learn and adapt to new tools , methodologies. Ability to do multi-tasking & work on several high priority designs in parallel

Interfacewith design team to ensure DFT design rules andcoveragesare met. Generating high quality manufacturingATPGtest patterns for stuck-at(SAF), transition fault(TDF)modelsthrough the use ofon-chip test compression techniques. MBISTverification(including repair),testpattern generation through Mentor tool. ATPG(SAF, TDF)and MBISTverification usingunit delay and min/maxtiming cornersimulations. Workwith the Product/Testengineering teams on the delivery of manufacturing test patterns for ATE. Responsible for supporting postsilicondebug effort, issue resolution. Responsible for Diagnostic Tool generation for ATPG,MBISTand bring-up on ATE. Developing,enhancingandmaintainingscripts as necessary Minimum Qualifications: Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.Minimum of1-6yearsexperiencein ASIC/DFT- simulation andSilicon validation Detailed knowledge on DFT concepts, pattern simulation, Silicon debugand yield enhancement In depthknowledge andhands-onexperience in ATPG-coverage analysis. In depth knowledge of Memory verification,repairand failure root-cause analysis. Experience withany of thesetoolsisrequired ATPG -TestKompress MBIST- MentorETVerify Simulation -VCS(preferred),modelsim. Expertisein scripting languages such asPerl, shell, etc is an addedadvantage Ability to work in an international team, dynamic environmentwithgood communicationskills Ability to learn and adapt to newtools,methodologies. Ability to do multi-tasking & work on several high priority designs in parallel

Job Opportunity: Seeking highly motivated, energetic, team-oriented person driving roadmaps for IP / Subsystem domain including complete IP portfolio, going deeper into logic design and architecting and developing Complex IPs / Subsystems solutions. Working closely with experienced and motivated team of Global experts in Systems, SoC Design functions to lead or address the design/architectural challenges in the context of the complex IP and overall System level solutions. Work through a wide spectrum of skill from developing High level Specifications to actual design Implementation. Key Responsibilities Own and drive Roadmaps for complete IP / Subsystem domains portfolio within global R&D team. Perform benchmarks against other industry players and ensure differentiating features for our customer with high level of innovation. Architect and Design complex IP and Subsystems across a range of protocols required for Edge processing and Automotive Self Driving Vehicles, In-Vehicle experience, Gateway Systems, Fail Safe Subsystems (ASIL-D) etc. Own, Lead an Drive IP / Subsystem from Concept till IP Design and Development achieving final design performance in integrated system within aggressive, market driven schedules. Ensure quality adherence during all stages of the IP development cycle and carry out a thorough analysis of existing processes, recommend and implement the process improvements to ensure ‘Zero Defect’ designs and drive and mentor teams towards that. Own and Drive global IP design methodologies across sites with global stakeholders. Key Skills Self starter with 18+ years of experience to Architect and Design complex IP design / Sub-system with minimal supervision. Custom Processor Designs with key DSP functions like those needed for Vision and Radar processing, Processor Designs like RISC-V Core, Cache based subsystems. Experience in High Speed Serial protocols and associated high speed challenges on controller and PHY for PCIe, Ethernet & MIPI CSI2. Understanding of key External Memory interface protocols including DDR4 / LPDDR4, QuadSPI Flash interfaces. Experience in microcontroller architecture, bus protocols like AHB/AMBA,AXI. Extensive hands on knowledge of HDLs (Verilog/VHDL), Scripting languages (Perl, Tcl), C/C++ for hardware modeling. Understanding of end to end IP development flow including complex CDC, RDC constructs, IP Synthesis, DFT ATPG coverage. Have worked on Testbench and Testplan development closely with the verification team. Hands on work on pre silicon validation using FPGA/Emulation Board would be a significant added advantage. Key Soft Skills Proficient skills in both written and verbal communication. Can articulate well. Has a sense of Ownership and engages everyone with Trust and Respect. Should demonstrate Emotional Intelligence and Leadership values with ability to work well as a part of team both local and remote or multisite. More information about NXP in India... Show more Show less

Job Opportunity: Seeking highly motivated, energetic, team-oriented Individual contributor willing to take the challenge of delivering the first pass success of complex IPs using the latest advanced verification languages and methodology. The person would be working with experienced and motivated team of Systems, Design, DFT, Mixed Signal and other local/remote teams to address the verification challenges in the context of the IP, SubSystem, and overall system, through the use of simulation, hardware modeling, formal verification and active participation in pre/post silicon validation. Key Responsibilities Evaluate and deploy the evolving verification methodologies to handle increasingly complex IP/SubSystem designs within aggressive, market-driven schedules. Own and ensure quality adherence during all stages of the project cycle. Ability to carry out a thorough analysis of existing processes, recommend and implement process improvements to ensure ‘Zero Defect’ IPs/SubSystems. Building and Influencing technological innovations for self and in team environment. Hands on and ability to work well as part of a team both locally, and with remote or multi-site teams. Key Skills Self starter with 10-15 years of experience on IP / Sub-system verification on multimillion Gate and complex Design with multiple clocks with minimal supervision Testbench and Testplan development to ensure thorough functional verification, and performance aspects of the IP along with Features traceability. Experience in microcontroller architecture working with ARM cores, protocols like AHB/AMBA, AXI, Memory (Flash, SRAM,DDR) and memory controllers Experience in domains like automotive Graphics / Vision accelerators, Slow and High Speed Serial IP controllers, Networking protocols like Ethernet, would be an added advantage Must have experience and strong working knowledge of HVLs like (UVM/SV/C++), HDLs (Verilog/VHDL), PLI/DPI, simulators (NCSim/VCS/ModelSim/Questa). Must have experience in end to end IP verification project cycle, including Testbench Strategies, TB development, simulation debugs. Good Exposure to formal verification methodology, assertions/SVA, functional coverage, gate level simulations, verification planner and regression management. Strong ability to drive verification methodologies is a highly desired for 10+ yrs candidates. Exposure to pre silicon validation/emulation is an added advantage. More information about NXP in India... Show more Show less

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Data Center Engineering Business Unit closely collaborates with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. This group provides technology development, EDA/methodology development and IP/Chip design development. India DFT team is a key part of Global DFT community with global ownership and responsibility for delivering generic and more advanced custom DFT architecture solutions, methodology and design. You will be working with this team to directly enable customer DFT requirements for Custom and Compute Businesses. What You Can Expect The position will be responsible for Architecting, Leading and implementing DFT / Test on complex IP and SOC for multiple Custom/Compute ASIC/SoC designs The execution involves Design-for-Test Architecture definition, Implementation of various DFT/DFX features, Validation , IP-DFT, STA, pattern generation & Post-Silicon Bringup and Debug for various designs/IPs in Custom/Compute space. In this position, the responsibility also includes mentoring, guiding and driving a small team of engineers enabling them for scaling across multiple designs. The position also involves definition and enhancement of DFT methodologies and tools to be able to benchmark them and enable new methodologies in the domain of DFT/Test. What We're Looking For Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience. Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 13+ years of experience. Hands on working experience in various stages of DFT-Execution SCAN-Insertion/MBIST/ATPG/Validation/STA/IP-DFX/Post-Silicon Bringup/Debug Thorough knowledge on various DFT/Test architecture solutions and should be involved in DFT-Architecture definition of at-least couple of Designs. Strong fundamentals in Digital Circuit Design and Logic Design is required Understanding of DFT Flows and Methodologies and Experience with Cadence/Mentor/Synopsys Tool set (Genus,Modus,NCSim / DC,Tessent,Spyglass/Tmax) Prior experience in ASIC design is a plus Scripting skills using PERL, Tcl and C-Shell is plus Additional Compensation And Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Preferred Qualifications Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3+ years of Hardware Engineering or related work experience. 2+ years of experience with circuit design (e.g., digital, analog, RF). 2+ years of experience utilizing schematic capture and circuit simulation software. 2+ years of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. Principal Duties And Responsibilities Applies Hardware knowledge and experience to plan, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Integrates features and functionality into hardware designs in line with proposals or roadmaps. Conducts simulations and analyses of designs as well as implements designs with the best power, performance, and area. Collaborates with teams (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement new requirements and incorporate the latest test solutions in the production program to improve the yield, test time, and quality. Evaluates, characterizes, and develops the manufacturing solutions for leading edge products in processes and bring-up product to meet customer expectations and schedules. Evaluates reliability of materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Assists in the assessment of complex design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes detailed technical documentation for Hardware projects. Level Of Responsibility Works independently with minimal supervision. Decision-making may affect work beyond immediate work group. Requires verbal and written communication skills to convey information. May require basic negotiation, influence, tact, etc. Tasks require multiple steps which can be performed in various orders; some planning, problem-solving, and prioritization must occur to complete the tasks effectively. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075532 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary You will be interacting closely with the product definition and architecture team. Developing implementation (microarchitecture and coding) strategies to meet quality, and PPAS (Performance Power Area Schedule) goals for Sub-system. Define various aspects of the block level design such as block diagram, interfaces, clocking, transaction flow, pipeline, low power etc. Perform as well as lead a team of engineers on RTL coding for Sub-system/SOC integration, function/performance simulation debug. Drive Lint/CDC/FV/UPF checks to ensure design quality. Develop Assertions as part of white-box testing-coverage. Work with stakeholders to discuss the right collateral quality and identify solutions/workarounds. Work towards delivering with key design collaterals (timing constraints, UPF etc.). Desired Skillset Good understanding of low power microarchitecture techniques and AI/ML systems. Thorough knowledge of Computer system architecture, including design aspects of AI/ML designs. Experience in high performance design techniques and trade-offs in a Computer microarchitecture. Good understanding of principals of NoC Design Define Performance (Bandwidth, Latency) and Bus transactions sizing based on usecases across Voltage/Frequency corners Working with Power and Synthesis teams on usecases, dynamic power and datapath interactions Knowledge of Verilog / System Verilog. Experience with simulators and waveform debugging tools Working with SOC DFT and PD teams as part of collaterals exchanges Knowledge of logic design principles along with timing and power implications. Preferred Qualifications Master's or Bachelor's degree in Electronics or Electrical Engineering or equivalent. At least 3+ years of experience working on multiple designs. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075499 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Preferred Qualifications Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3+ years of Hardware Engineering or related work experience. 2+ years of experience with circuit design (e.g., digital, analog, RF). 2+ years of experience utilizing schematic capture and circuit simulation software. 2+ years of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. Principal Duties And Responsibilities Applies Hardware knowledge and experience to plan, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Integrates features and functionality into hardware designs in line with proposals or roadmaps. Conducts simulations and analyses of designs as well as implements designs with the best power, performance, and area. Collaborates with teams (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement new requirements and incorporate the latest test solutions in the production program to improve the yield, test time, and quality. Evaluates, characterizes, and develops the manufacturing solutions for leading edge products in processes and bring-up product to meet customer expectations and schedules. Evaluates reliability of materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Assists in the assessment of complex design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes detailed technical documentation for Hardware projects. Level Of Responsibility Works independently with minimal supervision. Decision-making may affect work beyond immediate work group. Requires verbal and written communication skills to convey information. May require basic negotiation, influence, tact, etc. Tasks require multiple steps which can be performed in various orders; some planning, problem-solving, and prioritization must occur to complete the tasks effectively. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075531 Show more Show less