238 Cadence Virtuoso Jobs - Page 2

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

Description As a Memory Circuit Design Verification Engineer, you will work in a highly innovative, motivated, young and dynamic design team capable of verifying complete products using state of the art memory technologies. You will need to have the ability to evaluate full chip and/or block level functionality and provide solutions to help the timely delivery of a functionally correct design. Unique Opportunities Complete ownership of verification and end to end analysis of complex full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR4,LPDDR4,DDR5 and LPDDR5 that are capable of operating at high speeds of ...

Role Overview: As a Layout/Mask Designer, your primary role will involve developing and preparing standard cell layouts and detailed drawings of semiconductor devices based on schematics and related geometry provided by design engineering. You will utilize CAD or other computerized equipment to complete your work, ensuring accuracy in dimensions, specifications, and verification of completed drawings, artwork, or digitized plots. With 3-5 years of experience, you will be responsible for checking design layouts and detailed drawings. Key Responsibilities: - Must have 3-5 years of experience in standard cell layout, analog, mixed-signal, and custom digital block designs in advanced CMOS proces...

Job Description: Develop and support analog design flows for schematic entry and simulation. Automate Monte Carlo and variation analysis workflows. Integrate and maintain flows using Cadence Virtuoso and Spectre. Support LVS and post-layout simulation flows. Qualification: Bachelors/Master’s in Electrical/Computer Science Strong scripting (Python/Perl) and analog verification knowledge

Company Description Company Profile: SanDisk Corporation is a leading flash storage company with a diverse portfolio of covering consumer, client and enterprise solutions. Deployed by the largest and most prominent organizations worldwide, SanDisk solutions are everywhere, touching lives and enabling great value from the data they possess. Innovating At The Boundaries Of Technology Whether in your pocket, home, car, or the cloud, it's likely SanDIsk is with you every step of the way. It's a responsibility we don't take lightly. That's why we are always at the cusp of innovation, pushing the boundaries of technology to make what you thought was once impossible, possible. We deliver the possib...

About Iravan Iravan Technologies, headquartered in Pune, is a semiconductor design services company specializing in Mixed-Signal, Digital, and Formal Verification. We partner with leading companies across Storage, Networking, Aerospace, Automotive, Defense, and other critical industries to deliver advanced semiconductor solutions. Role Expectations (JD): Hands-on experience in designing Analog IPs such as LDOs, Bandgaps, ADCs, DACs, and Bias Circuits across various technology nodes. End-to-end ownership from specification to silicon including design, simulation, verification, and layout support. Strong understanding of analog fundamentals, circuit behavior, and CMOS process variations. Profi...

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop?stdcells?architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/...

Must have 3-5 of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be able to perform standard

Overview Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our 15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their ca...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Sci...

As an Analog Design Engineer at onsemi's Image Sensors Group in Bengaluru, India, you will collaborate with the design team on block level/Sub System IP/ Top level design and verifications. You will work on generating feasibility reports for image sensor products, focusing on block level and top-level design and verification for 1D and 2D stacked image sensors. Collaboration with the analog layout team for layout reviews and EMIR simulations will be a key aspect of your role. You will also work closely with other teams such as digital, physical design, and product engineering during design and silicon bring up. Maintaining documentation and checklists for deliverables as per the New Product ...

1 Job Description for Memory Layout Location: Bangalore Experience : 3yrs-10 Yrs - Memory leaf cell layout development - Migration of layout from one tech node to another - Block and top level integration - Quality and timely delivery - EM-IR, area intensive layouts, Quality checks (QC) - Understanding of design rules for 90nm and below - Understanding of design rules for 14ff and 16ff is a plus. - Drive multiple projects and provide necessary technical guidance to the engineers - Understanding of DFM and DFY - Understanding of memory compiler architectures - Good debugging skills - Knowledge of scripting in PERL/Shell/TCL scripting etc - Proficient with tools like Cadence Virtuoso, Calibre ...

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and full-chip integration. Your role will involve performing and resolving LVS/DRC violations independently, collaborating with circuit design teams to optimize layout quality and performance, and ensuring layouts meet design matching and parasitic constraints. You will have the opportunity to work with advanced nodes like 7nm, 16nm, and 28nm, leveraging your 3+ years of relevant Analog Layout experience. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate ...

As an Analog Mixed Signal Designer at ARF Design, you will be responsible for working on the design of building blocks used in high-speed IPs such as DDR, LPDDR, HBM, UCIe, and PCIe. Your primary responsibilities will include: - Deriving circuit block level specifications from top-level specifications - Conducting optimized transistor-level design of analog and custom digital blocks - Performing Spice simulations to cover detailed specifications - Guiding layout design for best performance, matching, and power delivery - Characterizing the performance of designs in PVT + mismatch corners, including reliability checks - Generating and delivering behavioral (Verilog), timing (lib), and physica...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

About The Role This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; About The Role - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in ...

About The Role : To work independently on block/IP levels analog layout design from schematic. Estimating the Area, Optimizing Floorplan, Routing and Verifications. Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 5,7,10, 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence Virtuoso Editor & Calibre RVE Good interpersonal skills and critical thinking abilities to resolve the issue technically, and professionally. Key Responsibilities: Independently execute block/IP-level analog layout from schematics, including area estimation, floorplan optimizat...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Timing models for AMS macros in multiple f...

Responsible for Design and development of critical analog, mixed-signal, and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time de

As a Layout Design Engineer at RFIC Solutions Inc., you will be responsible for the Layout design of RF and Analog circuits in a fast-paced environment. Your key responsibilities will include: - Excellent problem solving skill of DRC, LVS issues - Parasitic extraction of layout and layout quality checking - Custom layout experience must include high frequency circuits such as LNAs, Mixers, VCOs, etc. - Full familiarity with Cadence Virtuoso and ADS (Advance Design System) Caliber tools for 65nm and lower design processes - Full understanding of hierarchical planning (top down and bottom up) and integration To qualify for this role, you should have an M.Tech or BE/B.Tech in Electronics and Te...

Role Overview: As an experienced RF Circuit Designer with 5-10 years of experience, you will be responsible for the design and simulation of RF circuits including LNAs, mixers, power amplifiers, VCOs, and filters. You should be proficient in using RF design tools such as ADS, HFSS, and Cadence Virtuoso, and have a strong understanding of RF layout techniques like impedance matching and parasitic extraction. Your role will also involve antenna design, system integration, and compliance with RF standards like FCC and ETSI. Key Responsibilities: - Design and simulate RF circuits including LNAs, mixers, power amplifiers, VCOs, and filters - Utilize RF design tools and simulation methodologies fo...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Analog & Mixed Signal Layout Engineer High-Speed Analog Layout Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated Analog & Mixed Signal (A&MS) Layout Engineer with over 6 years of experience in the development of high-speed analog and mixed-signal integrated circuits. You are passion...

ANALOG LAYOUT ENGINEER An experienced Analog Layout design engineer should be innovative, collaborative, meticulous, and curious. KEY RESPONSIBILITIES: Layout of basic digital and analog building blocks using analog transistor level components. Layout of analog macros, power pads, and input/output pads using above blocks Working closely with Analog designers in floorplanning; power grid and signal flow planning Physical and electrical verification include DRC, LVS, EM/IR, ERC, PERC Latch up and PERC ESD Creation of blackbox models for other groups in the design flow PREFERRED EXPERIENCE: Must have detailed knowledge of CMOS circuit theory. Must have ability to communicate with various teams ...

Job Overview We are seeking a talented Analog Layout Engineer with 3- 5 years of experience in advanced semiconductor technologies (5nm and below). The ideal candidate will have hands-on expertise in custom layout design, FinFET technology nodes, and EDA tools like Cadence Virtuoso and Calibre. This is a fantastic opportunity to work on cutting-edge analog and mixed-signal circuit layouts as part of a high-performance team. Key Responsibilities Execute full custom layout design for high-speed analog and mixed-signal blocks. Collaborate closely with circuit design teams to interpret and implement layout specifications. Perform layout verification, including DRC, LVS, and parasitic extraction ...