Layout Mask Designer

Role Overview: As a Layout/Mask Designer, your primary role will involve developing and preparing standard cell layouts and detailed drawings of semiconductor devices based on schematics and related geometry provided by design engineering. You will utilize CAD or other computerized equipment to complete your work, ensuring accuracy in dimensions, specifications, and verification of completed drawings, artwork, or digitized plots. With 3-5 years of experience, you will be responsible for checking design layouts and detailed drawings. Key Responsibilities: - Must have 3-5 years of experience in standard cell layout, analog, mixed-signal, and custom digital block designs in advanced CMOS processes. - Expertise in multiple standard cell layout library developments is required. - Perform standard cell layout development and physical verification activities for complex designs as per provided specifications. - Proficient in layout area and routing optimization, design rules, yield, and reliability issues. - Strong understanding of layout fundamentals such as Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc. - Adequate knowledge of schematics, interface with circuit designer, and CAD team. - Excellent problem-solving skills in resolving area, power, performance, and physical verification issues of custom layout. - Experience with Cadence tools including Virtuoso schematic editor, Virtuoso layout L, XL, and Verification tools like Mentor Caliber. - Proficiency in Device Matching, Parasitic Analysis, Electron Migration, and Isolation Techniques. - Demonstrated leadership qualities, multitasking abilities, and the capacity to work effectively in a team environment. - Self-motivated, hardworking, goal-oriented individual with excellent verbal and written communication skills. - Knowledge of Skill coding and layout automation is a plus. Qualifications Required: - 3-5 years of experience in standard cell layout, analog, mixed-signal, and custom digital block designs. - Expertise in multiple standard cell layout library developments. - Proficiency in Cadence Virtuoso tools and physical verifications checks. (Note: No additional details about the company were mentioned in the job description.),