AMS Verification Engineer

Description

Job Title :

Location :

Education :

About The Role

Key Responsibilities

• Lead and execute AMS verification for complex IPs and SoCs.
• Develop and maintain testbenches, UVM environments, and test cases for AMS verification.
• Perform Model vs. Schematic (MVS) verification and ensure high-quality correlation results.
• Set up and maintain VManager regression environments for automated testing.
• Collaborate with design, modeling, and system teams to ensure functional correctness.
• Debug simulation failures, identify root causes, and drive corrective actions.
• Provide technical mentorship and contribute to continuous flow improvements.
• Work independently and coordinate with global verification teams for seamless project execution.
  

Required Qualifications

• Bachelors or Masters degree in Electronics, Electrical Engineering, Microelectronics, or Computer Science.
• 8+ years of hands-on experience in SoC/IP-level AMS verification.
• Strong knowledge of Verilog AMS, SystemVerilog, Real Number Modeling (RNM), Verilog, and/or VHDL.
• Good understanding of UVM methodology and test case development.
• Proficiency in Analog/RF design fundamentals and analog block specifications.
• Hands-on experience in Model vs. Schematic (MVS) verification flow.
• Strong working experience with Cadence design and verification tools.
• Proficiency in C, Tcl, and Perl programming; knowledge of Python or SystemC is a plus.
• Familiarity with SoC architecture, directed and constrained-random verification methodologies.
• Strong analytical and debugging skills; ability to work independently with minimal supervision.
• Excellent communication skills to collaborate effectively with cross-functional and global teams.
  

Good To Have

• SystemC or mixed-signal co-simulation experience.
• Exposure to high-speed analog IPs such as SerDes, DDR, or PLLs.
• Knowledge of scripting for automation and verification flow optimization.