AMS Verification Engineer

As an AMS Verification Engineer at our company, you will play a crucial role in the verification of complex IPs and SoCs using analog and mixed-signal methodologies. Your responsibilities will include: - Leading and executing AMS verification projects, ensuring high-quality results. - Developing and maintaining testbenches, UVM environments, and test cases. - Performing Model vs. Schematic (MVS) verification and correlating the results effectively. - Setting up and managing VManager regression environments for automated testing. - Collaborating with design, modeling, and system teams to ensure functional correctness. - Debugging simulation failures, identifying root causes, and driving corrective actions. - Providing technical mentorship and contributing to continuous flow improvements. - Working independently and coordinating with global verification teams for project success. Qualifications required for this role include: - Bachelors or Masters degree in Electronics, Electrical Engineering, Microelectronics, or Computer Science. - 8+ years of hands-on experience in SoC/IP-level AMS verification. - Strong knowledge of Verilog AMS, SystemVerilog, Real Number Modeling (RNM), Verilog, and/or VHDL. - Good understanding of UVM methodology and test case development. - Proficiency in Analog/RF design fundamentals and analog block specifications. - Hands-on experience in Model vs. Schematic (MVS) verification flow. - Strong working experience with Cadence design and verification tools. - Proficiency in C, Tcl, and Perl programming; knowledge of Python or SystemC is a plus. - Familiarity with SoC architecture, directed and constrained-random verification methodologies. - Strong analytical and debugging skills; ability to work independently with minimal supervision. - Excellent communication skills to collaborate effectively with cross-functional and global teams. Additionally, it would be beneficial if you have experience in SystemC or mixed-signal co-simulation, exposure to high-speed analog IPs such as SerDes, DDR, or PLLs, and knowledge of scripting for automation and verification flow optimization. Please note that the company's additional details were not provided in the job description.,